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85d251d7ec
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
31 lines
731 B
C
31 lines
731 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define PowerPC target-specific operand constraints.
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* Copyright (c) 2021 Linaro
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*/
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/*
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* Define constraint letters for register sets:
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* REGS(letter, register_mask)
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*/
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REGS('r', ALL_GENERAL_REGS)
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REGS('v', ALL_VECTOR_REGS)
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REGS('A', 1u << TCG_REG_R3)
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REGS('B', 1u << TCG_REG_R4)
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REGS('C', 1u << TCG_REG_R5)
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REGS('D', 1u << TCG_REG_R6)
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REGS('L', ALL_QLOAD_REGS)
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REGS('S', ALL_QSTORE_REGS)
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/*
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* Define constraint letters for constants:
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* CONST(letter, TCG_CT_CONST_* bit set)
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*/
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CONST('I', TCG_CT_CONST_S16)
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CONST('J', TCG_CT_CONST_U16)
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CONST('M', TCG_CT_CONST_MONE)
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CONST('T', TCG_CT_CONST_S32)
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CONST('U', TCG_CT_CONST_U32)
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CONST('W', TCG_CT_CONST_WSZ)
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CONST('Z', TCG_CT_CONST_ZERO)
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