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5224c88dd3
This fixes another failure with ExtINT, demonstrated by QNX. The failure mode is as follows: - IPI sent to cpu 0 (bit set in APIC irr) - IPI accepted by cpu 0 (bit cleared in irr, set in isr) - IPI sent to cpu 0 (bit set in both irr and isr) - PIC interrupt sent to cpu 0 The PIC interrupt causes CPU_INTERRUPT_HARD to be set, but apic_irq_pending observes that the highest pending APIC interrupt priority (the IPI) is the same as the processor priority (since the IPI is still being handled), so apic_get_interrupt returns a spurious interrupt rather than the pending PIC interrupt. The result is an endless sequence of spurious interrupts, since nothing will clear CPU_INTERRUPT_HARD. Instead, ExtINT interrupts should have ignored the processor priority. Calling apic_check_pic early in apic_get_interrupt ensures that apic_deliver_pic_intr is called instead of delivering the spurious interrupt. apic_deliver_pic_intr then clears CPU_INTERRUPT_HARD if needed. Reported-by: Richard Bilson <rbilson@qnx.com> Tested-by: Richard Bilson <rbilson@qnx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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| .. | ||
| allwinner-a10-pic.c | ||
| apic_common.c | ||
| apic.c | ||
| arm_gic_common.c | ||
| arm_gic_kvm.c | ||
| arm_gic.c | ||
| armv7m_nvic.c | ||
| etraxfs_pic.c | ||
| exynos4210_combiner.c | ||
| exynos4210_gic.c | ||
| gic_internal.h | ||
| grlib_irqmp.c | ||
| heathrow_pic.c | ||
| i8259_common.c | ||
| i8259.c | ||
| imx_avic.c | ||
| ioapic_common.c | ||
| ioapic.c | ||
| lm32_pic.c | ||
| Makefile.objs | ||
| omap_intc.c | ||
| openpic_kvm.c | ||
| openpic.c | ||
| pl190.c | ||
| puv3_intc.c | ||
| realview_gic.c | ||
| s390_flic_kvm.c | ||
| s390_flic.c | ||
| sh_intc.c | ||
| slavio_intctl.c | ||
| xics_kvm.c | ||
| xics.c | ||
| xilinx_intc.c | ||