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4ba2565831
qemu/target/rx
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Richard Henderson 4ba2565831 Fix usp/isp swapping upon clrpsw/setpsw. 
Fix psw.i/pc upon wait.
 Align dtb in ram.
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Merge tag 'pull-rx-20220421' of https://gitlab.com/rth7680/qemu into staging

Fix usp/isp swapping upon clrpsw/setpsw.
Fix psw.i/pc upon wait.
Align dtb in ram.

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# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
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* tag 'pull-rx-20220421' of https://gitlab.com/rth7680/qemu:
  target/rx: update PC correctly in wait instruction
  target/rx: set PSW.I when executing wait instruction
  hw/rx: rx-gdbsim DTB load address aligned of 16byte.
  target/rx: Swap stack pointers on clrpsw/setpsw instruction
  target/rx: Move DISAS_UPDATE check for write to PSW
  target/rx: Store PSW.U in tb->flags
  target/rx: Put tb_flags into DisasContext

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-21 16:45:41 -07:00
..
cpu-param.h target/rx: CPU definitions 2020-03-19 17:58:05 +01:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
cpu.h target/rx: Store PSW.U in tb->flags 2022-04-21 10:04:33 -07:00
disas.c meson: target 2020-08-21 06:30:35 -04:00
gdbstub.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
helper.c target/rx: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
helper.h target/rx: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
insns.decode target/rx: Fix Lesser GPL version number 2020-10-27 00:22:56 +01:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build meson: target 2020-08-21 06:30:35 -04:00
op_helper.c Fix usp/isp swapping upon clrpsw/setpsw. 2022-04-21 16:45:41 -07:00
translate.c target/rx: update PC correctly in wait instruction 2022-04-21 10:09:12 -07:00