Peter Maydell 48f22ad04e m68k pull-request 20200706 ... disable floatx80_invalid_encoding() for m68k fix m68k_cpu_get_phys_page_debug() -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAl8DhA0SHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748kn8QAJkOBWOP/CgzyB/uaPE44kLVcNBLDo9Q umB1JHhrchwTd/QtlTjp5dty4NgQsSfCE1dsgCKhv+vP73IGZW83ziXXnSiO5Ant wfXvzppT93yZ01dk0a+/HvHhWeYxDOhdqZ95AZZTiVEPnT6L+dneNN4Vz1Ri5CSw nW8AYmPGoGLQp0rcANHwXLm40pET5VzYmvf8rrzCYpCpYy3pIeKIbGJkPqh+XCXW ugZgQtXoKAcHPtHa0wO57ysC1t5S1O5K772AlDss25my/McG+QySHST/xCORch42 v4HvYlAn/MiyoRw+noz8DXGn0gr+MeZYGbn1nmimB/xjB8fvIFn+7rhGtUa0miBF ewA9eLOuikzCw7I5SHtSOseDkZci9DJKcIXL+jIQLfBZbFSLXrmxgG9oVOYdm+FL 6Wq2Hpd3H4TRNvuOHeZkxUJ4+SUnEZ7P9IFl4cG2euq5qUK9GQ1oG2Msi+Au5nTq Nin6FYj5qKXn1vjLzUiTz4DOjpIN1HyB0EvzOrjR+eI/KmMFZY7h3EoeUwPeymrV QR2N+hU/l1e+VZBSBnpdgUu32162DrmLBcvGBg5Cxb4bdnEqvKINAVez4pkh+7yj WxXG4jOCfBeJWIJ7yLAaZRdTZ/RSs1kO6Ksnr+Y4tAFkkbXqJPCwHM6nTEt13X1d BIT0s1TJ+DvX =JAxe -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' into staging m68k pull-request 20200706 disable floatx80_invalid_encoding() for m68k fix m68k_cpu_get_phys_page_debug() # gpg: Signature made Mon 06 Jul 2020 21:05:33 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-next-pull-request: softfloat,m68k: disable floatx80_invalid_encoding() for m68k target/m68k: consolidate physical translation offset into get_physical_address() target/m68k: fix physical address translation in m68k_cpu_get_phys_page_debug() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2020-07-08 21:38:47 +01:00
..
alpha	accel/tcg: Relax va restrictions on 64-bit guests	2020-05-15 15:25:16 +01:00
arm	target/arm: Fix temp double-free in sve ldr/str	2020-07-03 16:59:43 +01:00
cris	x86 and machine queue for 5.0 soft freeze	2020-03-19 14:22:46 +00:00
hppa	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
i386	target/i386: sev: Use ram_block_discard_disable()	2020-07-02 05:54:59 -04:00
lm32	x86 and machine queue for 5.0 soft freeze	2020-03-19 14:22:46 +00:00
m68k	target/m68k: consolidate physical translation offset into get_physical_address()	2020-07-06 21:39:57 +02:00
microblaze	target/microblaze: monitor: Increase the number of registers reported	2020-05-14 16:01:02 +02:00
mips	hw/mips: Implement the kvm_type() hook in MachineClass	2020-06-27 19:35:39 +02:00
moxie	cpu: Use DeviceClass reset instead of a special CPUClass reset	2020-03-17 19:48:10 -04:00
nios2	x86 and machine queue for 5.0 soft freeze	2020-03-19 14:22:46 +00:00
openrisc	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
ppc	target/ppc: Remove TIDR from POWER10 processor	2020-06-26 09:22:30 +10:00
riscv	target/riscv: configure and turn on vector extension from command line	2020-07-02 09:19:34 -07:00
rx	target/rx/translate: Add missing fall through comment	2020-04-07 18:45:54 -07:00
s390x	target/s390x: Fix SQXBR	2020-07-03 11:15:59 +02:00
sh4	gdbstub: Introduce gdb_get_float32() to get 32-bit float registers	2020-04-15 11:38:23 +01:00
sparc	target/sparc: Translate flushw opcode	2020-06-29 12:59:50 +02:00
tilegx	cpu: Use DeviceClass reset instead of a special CPUClass reset	2020-03-17 19:48:10 -04:00
tricore	target/tricore: Implement gdbstub	2020-06-01 16:55:13 +02:00
unicore32	target/unicore32: Prefer qemu_semihosting_log_out() over curses	2020-06-09 19:58:53 +02:00
xtensa	target/xtensa fixes for 5.1:	2020-06-25 21:20:45 +01:00