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dcef727e5e
Only when guest code is unmasking interrupts, terminate the excution of translated code and exit to the main CPU loop to handle previous pended interrupts because of the interrupts mask by guest code. Signed-off-by: Wentong Wu <wentong.wu@intel.com> Message-id: 20200710233433.19729-4-wentong.wu@intel.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
68 lines
1.9 KiB
C
68 lines
1.9 KiB
C
/*
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* Altera Nios2 CPU PIC
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*
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* Copyright (c) 2016 Marek Vasut <marek.vasut@gmail.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "hw/irq.h"
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#include "qemu/config-file.h"
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#include "boot.h"
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static void nios2_pic_cpu_handler(void *opaque, int irq, int level)
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{
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Nios2CPU *cpu = opaque;
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CPUNios2State *env = &cpu->env;
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CPUState *cs = CPU(cpu);
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int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
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if (type == CPU_INTERRUPT_HARD) {
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env->irq_pending = level;
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if (level && (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
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env->irq_pending = 0;
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cpu_interrupt(cs, type);
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} else if (!level) {
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env->irq_pending = 0;
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cpu_reset_interrupt(cs, type);
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}
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} else {
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if (level) {
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cpu_interrupt(cs, type);
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} else {
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cpu_reset_interrupt(cs, type);
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}
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}
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}
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void nios2_check_interrupts(CPUNios2State *env)
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{
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if (env->irq_pending &&
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(env->regs[CR_STATUS] & CR_STATUS_PIE)) {
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env->irq_pending = 0;
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cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD);
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}
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}
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qemu_irq *nios2_cpu_pic_init(Nios2CPU *cpu)
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{
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return qemu_allocate_irqs(nios2_pic_cpu_handler, cpu, 2);
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}
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