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qemu/target/loongarch
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Richard Henderson 597f9b2d30 accel/tcg: Pass max_insn to gen_intermediate_code by pointer 
In preparation for returning the number of insns generated
via the same pointer.  Adjust only the prototypes so far.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-01 07:33:27 -10:00
..
insn_trans target/loongarch: Disassemble jirl properly 2023-01-23 15:36:36 -10:00
constant_timer.c target/loongarch: Add constant timer support 2022-06-06 18:09:03 +00:00
cpu-csr.h target/loongarch: Add CSRs definition 2022-06-06 18:09:03 +00:00
cpu-param.h target/loongarch: Add MMU support for LoongArch CPU. 2022-06-06 18:09:03 +00:00
cpu.c target/loongarch: Replace tb_pc() with tb->pc 2023-03-01 07:33:19 -10:00
cpu.h target/loongarch/cpu: Restrict "memory.h" header to sysemu 2023-02-27 22:29:01 +01:00
csr_helper.c target/loongarch: Add lock when writing timer clear reg 2022-07-04 11:08:58 +05:30
disas.c target/loongarch: Disassemble pcadd* addresses 2023-01-23 15:36:36 -10:00
fpu_helper.c target/loongarch: Remove cpu_fcsr0 2022-08-08 19:42:53 -07:00
gdbstub.c target/loongarch: Update gdb_set_fpu() and gdb_get_fpu() 2022-08-05 10:02:40 -07:00
helper.h target/loongarch: Remove cpu_fcsr0 2022-08-08 19:42:53 -07:00
insns.decode target/loongarch: Disassemble jirl properly 2023-01-23 15:36:36 -10:00
internals.h target/loongarch: Update gdb_set_fpu() and gdb_get_fpu() 2022-08-05 10:02:40 -07:00
iocsr_helper.c hw/intc: Fix LoongArch extioi coreisr accessing 2022-11-04 17:07:40 +08:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
machine.c target/loongarch: Add MMU support for LoongArch CPU. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Enable the disassembler for host tcg 2023-01-23 15:36:36 -10:00
op_helper.c target/loongarch/op_helper: Fix coverity cond_at_most error 2022-07-19 21:53:58 +05:30
README docs/system/loongarch: Update the LoongArch document 2022-08-13 04:45:03 -07:00
tlb_helper.c bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
translate.c accel/tcg: Pass max_insn to gen_intermediate_code by pointer 2023-03-01 07:33:27 -10:00
translate.h target/loongarch: Separate the hardware flags into MMU index and PLV 2022-11-07 10:54:08 +08:00

README 

- Introduction

  LoongArch is the general processor architecture of Loongson.

  The following versions of the LoongArch core are supported
    core: 3A5000
    https://github.com/loongson/LoongArch-Documentation/releases/download/2021.08.17/LoongArch-Vol1-v1.00-EN.pdf

  We can get the latest loongarch documents at https://github.com/loongson/LoongArch-Documentation/tags.


- System emulation

  You can reference docs/system/loongarch/loongson3.rst to get the information about system emulation of LoongArch.

- Linux-user emulation

  We already support Linux user emulation. We can use LoongArch cross-tools to build LoongArch executables on X86 machines,
  and We can also use qemu-loongarch64 to run LoongArch executables.

  1. Config cross-tools env.

     see System emulation.

  2. Test tests/tcg/multiarch.

     ./configure  --static  --prefix=/usr  --disable-werror --target-list="loongarch64-linux-user" --enable-debug

     cd build

     make && make check-tcg

  3. Run LoongArch system basic command with loongarch-clfs-system.

     - Config clfs env.

       wget https://github.com/loongson/build-tools/releases/download/2022.05.29/loongarch64-clfs-system-5.0.tar.bz2

       tar -vxf loongarch64-clfs-system-5.0.tar.bz2 -C /opt/clfs

       cp /opt/clfs/lib64/ld-linux-loongarch-lp64d.so.1  /lib64

       export LD_LIBRARY_PATH="/opt/clfs/lib64"

     - Run LoongArch system basic command.

       ./qemu-loongarch64  /opt/clfs/usr/bin/bash
       ./qemu-loongarch64  /opt/clfs/usr/bin/ls
       ./qemu-loongarch64  /opt/clfs/usr/bin/pwd

- Note.
  We can get the latest LoongArch documents or LoongArch tools at https://github.com/loongson/