Max Filippov 3a3c9dc4ca target-xtensa: implement RER/WER instructions ... RER and WER are privileged instructions for accessing external registers. External register address space is local to processor core. There's no alignment requirements, addressable units are 32-bit wide registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		2017-01-16 19:19:03 -08:00
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core-dc232b
core-dc233c
core-fsf
core-dc232b.c
core-dc233c.c
core-fsf.c
cpu-qom.h
cpu.c	target-xtensa: implement RER/WER instructions	2017-01-16 19:19:03 -08:00
cpu.h	target-xtensa: implement RER/WER instructions	2017-01-16 19:19:03 -08:00
gdbstub.c
helper.c	target/xtensa: implement RUNSTALL	2017-01-15 13:01:55 -08:00
helper.h	target-xtensa: implement RER/WER instructions	2017-01-16 19:19:03 -08:00
import_core.sh
Makefile.objs
monitor.c
op_helper.c	target-xtensa: implement RER/WER instructions	2017-01-16 19:19:03 -08:00
overlay_tool.h	target-xtensa: implement RER/WER instructions	2017-01-16 19:19:03 -08:00
translate.c	target-xtensa: implement RER/WER instructions	2017-01-16 19:19:03 -08:00
xtensa-semi.c