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767a554a0c
Introduce global kvm_msi_use_devid flag plus associated kvm_msi_devid_required() macro. Passes the device ID, if needed, while building the MSI route entry. Device IDs are required by the ARM GICv3 ITS (IRQ remapping function is based on this information). Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 1474616617-366-5-git-send-email-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
161 lines
2.7 KiB
C
161 lines
2.7 KiB
C
/*
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* QEMU KVM stub
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*
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* Copyright Red Hat, Inc. 2010
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*
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* Author: Paolo Bonzini <pbonzini@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "sysemu/kvm.h"
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#ifndef CONFIG_USER_ONLY
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#include "hw/pci/msi.h"
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#endif
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KVMState *kvm_state;
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bool kvm_kernel_irqchip;
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bool kvm_async_interrupts_allowed;
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bool kvm_eventfds_allowed;
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bool kvm_irqfds_allowed;
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bool kvm_resamplefds_allowed;
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bool kvm_msi_via_irqfd_allowed;
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bool kvm_gsi_routing_allowed;
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bool kvm_gsi_direct_mapping;
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bool kvm_allowed;
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bool kvm_readonly_mem_allowed;
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bool kvm_ioeventfd_any_length_allowed;
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bool kvm_msi_use_devid;
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int kvm_destroy_vcpu(CPUState *cpu)
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{
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return -ENOSYS;
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}
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int kvm_init_vcpu(CPUState *cpu)
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{
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return -ENOSYS;
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}
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void kvm_flush_coalesced_mmio_buffer(void)
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{
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}
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void kvm_cpu_synchronize_state(CPUState *cpu)
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{
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}
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void kvm_cpu_synchronize_post_reset(CPUState *cpu)
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{
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}
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void kvm_cpu_synchronize_post_init(CPUState *cpu)
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{
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}
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int kvm_cpu_exec(CPUState *cpu)
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{
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abort();
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}
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int kvm_has_sync_mmu(void)
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{
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return 0;
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}
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int kvm_has_many_ioeventfds(void)
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{
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return 0;
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}
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int kvm_update_guest_debug(CPUState *cpu, unsigned long reinject_trap)
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{
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return -ENOSYS;
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}
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int kvm_insert_breakpoint(CPUState *cpu, target_ulong addr,
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target_ulong len, int type)
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{
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return -EINVAL;
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}
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int kvm_remove_breakpoint(CPUState *cpu, target_ulong addr,
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target_ulong len, int type)
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{
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return -EINVAL;
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}
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void kvm_remove_all_breakpoints(CPUState *cpu)
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{
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}
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#ifndef _WIN32
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int kvm_set_signal_mask(CPUState *cpu, const sigset_t *sigset)
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{
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abort();
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}
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#endif
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int kvm_on_sigbus_vcpu(CPUState *cpu, int code, void *addr)
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{
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return 1;
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}
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int kvm_on_sigbus(int code, void *addr)
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{
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return 1;
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}
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#ifndef CONFIG_USER_ONLY
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int kvm_irqchip_add_msi_route(KVMState *s, int vector, PCIDevice *dev)
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{
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return -ENOSYS;
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}
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void kvm_init_irq_routing(KVMState *s)
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{
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}
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void kvm_irqchip_release_virq(KVMState *s, int virq)
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{
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}
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int kvm_irqchip_update_msi_route(KVMState *s, int virq, MSIMessage msg,
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PCIDevice *dev)
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{
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return -ENOSYS;
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}
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void kvm_irqchip_commit_routes(KVMState *s)
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{
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}
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int kvm_irqchip_add_adapter_route(KVMState *s, AdapterInfo *adapter)
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{
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return -ENOSYS;
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}
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int kvm_irqchip_add_irqfd_notifier_gsi(KVMState *s, EventNotifier *n,
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EventNotifier *rn, int virq)
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{
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return -ENOSYS;
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}
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int kvm_irqchip_remove_irqfd_notifier_gsi(KVMState *s, EventNotifier *n,
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int virq)
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{
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return -ENOSYS;
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}
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bool kvm_has_free_slot(MachineState *ms)
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{
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return false;
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}
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#endif
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