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4c315c2766
Several devices don't survive object_unref(object_new(T)): they crash or hang during cleanup, or they leave dangling pointers behind. This breaks at least device-list-properties, because qmp_device_list_properties() needs to create a device to find its properties. Broken in commitf4eb32b
"qmp: show QOM properties in device-list-properties", v2.1. Example reproducer: $ qemu-system-aarch64 -nodefaults -display none -machine none -S -qmp stdio {"QMP": {"version": {"qemu": {"micro": 50, "minor": 4, "major": 2}, "package": ""}, "capabilities": []}} { "execute": "qmp_capabilities" } {"return": {}} { "execute": "device-list-properties", "arguments": { "typename": "pxa2xx-pcmcia" } } qemu-system-aarch64: /home/armbru/work/qemu/memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed. Aborted (core dumped) [Exit 134 (SIGABRT)] Unfortunately, I can't fix the problems in these devices right now. Instead, add DeviceClass member cannot_destroy_with_object_finalize_yet to mark them: * Hang during cleanup (didn't debug, so I can't say why): "realview_pci", "versatile_pci". * Dangling pointer in cpus: most CPUs, plus "allwinner-a10", "digic", "fsl,imx25", "fsl,imx31", "xlnx,zynqmp", because they create such CPUs * Assert kvm_enabled(): "host-x86_64-cpu", host-i386-cpu", "host-powerpc64-cpu", "host-embedded-powerpc-cpu", "host-powerpc-cpu" (the powerpc ones can't currently reach the assertion, because the CPUs are only registered when KVM is enabled, but the assertion is arguably in the wrong place all the same) Make qmp_device_list_properties() fail cleanly when the device is so marked. This improves device-list-properties from "crashes, hangs or leaves dangling pointers behind" to "fails". Not a complete fix, just a better-than-nothing work-around. In the above reproducer, device-list-properties now fails with "Can't list properties of device 'pxa2xx-pcmcia'". This also protects -device FOO,help, which uses the same machinery since commitef52358
"qdev-monitor: include QOM properties in -device FOO, help output", v2.2. Example reproducer: $ qemu-system-aarch64 -machine none -device pxa2xx-pcmcia,help Before: qemu-system-aarch64: .../memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed. After: Can't list properties of device 'pxa2xx-pcmcia' Cc: "Andreas Färber" <afaerber@suse.de> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Anthony Green <green@moxielogic.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Jia Liu <proljc@gmail.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Richard Henderson <rth@twiddle.net> Cc: qemu-ppc@nongnu.org Cc: qemu-stable@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1443689999-12182-10-git-send-email-armbru@redhat.com>
257 lines
6.9 KiB
C
257 lines
6.9 KiB
C
/*
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* QEMU Motorola 68k CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "cpu.h"
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#include "qemu-common.h"
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#include "migration/vmstate.h"
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static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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cpu->env.pc = value;
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}
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static bool m68k_cpu_has_work(CPUState *cs)
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{
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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}
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static void m68k_set_feature(CPUM68KState *env, int feature)
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{
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env->features |= (1u << feature);
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}
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/* CPUClass::reset() */
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static void m68k_cpu_reset(CPUState *s)
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{
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M68kCPU *cpu = M68K_CPU(s);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
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CPUM68KState *env = &cpu->env;
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mcc->parent_reset(s);
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memset(env, 0, offsetof(CPUM68KState, features));
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#if !defined(CONFIG_USER_ONLY)
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env->sr = 0x2700;
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#endif
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m68k_switch_sp(env);
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/* ??? FP regs should be initialized to NaN. */
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env->cc_op = CC_OP_FLAGS;
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/* TODO: We should set PC from the interrupt vector. */
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env->pc = 0;
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tlb_flush(s, 1);
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}
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/* CPU models */
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static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
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{
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ObjectClass *oc;
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char *typename;
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if (cpu_model == NULL) {
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return NULL;
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}
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typename = g_strdup_printf("%s-" TYPE_M68K_CPU, cpu_model);
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oc = object_class_by_name(typename);
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g_free(typename);
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if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
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object_class_is_abstract(oc))) {
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return NULL;
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}
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return oc;
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}
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static void m5206_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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}
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static void m5208_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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}
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static void cfv4e_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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}
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static void any_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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/* MAC and EMAC are mututally exclusive, so pick EMAC.
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It's mostly backwards compatible. */
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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}
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typedef struct M68kCPUInfo {
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const char *name;
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void (*instance_init)(Object *obj);
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} M68kCPUInfo;
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static const M68kCPUInfo m68k_cpus[] = {
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{ .name = "m5206", .instance_init = m5206_cpu_initfn },
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{ .name = "m5208", .instance_init = m5208_cpu_initfn },
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{ .name = "cfv4e", .instance_init = cfv4e_cpu_initfn },
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{ .name = "any", .instance_init = any_cpu_initfn },
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};
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static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cs = CPU(dev);
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M68kCPU *cpu = M68K_CPU(dev);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
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m68k_cpu_init_gdb(cpu);
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cpu_reset(cs);
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qemu_init_vcpu(cs);
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mcc->parent_realize(dev, errp);
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}
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static void m68k_cpu_initfn(Object *obj)
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{
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CPUState *cs = CPU(obj);
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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static bool inited;
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cs->env_ptr = env;
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cpu_exec_init(cs, &error_abort);
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if (tcg_enabled() && !inited) {
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inited = true;
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m68k_tcg_init();
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}
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}
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static const VMStateDescription vmstate_m68k_cpu = {
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.name = "cpu",
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.unmigratable = 1,
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};
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static void m68k_cpu_class_init(ObjectClass *c, void *data)
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{
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M68kCPUClass *mcc = M68K_CPU_CLASS(c);
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CPUClass *cc = CPU_CLASS(c);
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DeviceClass *dc = DEVICE_CLASS(c);
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mcc->parent_realize = dc->realize;
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dc->realize = m68k_cpu_realizefn;
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mcc->parent_reset = cc->reset;
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cc->reset = m68k_cpu_reset;
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cc->class_by_name = m68k_cpu_class_by_name;
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cc->has_work = m68k_cpu_has_work;
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cc->do_interrupt = m68k_cpu_do_interrupt;
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cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
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cc->dump_state = m68k_cpu_dump_state;
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cc->set_pc = m68k_cpu_set_pc;
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cc->gdb_read_register = m68k_cpu_gdb_read_register;
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cc->gdb_write_register = m68k_cpu_gdb_write_register;
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#ifdef CONFIG_USER_ONLY
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cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault;
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#else
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cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
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#endif
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cc->cpu_exec_enter = m68k_cpu_exec_enter;
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cc->cpu_exec_exit = m68k_cpu_exec_exit;
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dc->vmsd = &vmstate_m68k_cpu;
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cc->gdb_num_core_regs = 18;
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cc->gdb_core_xml_file = "cf-core.xml";
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/*
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* Reason: m68k_cpu_initfn() calls cpu_exec_init(), which saves
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* the object in cpus -> dangling pointer after final
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* object_unref().
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*/
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dc->cannot_destroy_with_object_finalize_yet = true;
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}
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static void register_cpu_type(const M68kCPUInfo *info)
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{
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TypeInfo type_info = {
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.parent = TYPE_M68K_CPU,
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.instance_init = info->instance_init,
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};
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type_info.name = g_strdup_printf("%s-" TYPE_M68K_CPU, info->name);
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type_register(&type_info);
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g_free((void *)type_info.name);
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}
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static const TypeInfo m68k_cpu_type_info = {
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.name = TYPE_M68K_CPU,
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.parent = TYPE_CPU,
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.instance_size = sizeof(M68kCPU),
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.instance_init = m68k_cpu_initfn,
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.abstract = true,
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.class_size = sizeof(M68kCPUClass),
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.class_init = m68k_cpu_class_init,
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};
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static void m68k_cpu_register_types(void)
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{
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int i;
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type_register_static(&m68k_cpu_type_info);
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for (i = 0; i < ARRAY_SIZE(m68k_cpus); i++) {
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register_cpu_type(&m68k_cpus[i]);
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}
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}
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type_init(m68k_cpu_register_types)
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