qemu/target-ppc
Sorav Bansal 294d129289 target-ppc: fixed translation of mcrxr instruction
Fixed bug in gen_mcrxr() in target-ppc/translate.c:
The XER[SO], XER[OV], and XER[CA] flags are stored in the least
significant bit (bit 0) of their respective registers. They need
to be shifted left (by their respective offsets) to generate the final
XER value. The old translation code for the 'mcrxr' instruction
was assuming that  the flags are stored in bit 2, and was shifting them
right (incorrectly)

Signed-off-by: Sorav Bansal <sbansal@cse.iitd.ernet.in>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-27 13:48:22 +02:00
..
arch_dump.c target-ppc: Set the correct endianness in ELF dump header 2014-06-16 13:24:36 +02:00
cpu-models.c target-ppc: Merge 970FX and 970MP into a single 970 class 2014-06-16 13:24:42 +02:00
cpu-models.h target-ppc: Add "compat" CPU option 2014-06-16 13:24:37 +02:00
cpu-qom.h target-ppc: Define Processor Compatibility Masks 2014-06-16 13:24:37 +02:00
cpu.h target-ppc: Add DFP to Emulated Instructions Flag 2014-06-27 13:48:22 +02:00
dfp_helper.c target-ppc: Fix compiler warning 2014-06-24 20:01:24 +04:00
excp_helper.c spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODE 2014-06-16 13:24:45 +02:00
fpu_helper.c powerpc: use float64 for frsqrte 2014-06-16 13:24:46 +02:00
gdbstub.c target-ppc: gdbstub allow byte swapping for reading/writing registers 2014-06-16 13:24:27 +02:00
helper_regs.h PPC: Only enter MSR_POW when no interrupts pending 2014-04-08 11:20:05 +02:00
helper.h target-ppc: Add POWER8's TM SPRs 2014-06-16 13:24:45 +02:00
int_helper.c target-ppc: Refactor AES Instructions 2014-06-16 13:24:33 +02:00
kvm_ppc.c PPC: KVM: Compile fix for qemu_notify_event 2013-09-02 10:06:42 +02:00
kvm_ppc.h KVM: PPC: Expose fixup hcall capability 2014-06-16 13:24:41 +02:00
kvm-stub.c kvm/openpic: in-kernel mpic support 2013-07-01 01:11:14 +02:00
kvm.c PPC: KVM: Make pv hcall endian agnostic 2014-06-16 13:24:46 +02:00
machine.c KVM: target-ppc: Enable TM state migration 2014-06-16 13:24:45 +02:00
Makefile.objs target-ppc: Introduce DFP Helper Utilities 2014-06-16 13:24:29 +02:00
mem_helper.c target-ppc: Allow little-endian user mode. 2014-06-16 13:24:40 +02:00
mfrom_table_gen.c fix spelling in target sub directory 2011-12-02 10:50:57 +00:00
mfrom_table.c find -type f | xargs sed -i 's/[\t ]$//g' # on most files 2007-09-16 21:08:06 +00:00
misc_helper.c target-ppc: Add POWER8's TM SPRs 2014-06-16 13:24:45 +02:00
mmu_helper.c PPC: e500: Fix TLB lookup for 32bit CPUs 2014-06-16 13:24:41 +02:00
mmu-hash32.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
mmu-hash32.h target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook 2014-03-13 19:20:48 +01:00
mmu-hash64.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
mmu-hash64.h target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook 2014-03-13 19:20:48 +01:00
STATUS target-ppc: remove powerpc 970gx 2014-03-05 03:06:23 +01:00
timebase_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
translate_init.c target-ppc: Enable DABRX SPR and limit it to <=POWER7 2014-06-16 13:24:45 +02:00
translate.c target-ppc: fixed translation of mcrxr instruction 2014-06-27 13:48:22 +02:00
user_only_helper.c cpu: Move exception_index field from CPU_COMMON to CPUState 2014-03-13 19:20:46 +01:00