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281c5c95b2
Per the "Physical Layer Specification Version 8.00" chapter 7.5.1,
"Command/Response", there is a minimum 8 clock cycles (Ncr) before
the card response shows up on the data out line. However current
implementation jumps directly to the sending response state after
all 6 bytes command is received, which is a spec violation.
Add a new state PREP_RESP in the ssi-sd state machine to handle it.
Fixes:
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.. | ||
allwinner-sdhost.c | ||
aspeed_sdhci.c | ||
bcm2835_sdhost.c | ||
cadence_sdhci.c | ||
core.c | ||
Kconfig | ||
meson.build | ||
milkymist-memcard.c | ||
omap_mmc.c | ||
pl181.c | ||
pxa2xx_mmci.c | ||
sd.c | ||
sdhci-internal.h | ||
sdhci-pci.c | ||
sdhci.c | ||
sdmmc-internal.c | ||
sdmmc-internal.h | ||
ssi-sd.c | ||
trace-events | ||
trace.h |