mirror of
https://github.com/qemu/qemu.git
synced 2024-11-30 07:13:38 +08:00
7267c0947d
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
429 lines
15 KiB
C
429 lines
15 KiB
C
/*
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* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* PCI bus layout on a real G5 (U3 based):
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*
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* 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
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* 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
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* 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
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* 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
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* 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
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* 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
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* 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
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* 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
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* 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
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* 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
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* 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
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* 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
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* 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
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* 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
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* 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
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* 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
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* 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
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* 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
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* 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
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* 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
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*
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*/
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#include "hw.h"
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#include "ppc.h"
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#include "ppc_mac.h"
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#include "mac_dbdma.h"
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#include "nvram.h"
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#include "pc.h"
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#include "pci.h"
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#include "usb-ohci.h"
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#include "net.h"
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#include "sysemu.h"
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#include "boards.h"
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#include "fw_cfg.h"
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#include "escc.h"
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#include "openpic.h"
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#include "ide.h"
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#include "loader.h"
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#include "elf.h"
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#include "kvm.h"
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#include "kvm_ppc.h"
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#include "hw/usb.h"
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#include "blockdev.h"
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#include "exec-memory.h"
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#define MAX_IDE_BUS 2
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#define CFG_ADDR 0xf0000510
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/* debug UniNorth */
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//#define DEBUG_UNIN
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#ifdef DEBUG_UNIN
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#define UNIN_DPRINTF(fmt, ...) \
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do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define UNIN_DPRINTF(fmt, ...)
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#endif
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/* UniN device */
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static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
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}
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static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
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{
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uint32_t value;
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value = 0;
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UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
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return value;
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}
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static CPUWriteMemoryFunc * const unin_write[] = {
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&unin_writel,
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&unin_writel,
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&unin_writel,
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};
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static CPUReadMemoryFunc * const unin_read[] = {
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&unin_readl,
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&unin_readl,
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&unin_readl,
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};
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static int fw_cfg_boot_set(void *opaque, const char *boot_device)
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{
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fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
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return 0;
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}
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static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
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{
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return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
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}
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static target_phys_addr_t round_page(target_phys_addr_t addr)
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{
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return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
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}
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/* PowerPC Mac99 hardware initialisation */
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static void ppc_core99_init (ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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CPUState *env = NULL;
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char *filename;
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qemu_irq *pic, **openpic_irqs;
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int unin_memory;
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int linux_boot, i;
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ram_addr_t ram_offset, bios_offset;
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target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
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long kernel_size, initrd_size;
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PCIBus *pci_bus;
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MacIONVRAMState *nvr;
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int bios_size;
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MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem, *escc_mem;
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MemoryRegion *ide_mem[3];
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int ppc_boot_device;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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void *fw_cfg;
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void *dbdma;
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int machine_arch;
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linux_boot = (kernel_filename != NULL);
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/* init CPUs */
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if (cpu_model == NULL)
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#ifdef TARGET_PPC64
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cpu_model = "970fx";
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#else
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cpu_model = "G4";
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#endif
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for (i = 0; i < smp_cpus; i++) {
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env = cpu_init(cpu_model);
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if (!env) {
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fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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exit(1);
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}
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/* Set time-base frequency to 100 Mhz */
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cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
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qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
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}
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/* allocate RAM */
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ram_offset = qemu_ram_alloc(NULL, "ppc_core99.ram", ram_size);
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cpu_register_physical_memory(0, ram_size, ram_offset);
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/* allocate and load BIOS */
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bios_offset = qemu_ram_alloc(NULL, "ppc_core99.bios", BIOS_SIZE);
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if (bios_name == NULL)
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bios_name = PROM_FILENAME;
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
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/* Load OpenBIOS (ELF) */
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if (filename) {
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bios_size = load_elf(filename, NULL, NULL, NULL,
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NULL, NULL, 1, ELF_MACHINE, 0);
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g_free(filename);
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} else {
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bios_size = -1;
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}
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if (bios_size < 0 || bios_size > BIOS_SIZE) {
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hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
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exit(1);
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}
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if (linux_boot) {
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uint64_t lowaddr = 0;
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int bswap_needed;
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#ifdef BSWAP_NEEDED
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bswap_needed = 1;
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#else
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bswap_needed = 0;
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#endif
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kernel_base = KERNEL_LOAD_ADDR;
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kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
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NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
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if (kernel_size < 0)
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kernel_size = load_aout(kernel_filename, kernel_base,
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ram_size - kernel_base, bswap_needed,
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TARGET_PAGE_SIZE);
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if (kernel_size < 0)
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kernel_size = load_image_targphys(kernel_filename,
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kernel_base,
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ram_size - kernel_base);
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if (kernel_size < 0) {
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hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
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exit(1);
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}
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/* load initrd */
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if (initrd_filename) {
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initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
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initrd_size = load_image_targphys(initrd_filename, initrd_base,
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ram_size - initrd_base);
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if (initrd_size < 0) {
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hw_error("qemu: could not load initial ram disk '%s'\n",
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initrd_filename);
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exit(1);
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}
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cmdline_base = round_page(initrd_base + initrd_size);
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} else {
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initrd_base = 0;
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initrd_size = 0;
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cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
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}
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ppc_boot_device = 'm';
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} else {
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kernel_base = 0;
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kernel_size = 0;
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initrd_base = 0;
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initrd_size = 0;
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ppc_boot_device = '\0';
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/* We consider that NewWorld PowerMac never have any floppy drive
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* For now, OHW cannot boot from the network.
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*/
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for (i = 0; boot_device[i] != '\0'; i++) {
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if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
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ppc_boot_device = boot_device[i];
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break;
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}
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}
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if (ppc_boot_device == '\0') {
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fprintf(stderr, "No valid boot device for Mac99 machine\n");
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exit(1);
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}
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}
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isa_mem_base = 0x80000000;
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/* Register 8 MB of ISA IO space */
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isa_mmio_init(0xf2000000, 0x00800000);
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/* UniN init */
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unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL,
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DEVICE_NATIVE_ENDIAN);
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cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
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openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
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openpic_irqs[0] =
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g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
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for (i = 0; i < smp_cpus; i++) {
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/* Mac99 IRQ connection between OpenPIC outputs pins
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* and PowerPC input pins
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*/
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switch (PPC_INPUT(env)) {
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case PPC_FLAGS_INPUT_6xx:
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openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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openpic_irqs[i][OPENPIC_OUTPUT_INT] =
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((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
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openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
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((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
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openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
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((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
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/* Not connected ? */
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openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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/* Check this */
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openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
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((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
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break;
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#if defined(TARGET_PPC64)
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case PPC_FLAGS_INPUT_970:
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openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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openpic_irqs[i][OPENPIC_OUTPUT_INT] =
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((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
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openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
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((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
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openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
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((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
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/* Not connected ? */
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openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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/* Check this */
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openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
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((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
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break;
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#endif /* defined(TARGET_PPC64) */
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default:
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hw_error("Bus model not supported on mac99 machine\n");
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exit(1);
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}
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}
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pic = openpic_init(NULL, &pic_mem, smp_cpus, openpic_irqs, NULL);
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if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
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/* 970 gets a U3 bus */
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pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
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machine_arch = ARCH_MAC99_U3;
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} else {
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pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
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machine_arch = ARCH_MAC99;
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}
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/* init basic PC hardware */
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pci_vga_init(pci_bus);
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escc_mem = escc_init(0x80013000, pic[0x25], pic[0x24],
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serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
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for(i = 0; i < nb_nics; i++)
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pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
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ide_drive_get(hd, MAX_IDE_BUS);
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dbdma = DBDMA_init(&dbdma_mem);
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/* We only emulate 2 out of 3 IDE controllers for now */
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ide_mem[0] = NULL;
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ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
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ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);
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/* cuda also initialize ADB */
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if (machine_arch == ARCH_MAC99_U3) {
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usb_enabled = 1;
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}
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cuda_init(&cuda_mem, pic[0x19]);
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adb_kbd_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem,
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dbdma_mem, cuda_mem, NULL, 3, ide_mem, escc_mem);
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if (usb_enabled) {
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usb_ohci_init_pci(pci_bus, -1);
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}
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/* U3 needs to use USB for input because Linux doesn't support via-cuda
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on PPC64 */
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if (machine_arch == ARCH_MAC99_U3) {
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usbdevice_create("keyboard");
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usbdevice_create("mouse");
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}
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if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
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graphic_depth = 15;
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/* The NewWorld NVRAM is not located in the MacIO device */
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nvr = macio_nvram_init(0x2000, 1);
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pmac_format_nvram_partition(nvr, 0x2000);
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macio_nvram_setup_bar(nvr, get_system_memory(), 0xFFF04000);
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/* No PCI init: the BIOS will do it */
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fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
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fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
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fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
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fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
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if (kernel_cmdline) {
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
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pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
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} else {
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
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}
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fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
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fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
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fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
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fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
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fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
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fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
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fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
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if (kvm_enabled()) {
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#ifdef CONFIG_KVM
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uint8_t *hypercall;
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fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
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hypercall = g_malloc(16);
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kvmppc_get_hypercall(env, hypercall, 16);
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fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
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fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
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#endif
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} else {
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fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
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}
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qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
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}
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static QEMUMachine core99_machine = {
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.name = "mac99",
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|
.desc = "Mac99 based PowerMAC",
|
|
.init = ppc_core99_init,
|
|
.max_cpus = MAX_CPUS,
|
|
#ifdef TARGET_PPC64
|
|
.is_default = 1,
|
|
#endif
|
|
};
|
|
|
|
static void core99_machine_init(void)
|
|
{
|
|
qemu_register_machine(&core99_machine);
|
|
}
|
|
|
|
machine_init(core99_machine_init);
|