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Commitdc99065b5f(v0.1.0) added dis-asm.h from binutils. Commit43d4145a98(v0.1.5) inlined bfd.h into dis-asm.h to remove the dependency on binutils. Commit76cad71136(v1.4.0) moved dis-asm.h to include/disas/bfd.h. The new name is confusing when you try to match against (pre GPLv3+) binutils. Rename it back. Keep it in the same directory, of course. Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190417191805.28198-17-armbru@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
361 lines
12 KiB
C
361 lines
12 KiB
C
/* Disassemble moxie instructions.
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Copyright (c) 2009 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/>. */
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#include "qemu/osdep.h"
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#define STATIC_TABLE
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#define DEFINE_TABLE
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#include "disas/dis-asm.h"
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static void *stream;
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/* Form 1 instructions come in different flavors:
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Some have no arguments (MOXIE_F1_NARG)
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Some only use the A operand (MOXIE_F1_A)
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Some use A and B registers (MOXIE_F1_AB)
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Some use A and consume a 4 byte immediate value (MOXIE_F1_A4)
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Some use just a 4 byte immediate value (MOXIE_F1_4)
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Some use just a 4 byte memory address (MOXIE_F1_M)
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Some use B and an indirect A (MOXIE_F1_AiB)
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Some use A and an indirect B (MOXIE_F1_ABi)
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Some consume a 4 byte immediate value and use X (MOXIE_F1_4A)
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Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4)
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Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4)
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Form 2 instructions also come in different flavors:
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Some have no arguments (MOXIE_F2_NARG)
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Some use the A register and an 8-bit value (MOXIE_F2_A8V)
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Form 3 instructions also come in different flavors:
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Some have no arguments (MOXIE_F3_NARG)
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Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */
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#define MOXIE_F1_NARG 0x100
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#define MOXIE_F1_A 0x101
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#define MOXIE_F1_AB 0x102
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/* #define MOXIE_F1_ABC 0x103 */
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#define MOXIE_F1_A4 0x104
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#define MOXIE_F1_4 0x105
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#define MOXIE_F1_AiB 0x106
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#define MOXIE_F1_ABi 0x107
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#define MOXIE_F1_4A 0x108
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#define MOXIE_F1_AiB4 0x109
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#define MOXIE_F1_ABi4 0x10a
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#define MOXIE_F1_M 0x10b
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#define MOXIE_F2_NARG 0x200
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#define MOXIE_F2_A8V 0x201
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#define MOXIE_F3_NARG 0x300
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#define MOXIE_F3_PCREL 0x301
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typedef struct moxie_opc_info_t {
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short opcode;
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unsigned itype;
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const char * name;
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} moxie_opc_info_t;
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extern const moxie_opc_info_t moxie_form1_opc_info[64];
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extern const moxie_opc_info_t moxie_form2_opc_info[4];
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extern const moxie_opc_info_t moxie_form3_opc_info[16];
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/* The moxie processor's 16-bit instructions come in two forms:
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FORM 1 instructions start with a 0 bit...
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0oooooooaaaabbbb
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0 F
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ooooooo - form 1 opcode number
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aaaa - operand A
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bbbb - operand B
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FORM 2 instructions start with bits "10"...
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10ooaaaavvvvvvvv
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0 F
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oo - form 2 opcode number
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aaaa - operand A
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vvvvvvvv - 8-bit immediate value
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FORM 3 instructions start with a bits "11"...
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11oooovvvvvvvvvv
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0 F
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oooo - form 3 opcode number
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vvvvvvvvvv - 10-bit immediate value. */
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const moxie_opc_info_t moxie_form1_opc_info[64] =
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{
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{ 0x00, MOXIE_F1_NARG, "nop" },
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{ 0x01, MOXIE_F1_A4, "ldi.l" },
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{ 0x02, MOXIE_F1_AB, "mov" },
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{ 0x03, MOXIE_F1_M, "jsra" },
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{ 0x04, MOXIE_F1_NARG, "ret" },
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{ 0x05, MOXIE_F1_AB, "add.l" },
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{ 0x06, MOXIE_F1_AB, "push" },
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{ 0x07, MOXIE_F1_AB, "pop" },
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{ 0x08, MOXIE_F1_A4, "lda.l" },
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{ 0x09, MOXIE_F1_4A, "sta.l" },
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{ 0x0a, MOXIE_F1_ABi, "ld.l" },
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{ 0x0b, MOXIE_F1_AiB, "st.l" },
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{ 0x0c, MOXIE_F1_ABi4, "ldo.l" },
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{ 0x0d, MOXIE_F1_AiB4, "sto.l" },
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{ 0x0e, MOXIE_F1_AB, "cmp" },
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{ 0x0f, MOXIE_F1_NARG, "bad" },
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{ 0x10, MOXIE_F1_NARG, "bad" },
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{ 0x11, MOXIE_F1_NARG, "bad" },
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{ 0x12, MOXIE_F1_NARG, "bad" },
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{ 0x13, MOXIE_F1_NARG, "bad" },
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{ 0x14, MOXIE_F1_NARG, "bad" },
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{ 0x15, MOXIE_F1_NARG, "bad" },
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{ 0x16, MOXIE_F1_NARG, "bad" },
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{ 0x17, MOXIE_F1_NARG, "bad" },
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{ 0x18, MOXIE_F1_NARG, "bad" },
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{ 0x19, MOXIE_F1_A, "jsr" },
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{ 0x1a, MOXIE_F1_M, "jmpa" },
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{ 0x1b, MOXIE_F1_A4, "ldi.b" },
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{ 0x1c, MOXIE_F1_ABi, "ld.b" },
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{ 0x1d, MOXIE_F1_A4, "lda.b" },
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{ 0x1e, MOXIE_F1_AiB, "st.b" },
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{ 0x1f, MOXIE_F1_4A, "sta.b" },
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{ 0x20, MOXIE_F1_A4, "ldi.s" },
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{ 0x21, MOXIE_F1_ABi, "ld.s" },
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{ 0x22, MOXIE_F1_A4, "lda.s" },
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{ 0x23, MOXIE_F1_AiB, "st.s" },
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{ 0x24, MOXIE_F1_4A, "sta.s" },
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{ 0x25, MOXIE_F1_A, "jmp" },
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{ 0x26, MOXIE_F1_AB, "and" },
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{ 0x27, MOXIE_F1_AB, "lshr" },
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{ 0x28, MOXIE_F1_AB, "ashl" },
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{ 0x29, MOXIE_F1_AB, "sub.l" },
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{ 0x2a, MOXIE_F1_AB, "neg" },
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{ 0x2b, MOXIE_F1_AB, "or" },
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{ 0x2c, MOXIE_F1_AB, "not" },
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{ 0x2d, MOXIE_F1_AB, "ashr" },
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{ 0x2e, MOXIE_F1_AB, "xor" },
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{ 0x2f, MOXIE_F1_AB, "mul.l" },
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{ 0x30, MOXIE_F1_4, "swi" },
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{ 0x31, MOXIE_F1_AB, "div.l" },
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{ 0x32, MOXIE_F1_AB, "udiv.l" },
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{ 0x33, MOXIE_F1_AB, "mod.l" },
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{ 0x34, MOXIE_F1_AB, "umod.l" },
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{ 0x35, MOXIE_F1_NARG, "brk" },
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{ 0x36, MOXIE_F1_ABi4, "ldo.b" },
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{ 0x37, MOXIE_F1_AiB4, "sto.b" },
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{ 0x38, MOXIE_F1_ABi4, "ldo.s" },
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{ 0x39, MOXIE_F1_AiB4, "sto.s" },
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{ 0x3a, MOXIE_F1_NARG, "bad" },
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{ 0x3b, MOXIE_F1_NARG, "bad" },
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{ 0x3c, MOXIE_F1_NARG, "bad" },
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{ 0x3d, MOXIE_F1_NARG, "bad" },
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{ 0x3e, MOXIE_F1_NARG, "bad" },
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{ 0x3f, MOXIE_F1_NARG, "bad" }
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};
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const moxie_opc_info_t moxie_form2_opc_info[4] =
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{
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{ 0x00, MOXIE_F2_A8V, "inc" },
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{ 0x01, MOXIE_F2_A8V, "dec" },
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{ 0x02, MOXIE_F2_A8V, "gsr" },
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{ 0x03, MOXIE_F2_A8V, "ssr" }
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};
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const moxie_opc_info_t moxie_form3_opc_info[16] =
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{
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{ 0x00, MOXIE_F3_PCREL,"beq" },
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{ 0x01, MOXIE_F3_PCREL,"bne" },
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{ 0x02, MOXIE_F3_PCREL,"blt" },
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{ 0x03, MOXIE_F3_PCREL,"bgt" },
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{ 0x04, MOXIE_F3_PCREL,"bltu" },
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{ 0x05, MOXIE_F3_PCREL,"bgtu" },
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{ 0x06, MOXIE_F3_PCREL,"bge" },
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{ 0x07, MOXIE_F3_PCREL,"ble" },
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{ 0x08, MOXIE_F3_PCREL,"bgeu" },
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{ 0x09, MOXIE_F3_PCREL,"bleu" },
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{ 0x0a, MOXIE_F3_NARG, "bad" },
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{ 0x0b, MOXIE_F3_NARG, "bad" },
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{ 0x0c, MOXIE_F3_NARG, "bad" },
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{ 0x0d, MOXIE_F3_NARG, "bad" },
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{ 0x0e, MOXIE_F3_NARG, "bad" },
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{ 0x0f, MOXIE_F3_NARG, "bad" }
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};
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/* Macros to extract operands from the instruction word. */
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#define OP_A(i) ((i >> 4) & 0xf)
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#define OP_B(i) (i & 0xf)
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#define INST2OFFSET(o) ((((signed short)((o & ((1<<10)-1))<<6))>>6)<<1)
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static const char * reg_names[16] =
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{ "$fp", "$sp", "$r0", "$r1", "$r2", "$r3", "$r4", "$r5",
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"$r6", "$r7", "$r8", "$r9", "$r10", "$r11", "$r12", "$r13" };
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int
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print_insn_moxie(bfd_vma addr, struct disassemble_info * info)
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{
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int length = 2;
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int status;
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stream = info->stream;
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const moxie_opc_info_t * opcode;
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bfd_byte buffer[4];
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unsigned short iword;
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fprintf_function fpr = info->fprintf_func;
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if ((status = info->read_memory_func(addr, buffer, 2, info)))
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goto fail;
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iword = (bfd_getb16(buffer) >> 16);
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/* Form 1 instructions have the high bit set to 0. */
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if ((iword & (1<<15)) == 0) {
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/* Extract the Form 1 opcode. */
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opcode = &moxie_form1_opc_info[iword >> 8];
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switch (opcode->itype) {
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case MOXIE_F1_NARG:
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fpr(stream, "%s", opcode->name);
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break;
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case MOXIE_F1_A:
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fpr(stream, "%s\t%s", opcode->name,
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reg_names[OP_A(iword)]);
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break;
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case MOXIE_F1_AB:
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fpr(stream, "%s\t%s, %s", opcode->name,
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reg_names[OP_A(iword)],
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reg_names[OP_B(iword)]);
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break;
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case MOXIE_F1_A4:
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{
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unsigned imm;
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if ((status = info->read_memory_func(addr + 2, buffer, 4, info)))
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goto fail;
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imm = bfd_getb32(buffer);
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fpr(stream, "%s\t%s, 0x%x", opcode->name,
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reg_names[OP_A(iword)], imm);
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length = 6;
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}
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break;
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case MOXIE_F1_4:
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{
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unsigned imm;
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if ((status = info->read_memory_func(addr + 2, buffer, 4, info)))
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goto fail;
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imm = bfd_getb32(buffer);
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fpr(stream, "%s\t0x%x", opcode->name, imm);
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length = 6;
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}
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break;
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case MOXIE_F1_M:
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{
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unsigned imm;
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if ((status = info->read_memory_func(addr + 2, buffer, 4, info)))
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goto fail;
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imm = bfd_getb32(buffer);
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fpr(stream, "%s\t", opcode->name);
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info->print_address_func((bfd_vma) imm, info);
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length = 6;
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}
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break;
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case MOXIE_F1_AiB:
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fpr (stream, "%s\t(%s), %s", opcode->name,
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reg_names[OP_A(iword)], reg_names[OP_B(iword)]);
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break;
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case MOXIE_F1_ABi:
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fpr(stream, "%s\t%s, (%s)", opcode->name,
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reg_names[OP_A(iword)], reg_names[OP_B(iword)]);
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break;
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case MOXIE_F1_4A:
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{
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unsigned imm;
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if ((status = info->read_memory_func(addr + 2, buffer, 4, info)))
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goto fail;
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imm = bfd_getb32(buffer);
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fpr(stream, "%s\t0x%x, %s",
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opcode->name, imm, reg_names[OP_A(iword)]);
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length = 6;
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}
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break;
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case MOXIE_F1_AiB4:
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{
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unsigned imm;
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if ((status = info->read_memory_func(addr+2, buffer, 4, info)))
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goto fail;
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imm = bfd_getb32(buffer);
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fpr(stream, "%s\t0x%x(%s), %s", opcode->name,
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imm,
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reg_names[OP_A(iword)],
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reg_names[OP_B(iword)]);
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length = 6;
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}
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break;
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case MOXIE_F1_ABi4:
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{
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unsigned imm;
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if ((status = info->read_memory_func(addr+2, buffer, 4, info)))
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goto fail;
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imm = bfd_getb32(buffer);
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fpr(stream, "%s\t%s, 0x%x(%s)",
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opcode->name,
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reg_names[OP_A(iword)],
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imm,
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reg_names[OP_B(iword)]);
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length = 6;
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}
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break;
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default:
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abort();
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}
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}
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else if ((iword & (1<<14)) == 0) {
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/* Extract the Form 2 opcode. */
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opcode = &moxie_form2_opc_info[(iword >> 12) & 3];
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switch (opcode->itype) {
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case MOXIE_F2_A8V:
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fpr(stream, "%s\t%s, 0x%x",
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opcode->name,
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reg_names[(iword >> 8) & 0xf],
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iword & ((1 << 8) - 1));
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break;
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case MOXIE_F2_NARG:
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fpr(stream, "%s", opcode->name);
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break;
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default:
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abort();
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}
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} else {
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/* Extract the Form 3 opcode. */
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opcode = &moxie_form3_opc_info[(iword >> 10) & 15];
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switch (opcode->itype) {
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case MOXIE_F3_PCREL:
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fpr(stream, "%s\t", opcode->name);
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info->print_address_func((bfd_vma) (addr + INST2OFFSET(iword) + 2),
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info);
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break;
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default:
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abort();
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}
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}
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return length;
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fail:
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info->memory_error_func(status, addr, info);
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return -1;
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}
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