Peter Maydell a65afaae0f x86 and machine queue, 2017-06-05 ... -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJZNam5AAoJECgHk2+YTcWmiNAP/1yGqibhujtVTviYpbHbVOBx wsHkeNOqb1WUXw0bfGw8RfGTlcuoBaeL7r88iwFL8G303g2OPiS1H/tcRuT7gfG0 YV3xdpGYMDFBu1JMV2VSnCqWXfa92EbPJ0vRLjxTD/heLmekVA7TUdiZVBf+S7hK fQLWqzZboV7RFDm6OUBQOxjCU8/WJ7ggShQJhItzBJTIZJA2C2iiO07v+U04Cwku Z0eoiwXTMnjDhvKLh8AE5jO3KLCrxGT6u9u9szXMwUtQUDX14X2U5PFCAB89mhUZ bYW3rRvpsU9eDMQVUo92Lej0e+47T0Mb4R7F9vjWsHwTI+VgcO+K0DXlYru0uKOJ XLoZVtGls3nRuJIDrMsICCkuveulGZs98YlVcjGjzdfJ748P6FpEQmL9v6WiExHi G8lu0tP2nW4n1DU+1p4EMQcKWueKuN/p7OhCWGGFvNDeGSvm1e8//TITmbtMZ2/E PizmCW5YQSGPOGg7fq4C3RhLfkQj4gsESe1lHdWsgSOZd9KYmJWg256BNInroky+ zb8XYts7/i2ogKtj8c9YV8jwvbiHjAYVcO4mr9GNFERO1FSdPbNKuVm2IldChLIt trI4vngvTIygTcURA7s+cOXFRAnznHrHYl+QH9XQJqI2Ay/+3nGYY+/EYFpCc0EW l2f/b2ZChRU/UlchdleG =0C6J -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging x86 and machine queue, 2017-06-05 # gpg: Signature made Mon 05 Jun 2017 19:58:01 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-and-machine-pull-request: scripts: Test script to look for -device crashes qemu.py: Add QEMUMachine.exitcode() method qemu.py: Don't set _popen=None on error/shutdown spapr: cleanup spapr_fixup_cpu_numa_dt() usage numa: move numa_node from CPUState into target specific classes numa: make hmp 'info numa' fetch numa nodes from qmp_query_cpus() result numa: make sure that all cpus have has_node_id set if numa is enabled numa: move default mapping init to machine numa: consolidate cpu_preplug fixups/checks for pc/arm/spapr pc: Use "min-[x]level" on compat_props Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2017-06-06 10:00:34 +01:00
..
arch_dump.c
arm_ldst.h	Fix Thumb-1 BE32 execution and disassembly.	2017-02-07 18:29:59 +00:00
arm-powerctl.c	target-arm/powerctl: defer cpu reset work to CPU context	2017-02-24 10:32:46 +00:00
arm-powerctl.h	target-arm/powerctl: defer cpu reset work to CPU context	2017-02-24 10:32:46 +00:00
arm-semi.c
cpu64.c	target-arm: Enable EL2 feature bit on A53 and A57	2017-01-20 11:15:10 +00:00
cpu-qom.h
cpu.c	x86 and machine queue, 2017-06-05	2017-06-06 10:00:34 +01:00
cpu.h	numa: move numa_node from CPUState into target specific classes	2017-06-05 14:59:09 -03:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c	target-arm: Use clrsb helper	2017-01-10 08:47:48 -08:00
helper-a64.h	target-arm: Use clrsb helper	2017-01-10 08:47:48 -08:00
helper.c	arm: Implement HFNMIENA support for M profile MPU	2017-06-02 11:51:49 +01:00
helper.h	target-arm: Use clz opcode	2017-01-10 08:06:11 -08:00
internals.h	arm: Move excnames[] array into arm_log_exceptions()	2017-04-20 17:39:17 +01:00
iwmmxt_helper.c
kvm32.c
kvm64.c	arm/kvm: Remove trailing newlines from error_report()	2017-04-20 17:39:17 +01:00
kvm_arm.h
kvm-consts.h	arm: add trailing ; after MISMATCH_CHECK	2017-02-01 03:37:18 +02:00
kvm-stub.c
kvm.c	KVM: do not use sigtimedwait to catch SIGBUS	2017-03-03 16:40:02 +01:00
machine.c	arm: add MPU support to M profile CPUs	2017-06-02 11:51:48 +01:00
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c	arm: Add support for M profile CPUs having different MMU index semantics	2017-06-02 11:51:47 +01:00
psci.c	shutdown: Add source information to SHUTDOWN and RESET	2017-05-23 13:28:17 +02:00
trace-events
translate-a64.c	target/aarch64: optimize indirect branches	2017-06-05 09:25:42 -07:00
translate.c	target/arm: optimize indirect branches	2017-06-05 09:25:42 -07:00
translate.h	target/arm: optimize indirect branches	2017-06-05 09:25:42 -07:00