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c6c0232000
EPC (Enclave Page Cahe) is a specialized type of memory used by Intel
SGX (Software Guard Extensions). The SDM desribes EPC as:
The Enclave Page Cache (EPC) is the secure storage used to store
enclave pages when they are a part of an executing enclave. For an
EPC page, hardware performs additional access control checks to
restrict access to the page. After the current page access checks
and translations are performed, the hardware checks that the EPC
page is accessible to the program currently executing. Generally an
EPC page is only accessed by the owner of the executing enclave or
an instruction which is setting up an EPC page.
Because of its unique requirements, Linux manages EPC separately from
normal memory. Similar to memfd, the device /dev/sgx_vepc can be
opened to obtain a file descriptor which can in turn be used to mmap()
EPC memory.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-3-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
83 lines
2.1 KiB
C
83 lines
2.1 KiB
C
/*
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* QEMU host SGX EPC memory backend
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*
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* Copyright (C) 2019 Intel Corporation
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*
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* Authors:
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* Sean Christopherson <sean.j.christopherson@intel.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include <sys/ioctl.h>
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "qom/object_interfaces.h"
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#include "qapi/error.h"
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#include "sysemu/hostmem.h"
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#include "hw/i386/hostmem-epc.h"
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static void
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sgx_epc_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
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{
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uint32_t ram_flags;
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char *name;
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int fd;
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if (!backend->size) {
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error_setg(errp, "can't create backend with size 0");
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return;
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}
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fd = qemu_open_old("/dev/sgx_vepc", O_RDWR);
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if (fd < 0) {
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error_setg_errno(errp, errno,
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"failed to open /dev/sgx_vepc to alloc SGX EPC");
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return;
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}
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name = object_get_canonical_path(OBJECT(backend));
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ram_flags = (backend->share ? RAM_SHARED : 0) | RAM_PROTECTED;
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memory_region_init_ram_from_fd(&backend->mr, OBJECT(backend),
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name, backend->size, ram_flags,
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fd, 0, errp);
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g_free(name);
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}
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static void sgx_epc_backend_instance_init(Object *obj)
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{
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HostMemoryBackend *m = MEMORY_BACKEND(obj);
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m->share = true;
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m->merge = false;
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m->dump = false;
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}
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static void sgx_epc_backend_class_init(ObjectClass *oc, void *data)
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{
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HostMemoryBackendClass *bc = MEMORY_BACKEND_CLASS(oc);
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bc->alloc = sgx_epc_backend_memory_alloc;
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}
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static const TypeInfo sgx_epc_backed_info = {
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.name = TYPE_MEMORY_BACKEND_EPC,
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.parent = TYPE_MEMORY_BACKEND,
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.instance_init = sgx_epc_backend_instance_init,
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.class_init = sgx_epc_backend_class_init,
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.instance_size = sizeof(HostMemoryBackendEpc),
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};
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static void register_types(void)
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{
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int fd = qemu_open_old("/dev/sgx_vepc", O_RDWR);
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if (fd >= 0) {
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close(fd);
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type_register_static(&sgx_epc_backed_info);
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}
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}
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type_init(register_types);
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