Richard Henderson 220f508f49 target/arm: Update MSR access for PAN ... For aarch64, there's a dedicated msr (imm, reg) insn. For aarch32, this is done via msr to cpsr. Writes from el0 are ignored, which is already handled by the CPSR_USER mask. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200208125816.14954-12-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2020-02-13 14:14:54 +00:00
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alpha	tcg: Search includes from the project root source directory	2020-01-15 15:13:10 -10:00
arm	target/arm: Update MSR access for PAN	2020-02-13 14:14:54 +00:00
cris	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
hppa	target/hppa: Allow, but diagnose, LDCW aligned only mod 4	2020-01-27 10:49:51 -08:00
i386	target/i386: Add the 'model-id' for Skylake -v3 CPU models	2020-01-24 20:59:17 +01:00
lm32	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
m68k	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
microblaze	qdev: set properties with device_class_set_props()	2020-01-24 20:59:15 +01:00
mips	target/mips: Separate FPU-related helpers into their own file	2020-02-04 08:53:54 +01:00
moxie	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
nios2	qdev: set properties with device_class_set_props()	2020-01-24 20:59:15 +01:00
openrisc	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
ppc	target/ppc: Use probe_write for DCBZ	2020-02-03 11:33:11 +11:00
riscv	* Register qdev properties as class properties (Marc-André)	2020-01-27 09:44:04 +00:00
s390x	s390x: sigp: Fix sense running reporting	2020-01-27 12:13:10 +01:00
sh4	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
sparc	qdev: set properties with device_class_set_props()	2020-01-24 20:59:15 +01:00
tilegx	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
tricore	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
unicore32	tcg: Search includes from the project root source directory	2020-01-15 15:13:10 -10:00
xtensa	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00