mirror of
https://github.com/qemu/qemu.git
synced 2024-12-14 15:03:33 +08:00
e7e741ca9d
The Aspeed SMC Controller can operate in different modes : Read, Fast
Read, Write and User modes. When the User mode is configured, it
selects automatically the SPI slave device until the CE_STOP_ACTIVE
bit is set to 1. When any other modes are configured the device is
unselected. The HW logic handles the chip select automatically when
the flash is accessed through its AHB window.
When configuring the CEx Control Register, the User mode logic to
select and unselect the slave is incorrect and data corruption can be
seen on machines using two chips, witherspoon and romulus.
Rework the handler setting the CEx Control Register to fix this issue.
Fixes:
|
||
---|---|---|
.. | ||
aspeed_smc.c | ||
imx_spi.c | ||
Kconfig | ||
Makefile.objs | ||
mss-spi.c | ||
omap_spi.c | ||
pl022.c | ||
ssi.c | ||
stm32f2xx_spi.c | ||
trace-events | ||
xilinx_spi.c | ||
xilinx_spips.c |