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145e2198d7
GT64120's PCI endianness swapping works on little-endian hosts, but doesn't on big-endian ones. Instead of complicating how CFGADDR/CFGDATA registers deal with endianness, use the existing MemoryRegionOps from hw/pci/pci_host.c. Doing so also reduce the access to internal PCI_HOST_BRIDGE fields. Map the PCI_HOST_BRIDGE MemoryRegionOps into the corresponding CFGADDR/CFGDATA regions in the ISD MMIO and remove the unused code in the current ISD read/write handlers. Update the mapping when PCI0_CMD register is accessed (in case the endianness is changed). This allows using the GT64120 on a big-endian host (and boot the MIPS Malta machine in little-endian). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230104133935.4639-6-philmd@linaro.org> |
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| .. | ||
| bootloader.c | ||
| boston.c | ||
| cps.c | ||
| fuloong2e.c | ||
| fw_cfg.c | ||
| fw_cfg.h | ||
| gt64xxx_pci.c | ||
| jazz.c | ||
| Kconfig | ||
| loongson3_bootp.c | ||
| loongson3_bootp.h | ||
| loongson3_virt.c | ||
| malta.c | ||
| meson.build | ||
| mips_int.c | ||
| mipssim.c | ||
| trace-events | ||
| trace.h | ||