bellard 10f0e412f8 combine PDE and PTE protections as in intel specs - added cpu_get_phys_page_debug() ... git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@584 c046a42c-6fe2-441c-8c8c-71466251a162		2004-01-24 15:29:03 +00:00
..
cpu.h	added TARGET_LONG_BITS	2004-01-24 15:19:09 +00:00
exec.h	correct zero segment values when coming from VM86 mode - cache infos in CPUID - simpler exception handling in load_seg() - validate segments after lret/iret	2004-01-04 15:18:37 +00:00
helper2.c	combine PDE and PTE protections as in intel specs - added cpu_get_phys_page_debug()	2004-01-24 15:29:03 +00:00
helper.c	interrupt to conforming segment fix (QNX boot fix)	2004-01-19 23:46:39 +00:00
op.c	correct NT flag behavior	2004-01-24 15:27:58 +00:00
opreg_template.h	cmov fix (bug on PowerPC)	2003-10-30 01:05:49 +00:00
ops_mem.h	added stx_T1_A0 micro ops	2004-01-04 17:28:06 +00:00
ops_template_mem.h	fixed potential exception pb on cmpxchg	2004-01-18 21:44:40 +00:00
ops_template.h	comments fix	2004-01-18 21:43:36 +00:00
translate.c	L4 fix for rep nop (should handle all cases)	2004-01-19 20:31:37 +00:00