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The AST2600 timer replaces control register 2 with a interrupt status register. It is set by hardware when an IRQ occurs and cleared by software. Modify the vmstate version to take into account the new fields. Based on previous work from Joel Stanley. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190925143248.10000-8-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
82 lines
2.4 KiB
C
82 lines
2.4 KiB
C
/*
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* ASPEED AST2400 Timer
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*
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* Andrew Jeffery <andrew@aj.id.au>
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*
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* Copyright (C) 2016 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef ASPEED_TIMER_H
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#define ASPEED_TIMER_H
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#include "qemu/timer.h"
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#include "hw/misc/aspeed_scu.h"
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#define ASPEED_TIMER(obj) \
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OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER);
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#define TYPE_ASPEED_TIMER "aspeed.timer"
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#define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400"
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#define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500"
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#define TYPE_ASPEED_2600_TIMER TYPE_ASPEED_TIMER "-ast2600"
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#define ASPEED_TIMER_NR_TIMERS 8
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typedef struct AspeedTimer {
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qemu_irq irq;
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uint8_t id;
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QEMUTimer timer;
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/**
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* Track the line level as the ASPEED timers implement edge triggered
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* interrupts, signalling with both the rising and falling edge.
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*/
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int32_t level;
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uint32_t reload;
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uint32_t match[2];
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uint64_t start;
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} AspeedTimer;
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typedef struct AspeedTimerCtrlState {
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/*< private >*/
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SysBusDevice parent;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t ctrl;
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uint32_t ctrl2;
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uint32_t ctrl3;
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uint32_t irq_sts;
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AspeedTimer timers[ASPEED_TIMER_NR_TIMERS];
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AspeedSCUState *scu;
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} AspeedTimerCtrlState;
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#define ASPEED_TIMER_CLASS(klass) \
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OBJECT_CLASS_CHECK(AspeedTimerClass, (klass), TYPE_ASPEED_TIMER)
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#define ASPEED_TIMER_GET_CLASS(obj) \
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OBJECT_GET_CLASS(AspeedTimerClass, (obj), TYPE_ASPEED_TIMER)
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typedef struct AspeedTimerClass {
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SysBusDeviceClass parent_class;
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uint64_t (*read)(AspeedTimerCtrlState *s, hwaddr offset);
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void (*write)(AspeedTimerCtrlState *s, hwaddr offset, uint64_t value);
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} AspeedTimerClass;
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#endif /* ASPEED_TIMER_H */
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