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04369ff2f5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@36 c046a42c-6fe2-441c-8c8c-71466251a162
316 lines
7.9 KiB
C
316 lines
7.9 KiB
C
/*
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* i386 emulator main execution loop
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "exec-i386.h"
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//#define DEBUG_EXEC
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#define DEBUG_FLUSH
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/* main execution loop */
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/* maximum total translate dcode allocated */
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#define CODE_GEN_BUFFER_SIZE (2048 * 1024)
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//#define CODE_GEN_BUFFER_SIZE (128 * 1024)
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#define CODE_GEN_MAX_SIZE 65536
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#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
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/* threshold to flush the translated code buffer */
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#define CODE_GEN_BUFFER_MAX_SIZE (CODE_GEN_BUFFER_SIZE - CODE_GEN_MAX_SIZE)
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#define CODE_GEN_MAX_BLOCKS (CODE_GEN_BUFFER_SIZE / 64)
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#define CODE_GEN_HASH_BITS 15
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#define CODE_GEN_HASH_SIZE (1 << CODE_GEN_HASH_BITS)
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typedef struct TranslationBlock {
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unsigned long pc; /* simulated PC corresponding to this block */
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unsigned int flags; /* flags defining in which context the code was generated */
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uint8_t *tc_ptr; /* pointer to the translated code */
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struct TranslationBlock *hash_next; /* next matching block */
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} TranslationBlock;
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TranslationBlock tbs[CODE_GEN_MAX_BLOCKS];
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TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
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int nb_tbs;
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uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
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uint8_t *code_gen_ptr;
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#ifdef DEBUG_EXEC
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static const char *cc_op_str[] = {
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"DYNAMIC",
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"EFLAGS",
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"MUL",
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"ADDB",
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"ADDW",
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"ADDL",
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"ADCB",
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"ADCW",
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"ADCL",
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"SUBB",
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"SUBW",
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"SUBL",
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"SBBB",
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"SBBW",
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"SBBL",
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"LOGICB",
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"LOGICW",
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"LOGICL",
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"INCB",
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"INCW",
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"INCL",
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"DECB",
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"DECW",
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"DECL",
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"SHLB",
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"SHLW",
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"SHLL",
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"SARB",
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"SARW",
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"SARL",
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};
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static void cpu_x86_dump_state(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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eflags |= (DF & DIRECTION_FLAG);
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fprintf(logfile,
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"EAX=%08x EBX=%08X ECX=%08x EDX=%08x\n"
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"ESI=%08x EDI=%08X EBP=%08x ESP=%08x\n"
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"CCS=%08x CCD=%08x CCO=%-8s EFL=%c%c%c%c%c%c%c\n",
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env->regs[R_EAX], env->regs[R_EBX], env->regs[R_ECX], env->regs[R_EDX],
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env->regs[R_ESI], env->regs[R_EDI], env->regs[R_EBP], env->regs[R_ESP],
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env->cc_src, env->cc_dst, cc_op_str[env->cc_op],
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eflags & DIRECTION_FLAG ? 'D' : '-',
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eflags & CC_O ? 'O' : '-',
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eflags & CC_S ? 'S' : '-',
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eflags & CC_Z ? 'Z' : '-',
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eflags & CC_A ? 'A' : '-',
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eflags & CC_P ? 'P' : '-',
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eflags & CC_C ? 'C' : '-'
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);
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#if 1
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fprintf(logfile, "ST0=%f ST1=%f ST2=%f ST3=%f\n",
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(double)ST0, (double)ST1, (double)ST(2), (double)ST(3));
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#endif
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}
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#endif
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void cpu_x86_tblocks_init(void)
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{
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if (!code_gen_ptr) {
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code_gen_ptr = code_gen_buffer;
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}
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}
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/* flush all the translation blocks */
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static void tb_flush(void)
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{
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int i;
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#ifdef DEBUG_FLUSH
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printf("gemu: flush code_size=%d nb_tbs=%d avg_tb_size=%d\n",
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code_gen_ptr - code_gen_buffer,
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nb_tbs,
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(code_gen_ptr - code_gen_buffer) / nb_tbs);
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#endif
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nb_tbs = 0;
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for(i = 0;i < CODE_GEN_HASH_SIZE; i++)
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tb_hash[i] = NULL;
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code_gen_ptr = code_gen_buffer;
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/* XXX: flush processor icache at this point */
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}
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/* find a translation block in the translation cache. If not found,
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allocate a new one */
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static inline TranslationBlock *tb_find_and_alloc(unsigned long pc,
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unsigned int flags)
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{
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TranslationBlock **ptb, *tb;
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unsigned int h;
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h = pc & (CODE_GEN_HASH_SIZE - 1);
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ptb = &tb_hash[h];
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for(;;) {
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tb = *ptb;
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if (!tb)
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break;
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if (tb->pc == pc && tb->flags == flags)
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return tb;
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ptb = &tb->hash_next;
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}
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if (nb_tbs >= CODE_GEN_MAX_BLOCKS ||
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(code_gen_ptr - code_gen_buffer) >= CODE_GEN_BUFFER_MAX_SIZE)
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tb_flush();
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tb = &tbs[nb_tbs++];
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*ptb = tb;
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tb->pc = pc;
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tb->flags = flags;
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tb->tc_ptr = NULL;
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tb->hash_next = NULL;
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return tb;
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}
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int cpu_x86_exec(CPUX86State *env1)
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{
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int saved_T0, saved_T1, saved_A0;
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CPUX86State *saved_env;
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#ifdef reg_EAX
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int saved_EAX;
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#endif
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#ifdef reg_ECX
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int saved_ECX;
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#endif
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#ifdef reg_EDX
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int saved_EDX;
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#endif
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#ifdef reg_EBX
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int saved_EBX;
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#endif
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#ifdef reg_ESP
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int saved_ESP;
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#endif
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#ifdef reg_EBP
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int saved_EBP;
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#endif
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#ifdef reg_ESI
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int saved_ESI;
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#endif
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#ifdef reg_EDI
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int saved_EDI;
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#endif
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int code_gen_size, ret;
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void (*gen_func)(void);
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TranslationBlock *tb;
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uint8_t *tc_ptr;
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unsigned int flags;
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/* first we save global registers */
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saved_T0 = T0;
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saved_T1 = T1;
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saved_A0 = A0;
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saved_env = env;
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env = env1;
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#ifdef reg_EAX
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saved_EAX = EAX;
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EAX = env->regs[R_EAX];
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#endif
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#ifdef reg_ECX
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saved_ECX = ECX;
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ECX = env->regs[R_ECX];
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#endif
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#ifdef reg_EDX
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saved_EDX = EDX;
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EDX = env->regs[R_EDX];
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#endif
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#ifdef reg_EBX
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saved_EBX = EBX;
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EBX = env->regs[R_EBX];
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#endif
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#ifdef reg_ESP
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saved_ESP = ESP;
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ESP = env->regs[R_ESP];
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#endif
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#ifdef reg_EBP
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saved_EBP = EBP;
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EBP = env->regs[R_EBP];
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#endif
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#ifdef reg_ESI
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saved_ESI = ESI;
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ESI = env->regs[R_ESI];
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#endif
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#ifdef reg_EDI
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saved_EDI = EDI;
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EDI = env->regs[R_EDI];
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#endif
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/* prepare setjmp context for exception handling */
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if (setjmp(env->jmp_env) == 0) {
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for(;;) {
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#ifdef DEBUG_EXEC
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if (loglevel) {
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cpu_x86_dump_state();
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}
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#endif
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/* we compute the CPU state. We assume it will not
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change during the whole generated block. */
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flags = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT;
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flags |= (((unsigned long)env->seg_cache[R_DS].base |
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(unsigned long)env->seg_cache[R_ES].base |
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(unsigned long)env->seg_cache[R_SS].base) != 0) <<
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GEN_FLAG_ADDSEG_SHIFT;
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tb = tb_find_and_alloc((unsigned long)env->pc, flags);
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tc_ptr = tb->tc_ptr;
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if (!tb->tc_ptr) {
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/* if no translated code available, then translate it now */
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tc_ptr = code_gen_ptr;
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cpu_x86_gen_code(code_gen_ptr, CODE_GEN_MAX_SIZE,
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&code_gen_size, (uint8_t *)env->pc, flags);
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tb->tc_ptr = tc_ptr;
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code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
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}
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/* execute the generated code */
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gen_func = (void *)tc_ptr;
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gen_func();
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}
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}
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ret = env->exception_index;
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/* restore global registers */
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#ifdef reg_EAX
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EAX = saved_EAX;
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#endif
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#ifdef reg_ECX
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ECX = saved_ECX;
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#endif
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#ifdef reg_EDX
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EDX = saved_EDX;
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#endif
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#ifdef reg_EBX
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EBX = saved_EBX;
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#endif
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#ifdef reg_ESP
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ESP = saved_ESP;
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#endif
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#ifdef reg_EBP
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EBP = saved_EBP;
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#endif
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#ifdef reg_ESI
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ESI = saved_ESI;
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#endif
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#ifdef reg_EDI
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EDI = saved_EDI;
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#endif
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T0 = saved_T0;
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T1 = saved_T1;
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A0 = saved_A0;
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env = saved_env;
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return ret;
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}
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void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
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{
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CPUX86State *saved_env;
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saved_env = env;
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env = s;
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load_seg(seg_reg, selector);
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env = saved_env;
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}
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