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524 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Isaku Yamahata
|
7b630d937a |
qtest/acpi/bios-tables-test: update acpi tables
update golden master acpi tables and empty bios-tables-test-allowed-diff.h. Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <de5a7f88563d39ed0cec34ff1d4cd6a1bdc927f0.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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|
Isaku Yamahata
|
9a70e04359 |
acpi: add test case for -no-hpet
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <5ef9a81e49793afb42ffd19bbf1f44e269c65e93.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Isaku Yamahata
|
0dabb2e802 |
acpi: add test case for smm unsupported -machine smm=off
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <22f774a51255af1608b07b00b257af426adcf4ab.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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|
Isaku Yamahata
|
7995d9a399 |
qtest: update tests/qtest/bios-tables-test-allowed-diff.h
The following tests will modify acpi tables. prepare qtests to allow acpi table change. add new tables for new tests. - tests/data/acpi/pc/DSDT.nohpet - tests/data/acpi/pc/FACP.nosmm - tests/data/acpi/q35/DSDT.nohpet - tests/data/acpi/q35/FACP.nosmm Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <c8285f54deab362ed839d31f0fb5bb590ab71fdd.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Xingang Wang
|
2182e4058c |
tests/data/acpi/virt/DSDT.pxb: update with _CCA
Update expected DSDT files accordingly, and re-enable their testing.
diff of disassembly of changed expected files:
diff -ru -IDisassembly old/tests/data/acpi/virt/DSDT.pxb.dsl new/tests/data/acpi/virt/DSDT.pxb.dsl
--- old/tests/data/acpi/virt/DSDT.pxb.dsl 2021-02-23 09:54:18.566781350 -0500
+++ new/tests/data/acpi/virt/DSDT.pxb.dsl 2021-02-23 09:57:51.952816428 -0500
Name (_BBN, 0x80) // _BBN: BIOS Bus Number
Name (_UID, 0x80) // _UID: Unique ID
Name (_STR, Unicode ("pxb Device")) // _STR: Description String
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
{
Package (0x04)
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
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Xingang Wang
|
451730cfe4 |
acpi: Allow pxb DSDT acpi table changes
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1612490205-48788-2-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> |
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Thomas Huth
|
45d10d724b |
tests/qtest/boot-sector: Check that the guest did not panic
The s390-ccw bios code panics if it can not boot successfully. In this case, it does not make sense that we wait the full 600 seconds for the boot sector test to finish and can signal the failure immediately, thus let's check the status of the guest with the "query-status" QMP command here, too. Reported-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210212113141.854871-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Philippe Mathieu-Daudé
|
421954f43b |
tests/qtest/boot-serial-test: Test Virt machine with 'max'
When using KVM, using a specific cpu type will only work if the host CPU really is that exact CPU type. During testing we can simply use the 'max' CPU which will select all the features available from the host. This allow running this test on a Cavium CN8890 (ThunderX cores). Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210205144345.2068758-4-f4bug@amsat.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
|
f0f75dc174 |
* HVF fixes
* Extra qos-test debugging output (Christian) * SEV secret address autodetection (James) * SEV-ES support (Thomas) * Relocatable paths bugfix (Stefan) * RR fix (Pavel) * EventNotifier fix (Greg) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmAr778UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNVLwf/V3lb/HbyqFkhacB9eqEsEXGC3Hdp hU4J11P3lGS84muByxCdfw1axCGZ5x2cJmJSE71LfCcHXxEQSx4FmfxX5xeKbp1n vHPJ1XKhsFkOYA2O6mCW4yynTfizmp+JK36wwjmG3BEXTMMC5o2V8gAnzkP1sT9l 0h454CtPq2lD0upgVIvI7AStpWXZwysh0hQEDk8TsIfFfzLNs+MJyvlPGn4pj+kN k+G3475FinPdncIBGsnRNMfiBmA4/L0L4lriQzZPV57lDfZ8sJkrmh1+/JfK6vsb FWIe6Suior6JGorzATbXrFhmNJ+FxNNEmlzSdqRxRz7CDv0SDZb7Ckv37Q== =FDIr -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * HVF fixes * Extra qos-test debugging output (Christian) * SEV secret address autodetection (James) * SEV-ES support (Thomas) * Relocatable paths bugfix (Stefan) * RR fix (Pavel) * EventNotifier fix (Greg) # gpg: Signature made Tue 16 Feb 2021 16:15:59 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (21 commits) replay: fix icount request when replaying clock access event_notifier: Set ->initialized earlier in event_notifier_init() hvf: Fetch cr4 before evaluating CPUID(1) target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT hvf: x86: Remove unused definitions target/i386/hvf: add vmware-cpuid-freq cpu feature hvf: Guard xgetbv call util/cutils: Skip "." when looking for next directory component tests/qtest/qos-test: dump QEMU command if verbose tests/qtest/qos-test: dump environment variables if verbose tests/qtest/qos-test: dump qos graph if verbose libqos/qgraph_internal: add qos_printf() and qos_printf_literal() libqos/qgraph: add qos_node_create_driver_named() sev/i386: Enable an SEV-ES guest based on SEV policy kvm/i386: Use a per-VM check for SMM capability sev/i386: Don't allow a system reset under an SEV-ES guest sev/i386: Allow AP booting under SEV-ES sev/i386: Require in-kernel irqchip support for SEV-ES guests sev/i386: Add initial support for SEV-ES sev: update sev-inject-launch-secret to make gpa optional ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
Christian Schoenebeck
|
b0019c995e |
tests/qtest/qos-test: dump QEMU command if verbose
If qtests are run in verbose mode (i.e. if --verbose CL argument was provided) then print the assembled qemu command line for each test. Use qos_printf() instead of g_test_message() to avoid the latter cluttering the output. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <110bef3595cb841dfa1b86733c174ac9774eb37e.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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|
Christian Schoenebeck
|
093360dc32 |
tests/qtest/qos-test: dump environment variables if verbose
If qtests are run in verbose mode (i.e. if --verbose CL argument was provided) then print all environment variables to stdout before running the individual tests. It is common nowadays, at least being able to output all config vectors in a build chain, especially if it is required to investigate build- and test-issues on foreign/remote machines, which includes environment variables. In the context of writing new test cases this is also useful for finding out whether there are already some existing options for common questions like is there a preferred location for writing test files to? Is there a maximum size for test data? Is there a deadline for running tests? Use qos_printf() instead of g_test_message() to avoid the latter cluttering the output. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <21d77b33c578d80b5bba1068e61fd3562958b3c2.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Christian Schoenebeck
|
83ff78e567 |
tests/qtest/qos-test: dump qos graph if verbose
If qtests were run in verbose mode (i.e. if --verbose CL argument was provided) then dump the generated qos graph (all nodes and edges, along with their current individual availability status) to stdout, which allows to identify problems in the created qos graph e.g. when writing new qos tests. See API doc comment on function qos_dump_graph() for details. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <6bffb6e38589fb2c06a2c1b5deed33f3e710fed1.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Christian Schoenebeck
|
23820025af |
libqos/qgraph_internal: add qos_printf() and qos_printf_literal()
These two are macros wrapping regular printf() call. They are intended to be used instead of calling printf() directly in order to avoid breaking TAP output format. TAP output format is enabled by using --tap command line argument. Starting with glib 2.62 it is enabled by default. Unfortunately there is currently no public glib API available to check whether TAP output format is enabled. For that reason qos_printf() simply always prepends a '#' character for now. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <653a5ef61c5e7d160e4d6294e542c57ea324cee4.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Christian Schoenebeck
|
f6a2c6eee7 |
libqos/qgraph: add qos_node_create_driver_named()
So far the qos subsystem of the qtest framework had the limitation that only one instance of the same official QEMU (QMP) driver name could be created for qtests. That's because a) the created qos node names must always be unique, b) the node name must match the official QEMU driver name being instantiated and c) all nodes are in a global space shared by all tests. This patch removes this limitation by introducing a new function qos_node_create_driver_named() which allows test case authors to specify a node name being different from the actual associated QEMU driver name. It fills the new 'qemu_name' field of QOSGraphNode for that purpose. Adjust build_driver_cmd_line() and qos_graph_node_set_availability() to correctly deal with either accessing node name vs. node's qemu_name correctly. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <3be962ff38f3396f8040deaa5ffdab525c4e0b16.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
Hao Wu
|
6b6e7570d6 |
hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode
This patch implements the FIFO mode of the SMBus module. In FIFO, the user transmits or receives at most 16 bytes at a time. The FIFO mode allows the module to transmit large amount of data faster than single byte mode. Since we only added the device in a patch that is only a few commits away in the same patch set. We do not increase the VMstate version number in this special case. Reviewed-by: Doug Evans<dje@google.com> Reviewed-by: Tyrong Ting<kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Corey Minyard <cminyard@mvista.com> Message-id: 20210210220426.3577804-6-wuhaotsh@google.com Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Hao Wu
|
d986bf729c |
hw/i2c: Add a QTest for NPCM7XX SMBus Device
This patch adds a QTest for NPCM7XX SMBus's single byte mode. It sends a byte to a device in the evaluation board, and verify the retrieved value is equivalent to the sent value. Reviewed-by: Doug Evans<dje@google.com> Reviewed-by: Tyrong Ting<kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210210220426.3577804-5-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Alexander Bulekov
|
fff7111fb9 |
fuzz: add virtio-9p configurations for fuzzing
virtio-9p devices are often used to expose a virtual-filesystem to the guest. There have been some bugs reported in this device, such as CVE-2018-19364, and CVE-2021-20181. We should fuzz this device This patch adds two virtio-9p configurations: * One with the widely used -fsdev local driver. This driver leaks some state in the form of files/directories created in the shared dir. * One with the synth driver. While it is not used in the real world, this driver won't leak leak state between fuzz inputs. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210117230924.449676-4-alxndr@bu.edu> |
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Alexander Bulekov
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8630b43f11 |
fuzz: enable dynamic args for generic-fuzz configs
For some device configurations, it is useful to configure some resources, and adjust QEMU arguments at runtime, prior to fuzzing. This patch adds an "argfunc" to generic the generic_fuzz_config. When specified, it is responsible for configuring the resources and returning a string containing the corresponding QEMU arguments. This can be useful for targets that rely on e.g.: * a temporary qcow2 image * a temporary directory * an unused TCP port used to bind the VNC server Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210117230924.449676-2-alxndr@bu.edu> |
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Alexander Bulekov
|
61f90e0461 |
fuzz: log the arguments used to initialize QEMU
This is useful for building reproducers. Instead checking the code or the QEMU_FUZZ_ARGS, the arguments are at the top of the crash log. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210117201014.271610-3-alxndr@bu.edu> |
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Alexander Bulekov
|
d54d9b1d12 |
fuzz: refine the ide/ahci fuzzer configs
Disks work differently depending on the x86 machine type (SATA vs PATA). Additionally, we should fuzz the atapi code paths, which might contain vulnerabilities such as CVE-2020-29443. This patch adds hard-disk and cdrom generic-fuzzer configs for both the pc (PATA) and q35 (SATA) machine types. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210120152211.109782-1-alxndr@bu.edu> |
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Alexander Bulekov
|
fc1c8344e6 |
fuzz: ignore address_space_map is_write flag
We passed an is_write flag to the fuzz_dma_read_cb function to differentiate between the mapped DMA regions that need to be populated with fuzzed data, and those that don't. We simply passed through the address_space_map is_write parameter. The goal was to cut down on unnecessarily populating mapped DMA regions, when they are not read from. Unfortunately, nothing precludes code from reading from regions mapped with is_write=true. For example, see: https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg04729.html This patch removes the is_write parameter to fuzz_dma_read_cb. As a result, we will fill all mapped DMA regions with fuzzed data, ignoring the specified transfer direction. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210120060255.558535-1-alxndr@bu.edu> |
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Marian Postevca
|
277a582bf8 |
tests/acpi: disallow updates for expected data files
Signed-off-by: Marian Postevca <posteuca@mutex.one> Message-Id: <20210119003216.17637-6-posteuca@mutex.one> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Marian Postevca
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4b1f88820f |
tests/acpi: add OEM ID and OEM TABLE ID test
Add support for testing the fields OEM ID and
OEM TABLE ID in all ACPI tables for PC,Q35,MICROVM,AARCH64
Full diff of changed files disassembly:
Table tests/data/acpi/virt/FACP diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-VQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-BQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-QQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-OQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-EMIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-RMIIX0, Mon Jan 18 23:55:00 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0x60
+ * Checksum 0x0F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/FACP.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-JROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-2ROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-WROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-YOOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-TOOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SRAT.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SRAT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-LPOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 0000006A
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : AB
+[009h 0009 1] Checksum : 65
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.numamem diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-HPOMX0, Mon Jan 18 23:55:27 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0x60
+ * Checksum 0x0F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/FACP.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-OERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-BERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-8DRTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-IN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SRAT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SRAT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 000000E2
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 5C
+[009h 0009 1] Checksum : 16
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SLIT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SLIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-CN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SLIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SLIT" [System Locality Information Table]
[004h 0004 4] Table Length : 00000030
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 2C
+[009h 0009 1] Checksum : E8
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSLIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SSDT.memhp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/SSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-9M6NX0, Mon Jan 18 23:55:41 2021
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000002E0 (736)
* Revision 0x01
- * Checksum 0x3F
+ * Checksum 0xFF
* OEM ID "BOCHS "
- * OEM Table ID "NVDIMM"
+ * OEM Table ID "NVDIMM "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/NFIT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/NFIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-6M6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [NFIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table]
[004h 0004 4] Table Length : 000000E0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D1
+[009h 0009 1] Checksum : 82
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCNFIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.memhp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-3M6NX0, Mon Jan 18 23:55:41 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000019A5 (6565)
* Revision 0x02
- * Checksum 0x90
+ * Checksum 0x3F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
External (_SB_.NVDR, UnknownObj)
Table tests/data/acpi/virt/FACP.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-206LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-E16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-J16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-N16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-B16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.pxb diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-G16LX0, Mon Jan 18 23:55:52 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001E09 (7689)
* Revision 0x02
- * Checksum 0x30
+ * Checksum 0xDF
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/pc/HPET diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-QNVAX0, Mon Jan 18 23:58:53 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-NNVAX0, Mon Jan 18 23:58:53 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/FACP.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-MB7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3C7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-0C7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/TPM2.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/TPM2.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-ZC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [TPM2]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface table]
[004h 0004 4] Table Length : 0000004C
[008h 0008 1] Revision : 04
-[009h 0009 1] Checksum : 72
+[009h 0009 1] Checksum : 15
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCTPM2"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-XC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-VC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.tis diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-RC7EX0, Mon Jan 18 23:58:55 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000020D7 (8407)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xC8
+ * Checksum 0x77
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3N7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-WN7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-DI7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-BI7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-9H7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.bridge diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.bridge, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-6H7NX0, Mon Jan 18 23:58:55 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001E8B (7819)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x8F
+ * Checksum 0x3E
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-KW0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-HR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-OR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 000000E0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 3B
+[009h 0009 1] Checksum : F5
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-TR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ZR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.mmio64 diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-7R0GX0, Mon Jan 18 23:58:56 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000022E4 (8932)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x9D
+ * Checksum 0x4C
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VVX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-GUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-QUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.ipmibt diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.ipmibt, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-3UX8W0, Mon Jan 18 23:58:56 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001EC4 (7876)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x2A
+ * Checksum 0xD9
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-2HJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ARJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 7B
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ERJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-IRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000130
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 36
+[009h 0009 1] Checksum : F0
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SLIT.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SLIT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-MRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SLIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SLIT" [System Locality Information Table]
[004h 0004 4] Table Length : 00000030
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 2C
+[009h 0009 1] Checksum : E8
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSLIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-PRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-TRJNX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.cphp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.cphp, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-2RJNX0, Mon Jan 18 23:58:57 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00002049 (8265)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x5A
+ * Checksum 0x09
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/HPET.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-V1NBX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-B2NBX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-BJ6PX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-UH6PX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/FACP.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ITDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-STDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000090
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : AE
+[009h 0009 1] Checksum : 4B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-WTDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-XTJEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000188
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 68
+[009h 0009 1] Checksum : 22
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0TDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/SSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-8TDEX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000002DE (734)
* Revision 0x01
- * Checksum 0x46
+ * Checksum 0x06
* OEM ID "BOCHS "
- * OEM Table ID "NVDIMM"
+ * OEM Table ID "NVDIMM "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/q35/NFIT.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/NFIT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9VDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [NFIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table]
[004h 0004 4] Table Length : 000000F0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 24
+[009h 0009 1] Checksum : D5
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCNFIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-DWDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-IWDEX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000024EF (9455)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x26
+ * Checksum 0xD5
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
External (_SB_.NVDR, UnknownObj)
Table tests/data/acpi/q35/FACP.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-OKSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000080
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : DA
+[009h 0009 1] Checksum : 77
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-5KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000118
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : C0
+[009h 0009 1] Checksum : 7A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HMAT.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HMAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ALYOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HMAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table]
[004h 0004 4] Table Length : 00000118
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 98
+[009h 0009 1] Checksum : 42
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHMAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ELSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ILSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.acpihmat diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-2JSOX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000023A6 (9126)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xB3
+ * Checksum 0x62
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-1HH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-GIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-PIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-OIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.ipmikcs diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.ipmikcs, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-9GH9W0, Mon Jan 18 23:58:59 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001411 (5137)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x33
+ * Checksum 0xE2
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-84PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-D5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-P5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-N5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.roothp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.roothp, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-83PIX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000148D (5261)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xC6
+ * Checksum 0x75
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-2ZSAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-B0SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-G2SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-F2SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.hpbridge diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbridge, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-R2SAX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000013A2 (5026)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xD9
+ * Checksum 0x88
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-D9COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-K9COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-L4COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-W4COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.hpbrroot diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbrroot, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-S4COX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000C0C (3084)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x81
+ * Checksum 0x30
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/microvm/FACP.usb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-PZ3FX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.usb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZZ3FX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D7
+[009h 0009 1] Checksum : 74
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.usb diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.usb, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-XZ3FX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000019E (414)
* Revision 0x02
- * Checksum 0x72
+ * Checksum 0x21
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.rtc diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TX8BX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.rtc diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-QS8BX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D7
+[009h 0009 1] Checksum : 74
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.rtc diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.rtc, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-4S8BX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000194 (404)
* Revision 0x02
- * Checksum 0x30
+ * Checksum 0xDF
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.ioapic2 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZRMOX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.ioapic2 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-VMMOX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000052
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : E6
+[009h 0009 1] Checksum : 83
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.ioapic2 diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TMMOX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000016D (365)
* Revision 0x02
- * Checksum 0x1C
+ * Checksum 0xCB
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.pcie diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-M6CGX0, Tue Jan 19 00:03:13 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.pcie diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-V6CGX0, Tue Jan 19 00:03:13 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 0000006E
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : DF
+[009h 0009 1] Checksum : 7C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.pcie diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-16CGX0, Tue Jan 19 00:03:13 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000BD7 (3031)
* Revision 0x02
- * Checksum 0x99
+ * Checksum 0x48
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-4-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Marian Postevca
|
99f84ac051 |
tests/acpi: allow updates for expected data files
Signed-off-by: Marian Postevca <posteuca@mutex.one> Message-Id: <20210119003216.17637-2-posteuca@mutex.one> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Peter Maydell
|
7bbb12f305 |
tests/qtest/cmsdk-apb-watchdog-test: Test clock changes
Now that the CMSDK APB watchdog uses its Clock input, it will correctly respond when the system clock frequency is changed using the RCC register on in the Stellaris board system registers. Test that when the RCC register is written it causes the watchdog timer to change speed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-22-peter.maydell@linaro.org Message-id: 20210121190622.22000-22-peter.maydell@linaro.org |
||
|
Peter Maydell
|
9bc064b539 |
tests: Add a simple test of the CMSDK APB dual timer
Add a simple test of the CMSDK dual timer, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Message-id: 20210128114145.20536-6-peter.maydell@linaro.org Message-id: 20210121190622.22000-6-peter.maydell@linaro.org |
||
|
Peter Maydell
|
9cf5eb29b2 |
tests: Add a simple test of the CMSDK APB watchdog
Add a simple test of the CMSDK watchdog, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-5-peter.maydell@linaro.org Message-id: 20210121190622.22000-5-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
||
|
Peter Maydell
|
30858dafd1 |
tests: Add a simple test of the CMSDK APB timer
Add a simple test of the CMSDK APB timer, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-4-peter.maydell@linaro.org Message-id: 20210121190622.22000-4-peter.maydell@linaro.org |
||
Mihai Carabas
|
c0f82826a1 |
tests/qtest: add a test case for pvpanic-pci
Add a test case for pvpanic-pci device. The scenario is the same as pvpanic ISA device, but is using the PCI bus. Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> [PMM: added code to free dev and pcibus, which the oss-fuzz build otherwise complains about as a leak] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Mihai Carabas
|
677726ef1e |
hw/misc/pvpanic: split-out generic and bus dependent code
To ease the PCI device addition in next patches, split the code as follows: - generic code (read/write/setup) is being kept in pvpanic.c - ISA dependent code moved to pvpanic-isa.c Also, rename: - ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE. - TYPE_PVPANIC -> TYPE_PVPANIC_ISA. - MemoryRegion io -> mr. - pvpanic_ioport_* in pvpanic_*. Update the build system with the new files and config structure. Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Hao Wu
|
1e5ce6e10a |
hw/misc: Fix arith overflow in NPCM7XX PWM module
Fix potential overflow problem when calculating pwm_duty. 1. Ensure p->cmr and p->cnr to be from [0,65535], according to the hardware specification. 2. Changed duty to uint32_t. However, since MAX_DUTY * (p->cmr+1) can excceed UINT32_MAX, we convert them to uint64_t in computation and converted them back to uint32_t. (duty is guaranteed to be <= MAX_DUTY so it won't overflow.) Fixes: CID 1442342 Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Doug Evans <dje@google.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210127011142.2122790-1-wuhaotsh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
Paolo Bonzini
|
7848023ae4 |
arm: rename xlnx-zcu102.canbusN properties
The properties to attach a CANBUS object to the xlnx-zcu102 machine have a period in them. We want to use periods in properties for compound QAPI types, and besides the "xlnx-zcu102." prefix is both unnecessary and different from any other machine property name. Remove it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20210118162537.779542-1-pbonzini@redhat.com Reviewed-by: Vikram Garhwal <fnu.vikram@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Peter Maydell
|
0bcd12fb15 |
Block layer patches:
- Fix crash on write to read-only devices - iotests: Rewrite 'check' in Python, get rid of 'groups' and allow non-numeric test case names -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmARxVARHGt3b2xmQHJl ZGhhdC5jb20ACgkQfwmycsiPL9ZxrA//TAulJrmJ0T+h/782HRzA8St+Yuzkbdhh 96xuxqG+flhiRi1gq2LOiOUnIzYGgG0x2bI1INZku3AsqNp2BG02DtX95jdxpPkg 8Yr/PGAZ1Z+/fdajphcAVujR8A9tDrfj4wNXHOfN5cPoIXobNQGwMHX4+fDWJ3yf sbeihc70JmjQ3V6Psau2YAVLCESRLfPkG571YYiNu1DmBVI5n0xgMUD4Oc6hzIPR igJ6K5EO+uacrY1b6j5WsTIn7+mmUD8EC6njNZrYcF3aq8/SsCIaLqV/+6LN589e KdvysjU3EtRbeln2Zk83m4YTL48Cpz967aCbfD908lRmsq0tu+X0LrAQoa9Y7+0x DHS7jkUAG2LOppVrSFKUSt6QxOz08z8qqCBZutdMEBTJtfiq04I/EJhdv4HqLjD8 4dE9PQITAILO2NzfbWS+vVhHOgoyIuSu4QtC2Nw6ztUiGrtqkbRRkfPLmEv3vrxn daA/yHgyJFwyKPtiubKqk20LZb/5txJKXCPpo18MVIs9r70NcqfRT6J1XVqApFQA aXPhEsBNZ/p0gCBiej98ukCb15rOqlSk7iVlSV3kIPtp/Nk5kDqC3XV48Uy+GtXW shSM4QZxoE6CoKPGkB5hWyMAAvYwyJRRJAPy7w/Rcqd3vTsfgwX7Ad0bBVQe0kpo +pMOKs0/Yk8= =gFsg -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging Block layer patches: - Fix crash on write to read-only devices - iotests: Rewrite 'check' in Python, get rid of 'groups' and allow non-numeric test case names # gpg: Signature made Wed 27 Jan 2021 19:56:00 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: iotests: rename and move 169 and 199 tests iotests: rewrite check into python iotests: add testrunner.py iotests: add testenv.py iotests: add findtests.py iotests: 146: drop extra whitespaces from .out file virtio-scsi-test: Test writing to scsi-cd device block: Separate blk_is_writable() and blk_supports_write_perm() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Kevin Wolf
|
720d10d67b |
virtio-scsi-test: Test writing to scsi-cd device
This tests that trying to write to a (read-only) scsi-cd device backed by a read-write image file doesn't crash and results in the correct error. This is a regression test for https://bugs.launchpad.net/bugs/1906693. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210118123448.307825-3-kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Markus Armbruster
|
f8a9b4c665 |
libqtest: Rework qtest_rsp()
qtest_rsp() is used in two different ways: (1) return some arguments to caller, which the caller must free, and (2) return no arguments to caller. Passing non-zero @expected_args gets you (1), and passing zero gets you (2). Having "the return value must be freed" depend on an argument this way is less than ideal. Provide separate functions for the two ways: (1) qtest_rsp_args() takes @expected_args (possibly zero), and returns that number of arguments. Caller must free the return value always. (2) qtest_rsp() assumes zero, and returns nothing. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20210126151649.2220902-1-armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Stefan Berger
|
f8e3df09d2 |
tests: Fix memory leak in tpm-util.c
This patch fixes the following memory leak detected by asan:
Indirect leak of 560320 byte(s) in 136 object(s) allocated from:
#0 0x556b3b3f9b57 in calloc (/home/stefanb/tmp/qemu-tip/build/tests/qtest/tpm-crb-swtpm-test+0x23fb57)
#1 0x152b0e96b9b0 in g_malloc0 (/lib64/libglib-2.0.so.0+0x589b0)
#2 0x556b3b588f61 in parse_object /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:318:12
#3 0x556b3b588f61 in parse_value /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:546:16
#4 0x556b3b5886e8 in json_parser_parse /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:580:14
#5 0x556b3b52ff4a in json_message_process_token /home/stefanb/tmp/qemu-tip/build/../qobject/json-streamer.c:92:12
#6 0x556b3b59896f in json_lexer_feed_char /home/stefanb/tmp/qemu-tip/build/../qobject/json-lexer.c:313:13
#7 0x556b3b598443 in json_lexer_feed /home/stefanb/tmp/qemu-tip/build/../qobject/json-lexer.c:350:9
#8 0x556b3b436c70 in qmp_fd_receive /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:614:9
#9 0x556b3b435871 in qtest_qmp_receive_dict /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:636:12
#10 0x556b3b435871 in qtest_qmp_receive /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:624:27
#11 0x556b3b435c59 in qtest_vqmp /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:715:12
#12 0x556b3b435c59 in qtest_qmp /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:756:16
#13 0x556b3b4328c7 in tpm_util_wait_for_migration_complete /home/stefanb/tmp/qemu-tip/build/../tests/qtest/tpm-util.c:245:15
#14 0x556b3b4333be in tpm_test_swtpm_migration_test /home/stefanb/tmp/qemu-tip/build/../tests/qtest/tpm-tests.c:117:5
#15 0x152b0e98e29d (/lib64/libglib-2.0.so.0+0x7b29d)
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210115204637.3332555-1-stefanb@linux.vnet.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Gan Qixin
|
3e829c0468 |
qtest/npcm7xx_pwm-test: Fix memleak in pwm_qom_get
The pwm_qom_get function didn't free "response", which caused an indirect
memory leak. So use qobject_unref() to fix it.
ASAN shows memory leak stack:
Indirect leak of 74160000 byte(s) in 18000 object(s) allocated from:
#0 0x7f96e2f79d4e in __interceptor_calloc (/lib64/libasan.so.5+0x112d4e)
#1 0x7f96e2d98a50 in g_malloc0 (/lib64/libglib-2.0.so.0+0x55a50)
#2 0x556313112180 in qdict_new ../qobject/qdict.c:30
#3 0x556313115bca in parse_object ../qobject/json-parser.c:318
#4 0x556313117810 in parse_value ../qobject/json-parser.c:546
#5 0x556313117bda in json_parser_parse ../qobject/json-parser.c:580
#6 0x55631310fe67 in json_message_process_token ../qobject/json-streamer.c:92
#7 0x5563131210b7 in json_lexer_feed_char ../qobject/json-lexer.c:313
#8 0x556313121662 in json_lexer_feed ../qobject/json-lexer.c:350
#9 0x5563131101e9 in json_message_parser_feed ../qobject/json-streamer.c:121
#10 0x5563130cb81e in qmp_fd_receive ../tests/qtest/libqtest.c:614
#11 0x5563130cba2b in qtest_qmp_receive_dict ../tests/qtest/libqtest.c:636
#12 0x5563130cb939 in qtest_qmp_receive ../tests/qtest/libqtest.c:624
#13 0x5563130cbe0d in qtest_vqmp ../tests/qtest/libqtest.c:715
#14 0x5563130cc40f in qtest_qmp ../tests/qtest/libqtest.c:756
#15 0x5563130c5623 in pwm_qom_get ../tests/qtest/npcm7xx_pwm-test.c:180
#16 0x5563130c595e in pwm_get_duty ../tests/qtest/npcm7xx_pwm-test.c:210
#17 0x5563130c7529 in test_toggle ../tests/qtest/npcm7xx_pwm-test.c:447
Reported-by: Euler Robot <euler.robot@huawei.com>
Message-Id: <20210115075634.717909-1-ganqixin@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Jiaxun Yang
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d2c4f3841d |
tests: Rename PAGE_SIZE definitions
As per POSIX specification of limits.h [1], OS libc may define PAGE_SIZE in limits.h. Self defined PAGE_SIZE is frequently used in tests, to prevent collosion of definition, we give PAGE_SIZE definitons reasonable prefixs. [1]: https://pubs.opengroup.org/onlinepubs/7908799/xsh/limits.h.html Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210118063808.12471-7-jiaxun.yang@flygoat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Gan Qixin
|
73624e04a5 |
npcm7xx_adc-test: Fix memleak in adc_qom_set
The adc_qom_set function didn't free "response", which caused an indirect
memory leak. So use qobject_unref() to fix it.
ASAN shows memory leak stack:
Indirect leak of 593280 byte(s) in 144 object(s) allocated from:
#0 0x7f9a5e7e8d4e in __interceptor_calloc (/lib64/libasan.so.5+0x112d4e)
#1 0x7f9a5e607a50 in g_malloc0 (/lib64/libglib-2.0.so.0+0x55a50)
#2 0x55b1bebf636b in qdict_new ../qobject/qdict.c:30
#3 0x55b1bec09699 in parse_object ../qobject/json-parser.c:318
#4 0x55b1bec0b2df in parse_value ../qobject/json-parser.c:546
#5 0x55b1bec0b6a9 in json_parser_parse ../qobject/json-parser.c:580
#6 0x55b1bec060d1 in json_message_process_token ../qobject/json-streamer.c:92
#7 0x55b1bec16a12 in json_lexer_feed_char ../qobject/json-lexer.c:313
#8 0x55b1bec16fbd in json_lexer_feed ../qobject/json-lexer.c:350
#9 0x55b1bec06453 in json_message_parser_feed ../qobject/json-streamer.c:121
#10 0x55b1bebc2d51 in qmp_fd_receive ../tests/qtest/libqtest.c:614
#11 0x55b1bebc2f5e in qtest_qmp_receive_dict ../tests/qtest/libqtest.c:636
#12 0x55b1bebc2e6c in qtest_qmp_receive ../tests/qtest/libqtest.c:624
#13 0x55b1bebc3340 in qtest_vqmp ../tests/qtest/libqtest.c:715
#14 0x55b1bebc3942 in qtest_qmp ../tests/qtest/libqtest.c:756
#15 0x55b1bebbd64a in adc_qom_set ../tests/qtest/npcm7xx_adc-test.c:127
#16 0x55b1bebbd793 in adc_write_input ../tests/qtest/npcm7xx_adc-test.c:140
#17 0x55b1bebbdf92 in test_convert_external ../tests/qtest/npcm7xx_adc-test.c:246
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210118065627.79903-1-ganqixin@huawei.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
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Richard Henderson
|
eb94284d08 |
target/arm: Add cpu properties to control pauth
The crypto overhead of emulating pauth can be significant for some workloads. Add two boolean properties that allows the feature to be turned off, on with the architected algorithm, or on with an implementation defined algorithm. We need two intermediate booleans to control the state while parsing properties lest we clobber ID_AA64ISAR1 into an invalid intermediate state. Tested-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210111235740.462469-3-richard.henderson@linaro.org [PMM: fixed docs typo, tweaked text to clarify that the impdef algorithm is specific to QEMU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
|
e0cbcf1eea |
pc,pci,virtio: fixes, features
Fixes all over the place. PXB support for ARM. boot index for vhost-user-fs. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmAEIzcPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRpKrcIALB4vyMrgBYtgirTfqYiOD6b4pFRo7oDrX+r lYCoOwzqFj/2iF6ccIZk3aamCu4bYeSt2xfW4bdldVcv6TjvEgXkWmJpEQxWMCUq gVdwa0afSzM8jqvN1HYhwhEZxGdZtdB+zzciZwYeYp56Vbf6nJsN6wkQ0ApA6yzf yJrSqUpIBHyU44Crfp5uhqIBTEK7fKurwAY7pmi5Ty/bZeiqCMa4Tt29K3btB+of XwqVjCqmvo9UJqvkCkOOtD2HJVkzOBbVzYPQBAn7gvNhkYV1esXYv46kGRJLVRyh Y2sPf7LexVxJdi+ZJf4iA9elvr8bE/EYnj7naPidVPW9VgINXog= =nQMo -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: fixes, features Fixes all over the place. PXB support for ARM. boot index for vhost-user-fs. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 17 Jan 2021 11:44:55 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: acpi: Update _DSM method in expected files acpi: Enable pxb unit-test for ARM virt machine Kconfig: Compile PXB for ARM_VIRT acpi/gpex: Exclude pxb's resources from PCI0 acpi/gpex: Inform os to keep firmware resource map acpi: Add addr offset in build_crs acpi: Fix unmatched expected DSDT.pxb file acpi: Allow DSDT acpi table changes vhost-user-fs: add the "bootindex" property pci/shpc: don't push attention button when ejecting powered-off device Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Jiahui Cen
|
ccee1a8140 |
acpi: Update _DSM method in expected files
A new _DSM #5 method is added. Update expected DSDT files accordingly, and re-enable their testing. Full diff of changed files disassembly: tests/data/acpi/microvm/DSDT.pcie.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00000BCF (3023) + * Length 0x00000BD7 (3031) * Revision 0x02 - * Checksum 0x29 + * Checksum 0x99 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1302,9 +1302,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000144C (5196) + * Length 0x00001454 (5204) * Revision 0x02 - * Checksum 0xF0 + * Checksum 0x60 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1838,9 +1838,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.memhp.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000199D (6557) + * Length 0x000019A5 (6565) * Revision 0x02 - * Checksum 0x11 + * Checksum 0x90 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1840,9 +1840,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.numamem.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000144C (5196) + * Length 0x00001454 (5204) * Revision 0x02 - * Checksum 0xF0 + * Checksum 0x60 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1838,9 +1838,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.pxb.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00001DF9 (7673) + * Length 0x00001E09 (7689) * Revision 0x02 - * Checksum 0x42 + * Checksum 0x30 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1810,9 +1810,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) @@ -3025,9 +3030,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-9-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Jiahui Cen
|
f698a88a77 |
acpi: Enable pxb unit-test for ARM virt machine
No matter whether the pxb is enabled or not, the CONFIG_PXB macro in test would keep undefined. And since pxb is now enabled for ARM Virt machine by default, let's enable pxb unit-test by removing the CONFIG_PXB. Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-8-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Jiahui Cen
|
6f9ec653f3 |
acpi: Allow DSDT acpi table changes
Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-2-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Peter Maydell
|
6b63d12612 |
* UI configury cleanups and Meson conversion
* scripts/gdb improvements * WHPX cleanups and fixes * cirrus win32 CI improvements * meson gnutls workaround -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl/9yL8UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroOl8wgAjryxhmkNRYFDrhtLqB3OirurvQlS eZEwFIE88rcv6KvE2Acw+n+0cvk40mKVE5u265VjmKgItbEQKBsmA+vo9NVY+ZDT Yz5p27AzYUM/dNgtajcUzkainzcseYMCyoXV3+7+1X67i15gxJsa7/y0jAVRyrW/ z8RJOYQC1oP9dRbhH7Y5nw6XRLpB2+CEMX2nQ/g58bM/X/vNeNxhFKAZlnm6cy4q ClX8pZYewGg/w+LKNPCUZvnSyYeErdYqoX0bKZjawp71a8/6/Qth2NDU6r1VoaKa e3zF2XRdQcSPohGAwmmCMFV1rP7DplFcKO4bQ2Q0BuI5E79MykhQeLztLA== =yW7F -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * UI configury cleanups and Meson conversion * scripts/gdb improvements * WHPX cleanups and fixes * cirrus win32 CI improvements * meson gnutls workaround # gpg: Signature made Tue 12 Jan 2021 16:05:19 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: target/i386: Use X86Seg enum for segment registers configure: quote command line arguments in config.status configure: move Cocoa incompatibility checks to Meson configure: move GTK+ detection to Meson configure: move X11 detection to Meson gtk: remove CONFIG_GTK_GL cocoa: do not enable coreaudio automatically virtio-scsi: trace events meson: Propagate gnutls dependency Docs/RCU: Correct sample code of qatomic_rcu_set scripts/gdb: implement 'qemu bt' scripts/gdb: fix 'qemu coroutine' when users selects a non topmost stack frame meson: fix Cocoa option in summary whpx: move whpx_lapic_state from header to c file maintainers: Add me as Windows Hosted Continuous Integration maintainer cirrus/msys2: Cache msys2 mingw in a better way. cirrus/msys2: Exit powershell with $LastExitCode whpx: move internal definitions to whpx-internal.h whpx: rename whp-dispatch to whpx-internal.h meson: do not use CONFIG_VIRTFS Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Hao Wu
|
73314f1384 |
hw/misc: Add QTest for NPCM7XX PWM Module
We add a qtest for the PWM in the previous patch. It proves it works as expected. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210108190945.949196-6-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Hao Wu
|
77c05b0b74 |
hw/adc: Add an ADC module for NPCM7XX
The ADC is part of NPCM7XX Module. Its behavior is controled by the ADC_CON register. It converts one of the eight analog inputs into a digital input and stores it in the ADC_DATA register when enabled. Users can alter input value by using qom-set QMP command. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210108190945.949196-4-wuhaotsh@google.com [PMM: Added missing hw/adc/trace.h file] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Paolo Bonzini
|
2c9dce0196 |
meson: do not use CONFIG_VIRTFS
CONFIG_VIRTFS is not anymore part of the config_host dictionary. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexander Bulekov
|
b677001d70 |
fuzz: map all BARs and enable PCI devices
Prior to this patch, the fuzzer found inputs to map PCI device BARs and enable the device. While it is nice that the fuzzer can do this, it added significant overhead, since the fuzzer needs to map all the BARs (regenerating the memory topology), at the start of each input. With this patch, we do this once, before fuzzing, mitigating some of this overhead. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201221181203.1853-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Gan Qixin
|
661465c2e0 |
qtest/libqtest: fix heap-buffer-overflow in qtest_cb_for_every_machine()
When the length of mname is less than 5, memcpy("xenfv", mname, 5) will cause
heap buffer overflow. Therefore, use strncmp to avoid this problem.
The asan showed stack:
ERROR: AddressSanitizer: heap-buffer-overflow on address 0x60200000f2f4 at
pc 0x7f65d8cc2225 bp 0x7ffe93cc5a60 sp 0x7ffe93cc5208 READ of size 5 at
0x60200000f2f4 thread T0
#0 0x7f65d8cc2224 in memcmp (/lib64/libasan.so.5+0xdf224)
#1 0x5632c20be95b in qtest_cb_for_every_machine tests/qtest/libqtest.c:1282
#2 0x5632c20b7995 in main tests/qtest/test-hmp.c:160
#3 0x7f65d88fed42 in __libc_start_main (/lib64/libc.so.6+0x26d42)
#4 0x5632c20b72cd in _start (build/tests/qtest/test-hmp+0x542cd)
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Message-Id: <20210106050625.518041-1-ganqixin@huawei.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|
||
|
Peter Maydell
|
3896895ab4 |
* Two fuzzer patches from Alexander
* Show logs of failed acceptance jobs in the gitlab-CI -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAl/gpV0RHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbUUmA//eGv+EL6Mqot42ZMuuwpDkoD4kg6yNX0m xUbvzWhWWlyIAEUZBoHb4s8vpZRuS0Zo/aGt9q3oCBdomiU72ageTT6urrbRSdH+ X5WdBpVgudKePBBvS8AtsDHkC346nZqZYop67QFiwAYScaZMXtcblIosJm7n+ogJ UwQjzPEsIzG3dX8eaMQVTnTpKlaiXQDnOEy59vOnNMpM0f7hsG7FxNYtOByvkMzS zp5ntO+ZqbP804xR15exUIISqvJQKYLdEaKkBOH99LVxyvz43oBknh/kpUrtcSam aNC5tbY3Z7WrkXwOBvAWT6my6GW9aeIGm5xu3U8wFlDS7+2bCrwxqhVxRqZWqKCd 0D+xiXsCiVmloAyWfGDqA3vqQzTPgyvwnGyrgU4R8uu4RgzvmD4dGjZhVFkWhWu1 hQXZh1JhbzjiFuIufF9x2Ccq0MQSuU2puH8scqYFKf/W1eEYoeVqFd+uEw2Dm5cg hTQQEn2pT6y6EA4x6uvKXEeF3B+N3HCYuufOYqsFerL0p5wfWGvUWnxR3f1oqtQY RmejgmaNX+Os/t0HPIR9vf5x6VIZVY5M+GsThcPFyKI5vWa5vfVokOYOQcov2COT 5hgm24L2eW3yHgcQ/Rq3bTxG7ZMaXaCWzbUJgkG/IAmsmCEY/j3TnM42BqGoPlG8 DGbWZ4cNIc4= =lmIG -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-12-21' into staging * Two fuzzer patches from Alexander * Show logs of failed acceptance jobs in the gitlab-CI # gpg: Signature made Mon 21 Dec 2020 13:38:37 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-12-21: gitlab-ci: Archive logs of acceptance tests gitlab-ci: Refactor code that show logs of failed acceptances tests/acceptance: Bump avocado requirements to 83.0 fuzz: fix the generic-fuzz-floppy config fuzz: Add more i386 configurations for fuzzing Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Markus Armbruster
|
eab3a4678b |
qobject: Change qobject_to_json()'s value to GString
qobject_to_json() and qobject_to_json_pretty() build a GString, then covert it to QString. Just one of the callers actually needs a QString: qemu_rbd_parse_filename(). A few others need a string they can modify: qmp_send_response(), qga's send_response(), to_json_str(), and qmp_fd_vsend_fds(). The remainder just need a string. Change qobject_to_json() and qobject_to_json_pretty() to return the GString. qemu_rbd_parse_filename() now has to convert to QString. All others save a QString temporary. to_json_str() actually becomes a bit simpler, because GString provides more convenient modification functions. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-6-armbru@redhat.com> |
||
|
Markus Armbruster
|
6589f45991 |
qobject: Make qobject_to_json_pretty() take a pretty argument
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-4-armbru@redhat.com> |
||
|
Alexander Bulekov
|
d61368d1e9 |
fuzz: fix the generic-fuzz-floppy config
On the pc-i440fx machine, the floppy drive relies on the i8257 DMA controller. Add this device to the floppy fuzzer config, and silence the warning about a missing format specifier for the null-co:// drive. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201216203328.41112-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Alexander Bulekov
|
cbe945c74c |
fuzz: Add more i386 configurations for fuzzing
This adds configurations for fuzzing the following devices on oss-fuzz: * vmxnet3 CC: Dmitry Fleytman <dmitry.fleytman@gmail.com> * ne2k * pcnet * rtl8139 CC: Jason Wang <jasowang@redhat.com> * eepro100 CC: Stefan Weil <sw@weilnetz.de> * sdhci CC: Philippe Mathieu-Daudé <f4bug@amsat.org> * ehci * ohci * ac97 * cs4231a * es1370 * sb16 CC: Gerd Hoffmann <kraxel@redhat.com> * megasas CC: Hannes Reinecke <hare@suse.com> * parallel CC: Michael S. Tsirkin <mst@redhat.com> CC: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201123184352.242907-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Paolo Bonzini
|
4bfb024bc7 |
memory: clamp cached translation in case it points to an MMIO region
In using the address_space_translate_internal API, address_space_cache_init
forgot one piece of advice that can be found in the code for
address_space_translate_internal:
/* MMIO registers can be expected to perform full-width accesses based only
* on their address, without considering adjacent registers that could
* decode to completely different MemoryRegions. When such registers
* exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
* regions overlap wildly. For this reason we cannot clamp the accesses
* here.
*
* If the length is small (as is the case for address_space_ldl/stl),
* everything works fine. If the incoming length is large, however,
* the caller really has to do the clamping through memory_access_size.
*/
address_space_cache_init is exactly one such case where "the incoming length
is large", therefore we need to clamp the resulting length---not to
memory_access_size though, since we are not doing an access yet, but to
the size of the resulting section. This ensures that subsequent accesses
to the cached MemoryRegionSection will be in range.
With this patch, the enclosed testcase notices that the used ring does
not fit into the MSI-X table and prints a "qemu-system-x86_64: Cannot map used"
error.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
||
Alejandro Jimenez
|
c9ca89a907 |
qtest/pvpanic: Test panic option that allows VM to continue
Test the scenario where the -action panic=none parameter is used to signal that the VM must continue executing after a guest panic occurs. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Message-Id: <1607705564-26264-5-git-send-email-alejandro.j.jimenez@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
164dafd174 |
remove preconfig state
The preconfig state is only used if -incoming is not specified, which makes the RunState state machine more tricky than it need be. However there is already an equivalent condition which works even with -incoming, namely qdev_hotplug. Use it instead of a separate runstate. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Peter Maydell
|
b785d25e91 |
* Fix for NULL segments (Bin Meng)
* Support for 32768 CPUs on x86 without IOMMU (David) * PDEP/PEXT fix and testcase (myself) * Remove bios_name and ram_size globals (myself) * qemu_init rationalization (myself) * Update kernel-doc (myself + upstream patches) * Propagate MemTxResult across DMA and PCI functions (Philippe) * Remove master/slave when applicable (Philippe) * WHPX support for in-kernel irqchip (Sunil) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl/SWS4UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroMHLAf8Cr1nOn1ou2S2H9vePeoqRAVGdQBv tbQ/nZs+2NZMyhLF7mBj7y6Ym0wNyXzkyiFnN1wR04V5e0tF+q1Y0OOZtihJ+Ntk esjzHAzdqS22xI2dNnNDBo69eQQKDq3C0Ug5x6z63tO81AoTNKP+vq+QbZqe7v7K 2TScroAnhX9zE5Hz1+qJ35w13EMCNFnUPHNcOwxVSGHj4HNoEpIjjcE6rme46jX+ REsEGKJKIJ88aV2hzOLSrdJ0/mNuWsjfOvcfgtoIYUPbb55hHMykqD+LapoyEp8K gjnco6JT6wWFN1+tVxTjY4TaERVw+NGomd2QyHSbanDoRd8igFhxu2gBnQ== =yeQi -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * Fix for NULL segments (Bin Meng) * Support for 32768 CPUs on x86 without IOMMU (David) * PDEP/PEXT fix and testcase (myself) * Remove bios_name and ram_size globals (myself) * qemu_init rationalization (myself) * Update kernel-doc (myself + upstream patches) * Propagate MemTxResult across DMA and PCI functions (Philippe) * Remove master/slave when applicable (Philippe) * WHPX support for in-kernel irqchip (Sunil) # gpg: Signature made Thu 10 Dec 2020 17:21:50 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (113 commits) scripts: kernel-doc: remove unnecessary change wrt Linux Revert "docs: temporarily disable the kernel-doc extension" scripts: kernel-doc: use :c:union when needed scripts: kernel-doc: split typedef complex regex scripts: kernel-doc: fix typedef parsing Revert "kernel-doc: Handle function typedefs that return pointers" Revert "kernel-doc: Handle function typedefs without asterisks" scripts: kernel-doc: try to use c:function if possible scripts: kernel-doc: fix line number handling scripts: kernel-doc: allow passing desired Sphinx C domain dialect scripts: kernel-doc: don't mangle with parameter list scripts: kernel-doc: fix typedef identification scripts: kernel-doc: reimplement -nofunction argument scripts: kernel-doc: fix troubles with line counts scripts: kernel-doc: use a less pedantic markup for funcs on Sphinx 3.x scripts: kernel-doc: make it more compatible with Sphinx 3.x Revert "kernel-doc: Use c:struct for Sphinx 3.0 and later" Revert "scripts/kerneldoc: For Sphinx 3 use c:macro for macros with arguments" scripts: kernel-doc: add support for typedef enum kernel-doc: add support for ____cacheline_aligned attribute ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Paolo Bonzini
|
2c65db5e58 |
vl: extract softmmu/datadir.c
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
991c180d74 |
treewide: do not use short-form boolean options
They are going to be deprecated, avoid warnings on stdout while the tests run. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Peter Maydell
|
2ecfc0657a |
Miscellaneous patches for 2020-12-10
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Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-12-10' into staging
Miscellaneous patches for 2020-12-10
# gpg: Signature made Thu 10 Dec 2020 16:17:43 GMT
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2020-12-10:
docs/devel/writing-qmp-commands.txt: Fix docs
qapi: Normalize version references x.y.0 to just x.y
Tweak a few "Parameter 'NAME' expects THING" error message
qom: Improve {qom,device}-list-properties error messages
qga: Tweak a guest-shutdown error message
qga: Replace an unreachable error by abort()
ui: Tweak a client_migrate_info error message
ui: Improve a client_migrate_info error message
ui: Improve some set_passwd, expire_password error messages
block: Improve some block-commit, block-stream error messages
qerror: Eliminate QERR_ macros used in just one place
qerror: Drop unused QERR_ macros
Clean up includes
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
||
|
Markus Armbruster
|
4bd802b209 |
Clean up includes
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes, with the changes
to the following files manually reverted:
contrib/libvhost-user/libvhost-user-glib.h
contrib/libvhost-user/libvhost-user.c
contrib/libvhost-user/libvhost-user.h
contrib/plugins/hotblocks.c
contrib/plugins/hotpages.c
contrib/plugins/howvec.c
contrib/plugins/lockstep.c
linux-user/mips64/cpu_loop.c
linux-user/mips64/signal.c
linux-user/sparc64/cpu_loop.c
linux-user/sparc64/signal.c
linux-user/x86_64/cpu_loop.c
linux-user/x86_64/signal.c
target/s390x/gen-features.c
tests/fp/platform.h
tests/migration/s390x/a-b-bios.c
tests/plugin/bb.c
tests/plugin/empty.c
tests/plugin/insn.c
tests/plugin/mem.c
tests/test-rcu-simpleq.c
tests/test-rcu-slist.c
tests/test-rcu-tailq.c
tests/uefi-test-tools/UefiTestToolsPkg/BiosTablesTest/BiosTablesTest.c
contrib/plugins/, tests/plugin/, and tests/test-rcu-slist.c appear not
to include osdep.h intentionally. The remaining reverts are the same
as in commit
|
||
|
Peter Maydell
|
379e9eaed4 |
Aspeed patches :
* New device model for EMC1413/EMC1414 temperature sensors (I2C)
* New g220a-bmc Aspeed machine
* couple of Aspeed cleanups
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/fjAsWAvYtqsLFUWCUnpHkxyq/8N0hpSZc0DI3FDPsup4/NlRG17p+DcrNqimwIE
SZ1I28YYdmoh1igMQK46x7UvvnceCCXkHAnR+nGix8jOpSCWLKs=
=abAb
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20201210' into staging
Aspeed patches :
* New device model for EMC1413/EMC1414 temperature sensors (I2C)
* New g220a-bmc Aspeed machine
* couple of Aspeed cleanups
# gpg: Signature made Thu 10 Dec 2020 11:58:10 GMT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/legoater/tags/pull-aspeed-20201210:
aspeed: g220a-bmc: Add an FRU
aspeed/smc: Add support for address lane disablement
ast2600: SRAM is 89KB
aspeed: Add support for the g220a-bmc board
hw/misc: add an EMC141{3,4} device model
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
||
|
Peter Maydell
|
00ef48ff0d |
microvm: add support for second ioapic
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCgAGBQJf0hD2AAoJEEy22O7T6HE4YR4QAKclgGrNwtnKaRRmkqzM1Neo R+vfbRlghZ5Uj7qt6i8B/WJ+BmDOOgOUXq+xUODPl7Bc03sBJBKoBJmjtbEKfQFu Vm1+gIrSEMsWT7t8KoHYj+piGJnUMu46G1iaQDURHVGTfRZoNyMHLw9+bTHLsznp jNAp5XnBgyFTvwn61whaXW57Zw3jm0OPtjxqd6PxCWgvLB7MEogO4P1+S8RpTWu3 8h2J2kLFDY3iPBeENrxq33Ui2/3yQV19iVke0KzOhu0ncQ6QEHaQeAxXuiZBfplW 8ZxxujbJnJgcsnZm6EOdDPlbqW/KkDtqztnz+B/yXrQU1R6esu535gtXFSyrGOVa n+EuVqDfTlfSUp4RVnk1qZqwC6Y/ZPyj940DGgWA1E+FNyjuuxkr+n72ZUzFkvT/ epWsIbStvSjV222wAQ9+f061wd9dqj58Nm/X4MEY+Omg+6Poq3CBafIKh7lTz6cr 4nMuqZ1MReONc52Cgz/6amo7wTJ8+wl68+WnxxXPqdoSz1y9NzqXbF/8bnEtUhMz UAtZHGAtVP+MiNJf3bpXMDwBVcDedyIT0Jied/NWJ3yv0+OcekGCBOc6+gJsSS61 mJc5t0kJim2dE0Vkzi5+95HeGyCPoPqdDf56gU123TJLJAOAw/htenVpMr+O9znV MfmgjNYMeDKDr9dyDdcN =u8Kq -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kraxel/tags/microvm-20201210-pull-request' into staging microvm: add support for second ioapic # gpg: Signature made Thu 10 Dec 2020 12:13:42 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/microvm-20201210-pull-request: tests/acpi: disallow updates for expected data files tests/acpi: update expected data files tests/acpi: add ioapic2=on test for microvm tests/acpi: add data files for ioapic2 test variant tests/acpi: allow updates for expected data files microvm: add second ioapic microvm: drop microvm_gsi_handler() microvm: make pcie irq base runtime changeable microvm: make number of virtio transports runtime changeable x86: add support for second ioapic x86: rewrite gsi_handler() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
Havard Skinnemoen
|
1af979b492 |
tests/qtest/npcm7xx_rng-test: dump random data on failure
Dump the collected random data after a randomness test failure. Note that this relies on the test having called g_test_set_nonfatal_assertions() so we don't abort immediately on the assertion failure. Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: minor commit message tweak] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
Vikram Garhwal
|
ab5e842c4b |
tests/qtest: Introduce tests for Xilinx ZynqMP CAN controller
The QTests perform five tests on the Xilinx ZynqMP CAN controller:
Tests the CAN controller in loopback, sleep and snoop mode.
Tests filtering of incoming CAN messages.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com>
Message-id: 1605728926-352690-4-git-send-email-fnu.vikram@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
||
John Wang
|
5e623f2bf1 |
hw/misc: add an EMC141{3,4} device model
Largely inspired by the TMP421 temperature sensor, here is a model for the EMC1413/EMC1414 temperature sensors. Specs can be found here : http://ww1.microchip.com/downloads/en/DeviceDoc/20005274A.pdf Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20201122105134.671-1-wangzhiqiang.bj@bytedance.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
||
Gerd Hoffmann
|
08af4e13f8 |
tests/acpi: disallow updates for expected data files
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20201203105423.10431-13-kraxel@redhat.com |
||
|
Gerd Hoffmann
|
38ee397f3f |
tests/acpi: add ioapic2=on test for microvm
APIC table changes:
[034h 0052 1] Subtable Type : 01 [I/O APIC]
[035h 0053 1] Length : 0C
[036h 0054 1] I/O Apic ID : 00
[037h 0055 1] Reserved : 00
[038h 0056 4] Address : FEC00000
[03Ch 0060 4] Interrupt : 00000000
+[040h 0064 1] Subtable Type : 01 [I/O APIC]
+[041h 0065 1] Length : 0C
+[042h 0066 1] I/O Apic ID : 01
+[043h 0067 1] Reserved : 00
+[044h 0068 4] Address : FEC10000
+[048h 0072 4] Interrupt : 00000018
DSDT table changes:
- Device (VR07)
+ Device (VR23)
{
Name (_HID, "LNRO0005") // _HID: Hardware ID
- Name (_UID, 0x07) // _UID: Unique ID
+ Name (_UID, 0x17) // _UID: Unique ID
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
- 0xFEB00E00, // Address Base
+ 0xFEB02E00, // Address Base
0x00000200, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
- 0x00000017,
+ 0x0000002F,
}
})
}
}
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Sergio Lopez <slp@redhat.com>
Message-id: 20201203105423.10431-11-kraxel@redhat.com
|
||
|
Gerd Hoffmann
|
cdecc3d39a |
tests/acpi: allow updates for expected data files
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20201203105423.10431-9-kraxel@redhat.com |
||
|
Gerd Hoffmann
|
4d01b8994c |
microvm: add second ioapic
Create second ioapic, route virtio-mmio IRQs to it, allow more virtio-mmio devices (24 instead of 8). Needs ACPI, enabled by default, can be turned off using -machine ioapic2=off Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20201203105423.10431-8-kraxel@redhat.com |
||
|
Peter Maydell
|
5e7b204dbf |
pc,pci,virtio: fixes, cleanups
Lots of fixes, cleanups. CPU hot-unplug improvements. A new AER property for virtio devices, adding a dummy AER capability. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAl/REawPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRp2MQIALsT4+JQRvo3YR0L3hpVFzRU4cMwVYryqe2/ RRWggBI4OB3kiQT2YD4lElXmZnTTG5p5B69P+DE5Wj5faTQoIQdWZjDS9pO+tI+p gVNKgaN7ByKz5PUQNhhGKUfQ4F6x5yDePWlWGJZAmExEysAuC/nmCe5Lo1PrDzEV t0H/TmCNxAb4HsT9LG1pogTM/lpXDsjlVG/Mryh2XNe7z6c0ZyGo1WMI59RFVGId 9EpOV1OXWVHgkSWD6Rn7mqNq7zASS2Du/osHcQ6C51L/UE+pZPJW7gDqDRudItBR XXteNAeLXo5NdGJsTdVuHfy+Z0fJdHny9jLHMO2FkhV1wzYgJSM= =LaYX -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: fixes, cleanups Lots of fixes, cleanups. CPU hot-unplug improvements. A new AER property for virtio devices, adding a dummy AER capability. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 09 Dec 2020 18:04:28 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (65 commits) hw/virtio-pci Added AER capability. hw/virtio-pci Added counter for pcie capabilities offsets. pcie_aer: Fix help message of pcie_aer_inject_error command x86: ich9: let firmware negotiate 'CPU hot-unplug with SMI' feature x86: ich9: factor out "guest_cpu_hotplug_features" tests/acpi: update expected files x86: acpi: let the firmware handle pending "CPU remove" events in SMM tests/acpi: allow expected files change x86: acpi: introduce AcpiPmInfo::smi_on_cpu_unplug acpi: cpuhp: introduce 'firmware performs eject' status/control bits hw/i386/pc: add max combined fw size as machine configuration option block/export: avoid g_return_val_if() input validation contrib/vhost-user-input: avoid g_return_val_if() input validation contrib/vhost-user-gpu: avoid g_return_val_if() input validation contrib/vhost-user-blk: avoid g_return_val_if() input validation .gitlab-ci: add build-libvhost-user libvhost-user: add a simple link test without glib libvhost-user: make it a meson subproject libvhost-user: drop qemu/osdep.h dependency libvhost-user: remove qemu/compiler.h usage ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
Igor Mammedov
|
e2487e4028 |
tests/acpi: update expected files
update expected files with following change:
@@ -557,6 +557,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
CINS, 1,
CRMV, 1,
CEJ0, 1,
+ CEJF, 1,
Offset (0x05),
CCMD, 8
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20201207140739.3829993-7-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Igor Mammedov
|
414aa64fda |
tests/acpi: allow expected files change
Change that will be introduced by following patch:
@@ -557,6 +557,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
CINS, 1,
CRMV, 1,
CEJ0, 1,
+ CEJF, 1,
Offset (0x05),
CCMD, 8
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20201207140739.3829993-5-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Alexander Bulekov
|
b98b9fdef0 |
fuzz: avoid double-fetches by default
The generic fuzzer can find double-fetch bugs. However: * We currently have no good way of producing qemu-system reproducers for double-fetch bugs. Even if we can get developers to run the binary-blob reproducers with the qemu-fuzz builds, we currently don't have a minimizer for these reproducers, so they are usually not easy to follow. * Often times the fuzzer will provide a reproducer containing a double-fetch for a bug that can be reproduced without double-fetching. Until we find a way to build nice double-fetch reproducers that developers are willing to look at, lets tell OSS-Fuzz to avoid double-fetches. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20201202164214.93867-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
Philippe Mathieu-Daudé
|
6536c9e0eb |
tests/qtest/fuzz-test: Quit test_lp1878642 once done
Missed in
|
||
Yubo Miao
|
fe1127da11 |
unit-test: Add the binary file and clear diff.h
Add the binary file DSDT.pxb and clear bios-tables-test-allowed-diff.h Signed-off-by: Yubo Miao <miaoyubo@huawei.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20201119014841.7298-10-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Yubo Miao
|
1da638b165 |
unit-test: Add testcase for pxb
Add testcase for pxb to make sure the ACPI table is correct for guest. Signed-off-by: Yubo Miao <miaoyubo@huawei.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20201119014841.7298-9-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Yubo Miao
|
128e232281 |
unit-test: The files changed.
The unit-test is seperated into three patches:
1. The files changed and list in bios-tables-test-allowed-diff.h
2. The unit-test
3. The binary file and clear bios-tables-test-allowed-diff.h
The ASL diff would also be listed.
Sice there are 1000+lines diff, some changes would be omitted.
* Original Table Header:
* Signature "DSDT"
- * Length 0x000014BB (5307)
+ * Length 0x00001E7A (7802)
* Revision 0x02
- * Checksum 0xD1
+ * Checksum 0x57
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
+ Device (PC80)
+ {
+ Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID
+ Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID
+ Name (_ADR, Zero) // _ADR: Address
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_SEG, Zero) // _SEG: PCI Segment
+ Name (_BBN, 0x80) // _BBN: BIOS Bus Number
+ Name (_UID, 0x80) // _UID: Unique ID
+ Name (_STR, Unicode ("pxb Device")) // _STR: Description String
+ Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ GSI0,
+ Zero
+ },
+
Packages are omitted.
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ 0x03,
+ GSI2,
+ Zero
+ }
+ })
+ Device (GSI0)
+ {
+ Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000023,
+ }
+ })
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000023,
+ }
+ })
+ Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
+ {
+ }
+ }
GSI1,2,3 are omitted.
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, // Granularity
+ 0x0080, // Range Minimum
+ 0x0080, // Range Maximum
+ 0x0000, // Translation Offset
+ 0x0001, // Length
+ ,, )
+ })
+ Name (SUPP, Zero)
+ Name (CTRL, Zero)
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
+ {
+ CreateDWordField (Arg3, Zero, CDW1)
+ If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
+ {
+ CreateDWordField (Arg3, 0x04, CDW2)
+ CreateDWordField (Arg3, 0x08, CDW3)
+ SUPP = CDW2 /* \_SB_.PC80._OSC.CDW2 */
+ CTRL = CDW3 /* \_SB_.PC80._OSC.CDW3 */
+ CTRL &= 0x1F
+ If ((Arg1 != One))
+ {
+ CDW1 |= 0x08
+ }
+
+ If ((CDW3 != CTRL))
+ {
+ CDW1 |= 0x10
+ }
+
+ CDW3 = CTRL /* \_SB_.PC80.CTRL */
+ Return (Arg3)
+ }
+ Else
+ {
+ CDW1 |= 0x04
+ Return (Arg3)
+ }
+ }
DSM is are omitted
Device (PCI0)
{
Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
- 0x00FF, // Range Maximum
+ 0x007F, // Range Maximum
0x0000, // Translation Offset
- 0x0100, // Length
+ 0x0080, // Length
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20201119014841.7298-8-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
Greg Kurz
|
558f5c42ef |
tests/9pfs: Mark "local" tests as "slow"
The "local" tests can fail on some automated build systems as reported here: https://lists.nongnu.org/archive/html/qemu-devel/2020-11/msg05510.html This will need to be investigated and addressed later. Let's go for a workaround in the meantime : mark the "local" tests as "slow" so that they aren't executed with a simple "make check" like in the case above. Reported-by: Cole Robinson <crobinso@redhat.com> Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <160620382310.1423262.7364287092069513483.stgit@bahia.lan> Signed-off-by: Greg Kurz <groug@kaod.org> |
||
|
Paolo Bonzini
|
88a8b27e55 |
qtest: do not return freed argument vector from qtest_rsp
If expected_args is 0, qtest frees the argument vector and then returns it nevertheless. Coverity complains; in practice this is not an issue because expected_args == 0 means that the caller is not interested in the argument vector, but it would be a potential problem if somebody wanted to add commands with optional arguments to qtest. Suggested-by: Kamil Dudka <kdudka@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201120073149.99079-1-pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
Chen Qun
|
7aed584ca6 |
tests/qtest: fix memleak in npcm7xx_watchdog_timer-test
Properly free resp for get_watchdog_action() to avoid memory leak.
ASAN shows memory leak stack:
Indirect leak of 12360 byte(s) in 3 object(s) allocated from:
#0 0x7f41ab6cbd4e in __interceptor_calloc (/lib64/libasan.so.5+0x112d4e)
#1 0x7f41ab4eaa50 in g_malloc0 (/lib64/libglib-2.0.so.0+0x55a50)
#2 0x556487d5374b in qdict_new ../qobject/qdict.c:29
#3 0x556487d65e1a in parse_object ../qobject/json-parser.c:318
#4 0x556487d65cb6 in parse_pair ../qobject/json-parser.c:287
#5 0x556487d65ebd in parse_object ../qobject/json-parser.c:343
#6 0x556487d661d5 in json_parser_parse ../qobject/json-parser.c:580
#7 0x556487d513df in json_message_process_token ../qobject/json-streamer.c:92
#8 0x556487d63919 in json_lexer_feed_char ../qobject/json-lexer.c:313
#9 0x556487d63d75 in json_lexer_feed ../qobject/json-lexer.c:350
#10 0x556487d28b2a in qmp_fd_receive ../tests/qtest/libqtest.c:613
#11 0x556487d2a16f in qtest_qmp_eventwait_ref ../tests/qtest/libqtest.c:827
#12 0x556487d248e2 in get_watchdog_action ../tests/qtest/npcm7xx_watchdog_timer-test.c:94
#13 0x556487d25765 in test_enabling_flags ../tests/qtest/npcm7xx_watchdog_timer-test.c:243
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Message-Id: <20201118115646.2461726-3-kuhn.chenqun@huawei.com>
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|
||
|
Chen Qun
|
f369797617 |
tests/qtest: variable defined by g_autofree need to be initialized
According to the glib function requirements, we need initialise
the variable. Otherwise there will be compilation warnings:
glib-autocleanups.h:28:3: warning: ‘full_name’ may be
used uninitialized in this function [-Wmaybe-uninitialized]
28 | g_free (*pp);
| ^~~~~~~~~~~~
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-Id: <20201118115646.2461726-2-kuhn.chenqun@huawei.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|
||
|
Peter Maydell
|
46d407f84a |
Bug fixes
-----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl+rp+wUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroO1lAf/ejTWVYZaBNyyQNAMvG9/oNfyGc1i QXE8TXcJN1MQPBxcthbbRgFVufbXMvHFcV0j4Df2VUSYLXrbTKL/PPVrM+EjMYDD 400n0XPwcrugsvViZ6N6S1sA/NqSmljWjDSBsS2h+qOq+l7Bw1mal9n+nWWtvLSX 3mcOe3M2+8ZWfHPMUkCQ5LOnKTt9TqO/pjA0gii7WR2YZqmCPDKeDoRoC9KHfYDY ZU0kYgFyh7VZf4ZoPaIjEFbnKsWw+uJJNSA4IyzrJ+7flXf1SR2kcD8swuqdcxks GvNK+LNzAllqQgm4KDmKFmC2Iqq4RNu+5MKUgLvpp/gU8UZCq9k9toqB0g== =toxr -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging Bug fixes # gpg: Signature made Wed 11 Nov 2020 08:59:24 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: pvpanic: Advertise the PVPANIC_CRASHLOADED event support physmem: improve ram size error messages Makefile: No echoing for 'make help V=1' replay: remove some dead code fix make clean/distclean meson: Clarify the confusing vhost-user vs. vhost-kernel output Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Paolo Bonzini
|
b1b0393c3c |
pvpanic: Advertise the PVPANIC_CRASHLOADED event support
Advertise both types of events as supported when the guest OS
queries the pvpanic device. Currently only PVPANIC_PANICKED is
exposed; PVPANIC_CRASHLOADED must also be advertised, but only on
new machine types.
Fixes:
|
||
|
Peter Maydell
|
3e7d06d05a |
target-arm queue:
* hw/arm/Kconfig: ARM_V7M depends on PTIMER
* Minor coding style fixes
* docs: add some notes on the sbsa-ref machine
* hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals
* target/arm: Fix neon VTBL/VTBX for len > 1
* hw/arm/armsse: Correct expansion MPC interrupt lines
* hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ
* hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()
* hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input
* hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary
* hw/arm/nseries: Check return value from load_image_targphys()
* tests/qtest/npcm7xx_rng-test: count runs properly
* target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check
-----BEGIN PGP SIGNATURE-----
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lYaOCN9C5TnW47ttJAe38A==
=iKQn
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201110' into staging
target-arm queue:
* hw/arm/Kconfig: ARM_V7M depends on PTIMER
* Minor coding style fixes
* docs: add some notes on the sbsa-ref machine
* hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals
* target/arm: Fix neon VTBL/VTBX for len > 1
* hw/arm/armsse: Correct expansion MPC interrupt lines
* hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ
* hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()
* hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input
* hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary
* hw/arm/nseries: Check return value from load_image_targphys()
* tests/qtest/npcm7xx_rng-test: count runs properly
* target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check
# gpg: Signature made Tue 10 Nov 2020 11:17:45 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20201110:
target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check
tests/qtest/npcm7xx_rng-test: count runs properly
hw/arm/nseries: Check return value from load_image_targphys()
hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary
hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input
hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()
hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ
hw/arm/armsse: Correct expansion MPC interrupt lines
target/arm: Fix neon VTBL/VTBX for len > 1
hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals
docs: add some notes on the sbsa-ref machine
target/arm: add space before the open parenthesis '('
target/arm: Don't use '#' flag of printf format
target/arm: add spaces around operator
ssi: Fix bad printf format specifiers
hw/arm/Kconfig: ARM_V7M depends on PTIMER
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
||
|
Havard Skinnemoen
|
8006c9842b |
tests/qtest/npcm7xx_rng-test: count runs properly
The number of runs is equal to the number of 0-1 and 1-0 transitions, plus one. Currently, it's counting the number of times these transitions do _not_ happen, plus one. Source: https://nvlpubs.nist.gov/nistpubs/Legacy/SP/nistspecialpublication800-22r1a.pdf section 2.3.4 point (3). Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20201103011457.2959989-2-hskinnemoen@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Peter Maydell
|
ad57e2b1f5 |
qtest: Update references to parse_escape() in comments
In commit
|
||
Dima Stepanov
|
d4e279141b |
fuzz: add virtio-blk fuzz target
The virtio-blk fuzz target sets up and fuzzes the available virtio-blk queues. The implementation is based on two files: - tests/qtest/fuzz/virtio_scsi_fuzz.c - tests/qtest/virtio_blk_test.c Signed-off-by: Dima Stepanov <dimastep@yandex-team.ru> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <e2405c459302ecaee2555405604975353bfa3837.1604920905.git.dimastep@yandex-team.ru> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
Daniele Buono
|
aba378dee6 |
fuzz: Make fork_fuzz.ld compatible with LLVM's LLD
LLVM's linker, LLD, supports the keyword "INSERT AFTER", starting with version 11. However, when multiple sections are defined in the same "INSERT AFTER", they are added in a reversed order, compared to BFD's LD. This patch makes fork_fuzz.ld generic enough to work with both linkers. Each section now has its own "INSERT AFTER" keyword, so proper ordering is defined between the sections added. Signed-off-by: Daniele Buono <dbuono@linux.vnet.ibm.com> Message-Id: <20201105221905.1350-2-dbuono@linux.vnet.ibm.com> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Tested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
AlexChen
|
dccaea2514 |
tests/qtest/tpm: Remove redundant check in the tpm_test_swtpm_test()
The 'addr' would not be NULL after checking 'succ' is valid, and it has been dereferenced in the previous code(args = g_strdup_printf()). So the check on 'addr' in the tpm_test_swtpm_test() is redundant. Remove it. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Alex Chen <alex.chen@huawei.com> Message-Id: <5FA41448.4040404@huawei.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
AlexChen
|
3dc057923d |
qtest: Fix bad printf format specifiers
We should use printf format specifier "%u" instead of "%d" for argument of type "unsigned int". Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Alex Chen <alex.chen@huawei.com> Message-Id: <5FA28117.3020802@huawei.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Peter Maydell
|
747c6b3811 |
Doc and bug fixes
-----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl+i3mkUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNzSQf/WGDQnxXMt7gNVzWUyc8uest2qLGU OvJlbUJfVg7nbU+9FXP75sL5+KogwyU9znSZ9Jziib9PstRPNA32Wjhariv9fMls wed6c0yxyRN7ZNvis/CxMLQmctMuFZX9hILUGUVgq8uq7tNvA02nStb1sBwCywNO bkjR+ZgKRCh141EI/6GJ0JGbJ4gTEike26ss4pRXxHbDYQO9mw2vIRCw+DpRsoBY 0QrT1IWwh9f7/Sm5a2kOfiRFTP2fmv4Y5udKLDzzkV3oLSMjlSvtn899MSdZ6Jv1 tFAZnq7BxeaQgj/5a9lESRt+SmegdPUTYJh6V4UWRzEOZeFQcOT/qy2gXQ== =zGsk -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging Doc and bug fixes # gpg: Signature made Wed 04 Nov 2020 17:01:29 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: qapi, qemu-options: make all parsing visitors parse boolean options the same qtest: escape device name in device-introspect-test ivshmem-test: do not use short-form boolean option semihosting: fix order of initialization functions fuzz: fuzz offsets within pio/mmio regions fuzz: check the MR in the DMA callback fuzz: fix writing DMA patterns tests/qtest: Fix potential NULL pointer dereference in qos_build_main_args() configure: fix gio_libs reference meson: fix warning for bad sphinx-build tests/qtest/libqos/ahci.c: Avoid NULL dereference in ahci_exec() tests/qtest/libqtest.c: Check for setsockopt() failure meson: vhost-user-gpu/virtiofsd: use absolute path meson: use b_staticpic=false for meson >=0.56.0 qtest: add a reproducer for LP#1878642 hw/isa/lpc_ich9: Ignore reserved/invalid SCI IRQ scripts/oss-fuzz: rename bin/qemu-fuzz-i386 exec: Remove dead code (CID 1432876) docs: expand sourceset documentation cutils: replace strdup with g_strdup Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Paolo Bonzini
|
e27bd49876 |
qtest: escape device name in device-introspect-test
device-introspect-test uses HMP, so it should escape the device name properly. Because of this, a few devices that had commas in their names were escaping testing. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
794b95608f |
ivshmem-test: do not use short-form boolean option
This QemuOpts idiom will be deprecated, so get rid of it in the tests. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexander Bulekov
|
953e6d7c0e |
fuzz: fuzz offsets within pio/mmio regions
The code did not add offsets to FlatRange bases, so we did not fuzz offsets within device MemoryRegions. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20201029172901.534442-4-alxndr@bu.edu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexander Bulekov
|
cc3d99c741 |
fuzz: check the MR in the DMA callback
We should be checking that the device is trying to read from RAM, before filling the region with data. Otherwise, we will try to populate nonsensical addresses in RAM for callbacks on PIO/MMIO reads. We did this originally, however the final version I sent had the line commented out.. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20201029172901.534442-3-alxndr@bu.edu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexander Bulekov
|
a9f67c1d51 |
fuzz: fix writing DMA patterns
This code had all sorts of issues. We used a loop similar to address_space_write_rom, but I did not remove a "break" that only made sense in the context of the switch statement in the original code. Then, after the loop, we did a separate qtest_memwrite over the entire DMA access range, defeating the purpose of the loop. Additionally, we increment the buf pointer, and then try to g_free() it. Fix these problems. Reported-by: OSS-Fuzz (Issue 26725) Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reported-by: OSS-Fuzz (Issue 26691) Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20201029172901.534442-2-alxndr@bu.edu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Philippe Mathieu-Daudé
|
f169413c27 |
hw/mips: Remove the 'r4k' machine
We deprecated the support for the 'r4k' machine for the 5.0 release
(commit
|
||
|
AlexChen
|
c59c582d56 |
tests/qtest: Fix potential NULL pointer dereference in qos_build_main_args()
In qos_build_main_args(), the pointer 'path' is dereferenced before checking it is valid, which may lead to NULL pointer dereference. So move the assignment to 'cmd_line' after checking 'path' is valid. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Alex Chen <alex.chen@huawei.com> Message-Id: <5FA16ED5.4000203@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Peter Maydell
|
0250edf1eb |
tests/qtest/libqos/ahci.c: Avoid NULL dereference in ahci_exec()
In ahci_exec() we attempt to permit the caller to pass a NULL pointer for opts_in (in which case we use a default set of options). However although we check for NULL when setting up the opts variable at the top of the function, we unconditionally dereference opts_in at the end of the function as part of freeing the opts->buffer. Switch to checking whether the final buffer is the same as the buffer we started with, instead of assuming the value we started with is always opts_in->buffer. At the moment all the callers pass a non-NULL opts argument, so we never saw any crashes in practice. Fixes: Coverity CID 1432302 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201103115257.23623-1-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Peter Maydell
|
1d72d9c487 |
tests/qtest/libqtest.c: Check for setsockopt() failure
In socket_accept() we use setsockopt() to set SO_RCVTIMEO, but we don't check the return value for failure. Do so. Fixes: Coverity CID 1432321 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201103115112.19211-1-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexander Bulekov
|
fd25017284 |
qtest: add a reproducer for LP#1878642
https://bugs.launchpad.net/qemu/+bug/1878642 Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201102163336.115444-1-alxndr@bu.edu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Peter Maydell
|
ffb4fbf90a |
tests/qtest/npcm7xx_rng-test: Disable randomness tests
The randomness tests in the NPCM7xx RNG test fail intermittently but fairly frequently. On my machine running the test in a loop: while QTEST_QEMU_BINARY=./qemu-system-aarch64 ./tests/qtest/npcm7xx_rng-test; do true; done will fail in less than a minute with an error like: ERROR:../../tests/qtest/npcm7xx_rng-test.c:256:test_first_byte_runs: assertion failed (calc_runs_p(buf.l, sizeof(buf) * BITS_PER_BYTE) > 0.01): (0.00286205989 > 0.01) (Failures have been observed on all 4 of the randomness tests, not just first_byte_runs.) It's not clear why these tests are failing like this, but intermittent failures make CI and merge testing awkward, so disable running them unless a developer specifically sets QEMU_TEST_FLAKY_RNG_TESTS when running the test suite, until we work out the cause. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20201102152454.8287-1-peter.maydell@linaro.org Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> |
||
|
Christian Schoenebeck
|
4d0746e213 |
tests/9pfs: add local Tunlinkat hard link test
This test case uses a Tunlinkat request to remove a previously hard linked file by using the 9pfs 'local' fs driver. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <9bec33a7d8f006ef8f80517985d0d6ac48650d53.1603285620.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Christian Schoenebeck
|
64e3d40322 |
tests/9pfs: add local Tlink test
This test case uses a Tlink request to create a hard link to a regular file using the 9pfs 'local' fs driver. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <f0d869770ad23ee5ce10f7da90fdb742cadcad72.1603285620.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Christian Schoenebeck
|
5b28ab8bda |
tests/9pfs: add local Tunlinkat symlink test
This test case uses a Tunlinkat request to remove a symlink using the 9pfs 'local' fs driver. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <a23cd4d2ab6d8d3048addab8cbf0416fe5ead43e.1603285620.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Christian Schoenebeck
|
59ff563db1 |
tests/9pfs: add local Tsymlink test
This test case uses a Tsymlink 9p request to create a symbolic link using the 9pfs 'local' fs driver. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <84ac76937855bf441242372cc3e62df42f0a3dc4.1603285620.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Christian Schoenebeck
|
472c18b8bf |
tests/9pfs: add local Tunlinkat file test
This test case uses a Tunlinkat request to remove a regular file using the 9pfs 'local' fs driver. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <4eabeed7f662721dd5664cb77fe36ea0aa08b1ec.1603285620.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Christian Schoenebeck
|
b09dbfdd51 |
tests/9pfs: add local Tlcreate test
This test case uses a Tlcreate 9p request to create a regular file inside host's test directory. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <269cae0c00af941a3a4ae78f1e319f93462a7eb4.1603285620.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Christian Schoenebeck
|
b37d62d6de |
tests/9pfs: add local Tunlinkat directory test
This test case uses a Tunlinkat 9p request with flag AT_REMOVEDIR (see 'man 2 unlink') to remove a directory from host's test directory. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <3c7c65b476ba44bea6afd0b378b5287e1c671a32.1603285620.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Christian Schoenebeck
|
2001880522 |
tests/9pfs: simplify do_mkdir()
Split out walking a directory path to a separate new utility function do_walk() and use that function in do_mkdir(). The code difference saved this way is not much, but we'll use that new do_walk() function in the upcoming patches, so it will avoid quite some code duplication after all. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <4d7275b2363f122438a443ce079cbb355285e9d6.1603285620.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Greg Kurz
|
c1934f630c |
tests/9pfs: Turn fs_mkdir() into a helper
fs_mkdir() isn't a top level test function and thus shouldn't take the "void *obj, void *data, QGuestAllocator *t_alloc" arguments. Turn it into a helper to be used by test functions. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160321018148.266767.15959608711038504029.stgit@bahia.lan> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Greg Kurz
|
1d98613d7c |
tests/9pfs: Turn fs_readdir_split() into a helper
fs_readdir_split() isn't a top level test function and thus shouldn't take the "void *obj, void *data, QGuestAllocator *t_alloc" arguments. Turn it into a helper to be used by test functions. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160321016084.266767.9501523425012383531.stgit@bahia.lan> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Greg Kurz
|
3fe4baf47b |
tests/9pfs: Factor out do_attach() helper
fs_attach() is a top level test function. Factor out the reusable code to a separate helper instead of hijacking it in other tests. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160321017450.266767.17377192504263871186.stgit@bahia.lan> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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|
Greg Kurz
|
382619eff5 |
tests/9pfs: Set alloc in fs_create_dir()
fs_create_dir() is a top level test function. It should set alloc. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160321016764.266767.3763279057643874020.stgit@bahia.lan> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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|
Greg Kurz
|
1c450e6efe |
tests/9pfs: Factor out do_version() helper
fs_version() is a top level test function. Factor out the reusable code to a separate helper instead of hijacking it in other tests. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160321015403.266767.4533967728943968456.stgit@bahia.lan> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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Greg Kurz
|
603cc76a60 |
tests/9pfs: Force removing of local 9pfs test directory
No need to get a complaint from "rm" if some path disappeared for some reason. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160406199444.312256.8319835906008559151.stgit@bahia.lan> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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|
Christian Schoenebeck
|
5409d8bea4 |
tests/9pfs: fix coverity error in create_local_test_dir()
Coverity wants the return value of mkdir() to be checked:
/qemu/tests/qtest/libqos/virtio-9p.c: 48 in create_local_test_dir()
42 /* Creates the directory for the 9pfs 'local' filesystem driver to
access. */
43 static void create_local_test_dir(void)
44 {
45 struct stat st;
46
47 g_assert(local_test_path != NULL);
>>> CID 1435963: Error handling issues (CHECKED_RETURN)
>>> Calling "mkdir(local_test_path, 511U)" without checking return value.
This library function may fail and return an error code.
48 mkdir(local_test_path, 0777);
49
50 /* ensure test directory exists now ... */
51 g_assert(stat(local_test_path, &st) == 0);
52 /* ... and is actually a directory */
53 g_assert((st.st_mode & S_IFMT) == S_IFDIR);
So let's just do that and log an info-level message at least, because we
actually only care if the required directory exists and we do have an
existence check for that in place already.
Reported-by: Coverity (CID 1435963)
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <03f68c7ec08064e20f43797f4eb4305ad21e1e8e.1604061839.git.qemu_oss@crudebyte.com>
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
|
||
|
Christian Schoenebeck
|
136b7af227 |
tests/9pfs: fix test dir for parallel tests
Use mkdtemp() to generate a unique directory for the 9p 'local' tests. This fixes occasional 9p test failures when running 'make check -jN' if QEMU was compiled for multiple target architectures, because the individual architecture's test suites would run in parallel and interfere with each other's data as the test directory was previously hard coded and hence the same directory was used by all of them simultaniously. This also requires a change how the test directory is created and deleted: As the test path is now randomized and virtio_9p_register_nodes() being called in a somewhat undeterministic way, that's no longer an appropriate place to create and remove the test directory. Use a constructor and destructor function for creating and removing the test directory instead. Unfortunately libqos currently does not support setup/teardown callbacks to handle this more cleanly. The constructor functions needs to be in virtio-9p-test.c, not in virtio-9p.c, because in the latter location it would cause all apps that link to libqos (i.e. entirely unrelated test suites) to create a 9pfs test directory as well, which would even break other test suites. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Tested-by: Greg Kurz <groug@kaod.org> Message-Id: <7746f42d8f557593898d3d9d8e57c46e872dfb4f.1604243521.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
||
|
Christian Schoenebeck
|
8db193c410 |
tests/9pfs: make create/remove test dir public
Make functions create_local_test_dir() and remove_local_test_dir() public. They're going to be used in the next patch. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <ec90703cbc23d6b612b3672f946d7741f4a16080.1604243521.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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|
Peter Maydell
|
802427bcda |
target-arm queue:
* raspi: add model of cprman clock manager * sbsa-ref: add an SBSA generic watchdog device * arm/trace: Fix hex printing * raspi: Add models of Pi 3 model A+, Pi Zero and Pi A+ * hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitly * Nuvoton NPCM7xx: Add USB, RNG, GPIO and watchdog support * hw/arm: fix min_cpus for xlnx-versal-virt platform * hw/arm/highbank: Silence warnings about missing fallthrough statements * linux-user: Support Aarch64 BTI * Armv7M systick: fix corner case bugs by rewriting to use ptimer -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAl+YBA4ZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3rWRD/9hqjzL4d7xKcFQdQdRXsxv 7zX82arHdxg9pNvusie/tuhX0PLswQ8TPEHEBVQvngxF7y/HqLBFuZAQvFf4ou6R 9+myTXE2RuWHOYKlrr/M6p4csABXNMm7PiA3VMeKcTEh4DoamLyBz6j1X4obPiA+ tLaRw4azzYAZnHoCaF6BX+4uf4bQZoqAtAS4IodJAAbDXJStl0VUFoS34MPhgW6/ dwGF8DbQJVYRqa7xEXck4Yx7dkx13I66+iYUf9kCyoCkdyz1sIq58fbKhXQP4lqN I3e5XGBVJfeku7w/TGOpsw8OCyTng0z636iglfLVOrsj5N03fT8j72ehY7jJsN9f CgHvQ1JAX1DvA/v23oxs3WccwAOfJJsOERtf9QxyMbTR1czCeIY1LYMnkOFtyL87 6IQpwM0WF1z4lja0dmrvhKJWjqn+kVI2cDtxrprsulCHi+pcIdJMq8vJDfxjpqqe SnDXVSAn8KjBrClaJRqHfbi+5ggsTwsLpBtEToQ4AOR342XVRfEY8IfTLb1D2+6q z99BFiyJtZ6iiJq5jgGMhppN6tEuHFK7Vr6IwhGDgFTchWb6by+K3i8/VzrbWVk9 O+KEeO92dg6jVd+6FyXOPnJ3DcUXEp6EVUVrKBBUC+LTU8Lf1MCgeprjSi87UHIX xQg635uOQU3gxkqxCaE0XA== =OFlu -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201027-1' into staging target-arm queue: * raspi: add model of cprman clock manager * sbsa-ref: add an SBSA generic watchdog device * arm/trace: Fix hex printing * raspi: Add models of Pi 3 model A+, Pi Zero and Pi A+ * hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitly * Nuvoton NPCM7xx: Add USB, RNG, GPIO and watchdog support * hw/arm: fix min_cpus for xlnx-versal-virt platform * hw/arm/highbank: Silence warnings about missing fallthrough statements * linux-user: Support Aarch64 BTI * Armv7M systick: fix corner case bugs by rewriting to use ptimer # gpg: Signature made Tue 27 Oct 2020 11:27:10 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201027-1: (48 commits) hw/timer/armv7m_systick: Rewrite to use ptimers hw/core/ptimer: Support ptimer being disabled by timer callback hw/arm/sbsa-ref: add SBSA watchdog device hw/watchdog: Implement SBSA watchdog device hw/arm/bcm2835_peripherals: connect the UART clock hw/char/pl011: add a clock input hw/misc/bcm2835_cprman: add sane reset values to the registers hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer hw/misc/bcm2835_cprman: implement clock mux behaviour hw/misc/bcm2835_cprman: add a clock mux skeleton implementation hw/misc/bcm2835_cprman: implement PLL channels behaviour hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation hw/misc/bcm2835_cprman: implement PLLs behaviour hw/misc/bcm2835_cprman: add a PLL skeleton implementation hw/arm/raspi: add a skeleton implementation of the CPRMAN hw/arm/raspi: fix CPRMAN base address hw/core/clock: trace clock values in Hz instead of ns hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro arm/trace: Fix hex printing hw/arm/raspi: Add the Raspberry Pi 3 model A+ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
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Havard Skinnemoen
|
526dbbe087 |
hw/gpio: Add GPIO model for Nuvoton NPCM7xx
The NPCM7xx chips have multiple GPIO controllers that are mostly identical except for some minor differences like the reset values of some registers. Each controller controls up to 32 pins. Each individual pin is modeled as a pair of unnamed GPIOs -- one for emitting the actual pin state, and one for driving the pin externally. Like the nRF51 GPIO controller, a gpio level may be negative, which means the pin is not driven, or floating. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Havard Skinnemoen
|
326ccfe240 |
hw/misc: Add npcm7xx random number generator
The RNG module returns a byte of randomness when the Data Valid bit is set. This implementation ignores the prescaler setting, and loads a new value into RNGD every time RNGCS is read while the RNG is enabled and random data is available. A qtest featuring some simple randomness tests is included. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Hao Wu
|
7d378ed6e3 |
hw/timer: Adding watchdog for NPCM7XX Timer.
The watchdog is part of NPCM7XX's timer module. Its behavior is controlled by the WTCR register in the timer. When enabled, the watchdog issues an interrupt signal after a pre-set amount of cycles, and issues a reset signal shortly after that. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: deleted blank line at end of npcm_watchdog_timer-test.c] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Peter Maydell
|
d55450df99 |
migration pull: 2020-10-26
Another go at Peter's postcopy fixes
Cleanups from Bihong Yu and Peter Maydell.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20201026a' into staging
migration pull: 2020-10-26
Another go at Peter's postcopy fixes
Cleanups from Bihong Yu and Peter Maydell.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
# gpg: Signature made Mon 26 Oct 2020 16:17:03 GMT
# gpg: using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7
# gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" [full]
# Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7
* remotes/dgilbert/tags/pull-migration-20201026a:
migration-test: Only hide error if !QTEST_LOG
migration/postcopy: Release fd before going into 'postcopy-pause'
migration: Sync requested pages after postcopy recovery
migration: Maintain postcopy faulted addresses
migration: Introduce migrate_send_rp_message_req_pages()
migration: Pass incoming state into qemu_ufd_copy_ioctl()
migration: using trace_ to replace DPRINTF
migration: Delete redundant spaces
migration: Open brace '{' following function declarations go on the next line
migration: Do not initialise statics and globals to 0 or NULL
migration: Add braces {} for if statement
migration: Open brace '{' following struct go on the same line
migration: Add spaces around operator
migration: Don't use '#' flag of printf format
migration: Do not use C99 // comments
migration: Drop unused VMSTATE_FLOAT64 support
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
||
Peter Xu
|
a47295014d |
migration-test: Only hide error if !QTEST_LOG
The errors are very useful when debugging qtest failures, especially when QTEST_LOG=1 is set. Let's allow override MigrateStart.hide_stderr when QTEST_LOG=1 is specified, because that means the user wants to be verbose. Not very nice to introduce the first QTEST_LOG env access in migration-test.c, however it should be handy. Without this patch, I was hacking error_report() when debugging such errors. Let's make things easier. Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20201021212721.440373-7-peterx@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> |
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|
Peter Maydell
|
a95e0396c8 |
* fix --disable-tcg builds (Claudio)
* Fixes for macOS --enable-modules build and OpenBSD curses/iconv detection (myself) * Start preparing for meson 0.56 (myself) * Move directory configuration to meson (myself) * Start untangling qemu_init (myself) * Windows fixes (Sunil) * Remove -no-kbm (Thomas) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl+WrxEUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNQAggAqfucqEQvz6s+DCPv2u572diyMvhe Y7vmaQF0qYKoAvy5OLqGlqXVsn8lwf19zJWo9Z7k4qNefWl84ii0J/kEmnolzTGq 7Z0CRSnGbNQy9YedYXuymaR3E0VY+6lsPnzIpufQISzQRdjzT8OQ51DMAhc04oQl saXsts7y+om+tzvW2JFGtNsfFRUjcRKqjIAVfwneBXFW9TRD2epvYxz/S0o+XJwF eSiINvTqDxxPyy6XJykC46xf/TTfReHv6fQgTn7Jw3TQuo4m7qXLi5Vj8W1erZJv t3xhZNabt813T6ztNcAAuJ0srIn55Ac7Fuq3/1ecgeVD08ntmabe4WhKRg== =931x -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * fix --disable-tcg builds (Claudio) * Fixes for macOS --enable-modules build and OpenBSD curses/iconv detection (myself) * Start preparing for meson 0.56 (myself) * Move directory configuration to meson (myself) * Start untangling qemu_init (myself) * Windows fixes (Sunil) * Remove -no-kbm (Thomas) # gpg: Signature made Mon 26 Oct 2020 11:12:17 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: machine: move SMP initialization from vl.c machine: move UP defaults to class_base_init machine: remove deprecated -machine enforce-config-section option win32: boot broken when bind & data dir are the same WHPX: Fix WHPX build break configure: move install_blobs from configure to meson configure: remove unused variable from config-host.mak configure: move directory options from config-host.mak to meson configure: allow configuring localedir Makefile: separate meson rerun from the rest of the ninja invocation Remove deprecated -no-kvm option replay: do not build if TCG is not available qtest: unbreak non-TCG builds in bios-tables-test hw/core/qdev-clock: add a reference on aliased clocks do not use colons in test names meson: rewrite curses/iconv test build: fix macOS --enable-modules build Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Alexander Bulekov
|
7fdb505384 |
fuzz: register predefined generic-fuzz configs
We call get_generic_fuzz_configs, which fills an array with
predefined {name, args, objects} triples. For each of these, we add a
new FuzzTarget, that uses a small wrapper to set
QEMU_FUZZ_{ARGS,OBJECTS} to the corresponding predefined values.
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
Message-Id: <20201023150746.107063-16-alxndr@bu.edu>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|
||
|
Alexander Bulekov
|
61fc27e0df |
fuzz: add generic-fuzz configs for oss-fuzz
Predefine some generic-fuzz configs. For each of these, we will create a separate FuzzTarget that can be selected through argv0 and, therefore, fuzzed on oss-fuzz. Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201023150746.107063-15-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Alexander Bulekov
|
82849bcf30 |
fuzz: add an "opaque" to the FuzzTarget struct
It can be useful to register FuzzTargets that have nearly-identical initialization handlers (e.g. for using the same fuzzing code, with different configuration options). Add an opaque pointer to the FuzzTarget struct, so that FuzzTargets can hold some data, useful for storing target-specific configuration options, that can be read by the get_init_cmdline function. Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201023150746.107063-14-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Alexander Bulekov
|
a253932227 |
fuzz: add a crossover function to generic-fuzzer
Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201023150746.107063-10-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Alexander Bulekov
|
ccbd4bc8af |
fuzz: add a DISABLE_PCI op to generic-fuzzer
This new operation is used in the next commit, which concatenates two fuzzer-generated inputs. With this operation, we can prevent the second input from clobbering the PCI configuration performed by the first. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20201023150746.107063-9-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Alexander Bulekov
|
f81cb729be |
fuzz: Add support for custom crossover functions
libfuzzer supports a "custom crossover function". Libfuzzer often tries to blend two inputs to create a new interesting input. Sometimes, we have a better idea about how to blend inputs together. This change allows fuzzers to specify a custom function for blending two inputs together. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20201023150746.107063-8-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Alexander Bulekov
|
20f5a30293 |
fuzz: Add DMA support to the generic-fuzzer
When a virtual-device tries to access some buffer in memory over DMA, we add call-backs into the fuzzer(next commit). The fuzzer checks verifies that the DMA request maps to a physical RAM address and fills the memory with fuzzer-provided data. The patterns that we use to fill this memory are specified using add_dma_pattern and clear_dma_patterns operations. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20201023150746.107063-5-alxndr@bu.edu> [thuth: Reformatted one comment according to the QEMU coding style] Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Alexander Bulekov
|
05efbf2497 |
fuzz: Add PCI features to the generic fuzzer
This patch compares TYPE_PCI_DEVICE objects against the user-provided matching pattern. If there is a match, we use some hacks and leverage QOS to map each possible BAR for that device. Now fuzzed inputs might be converted to pci_read/write commands which target specific. This means that we can fuzz a particular device's PCI configuration space, Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20201023150746.107063-4-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Alexander Bulekov
|
da9bf53198 |
fuzz: Add generic virtual-device fuzzer
This is a generic fuzzer designed to fuzz a virtual device's MemoryRegions, as long as they exist within the Memory or Port IO (if it exists) AddressSpaces. The fuzzer's input is interpreted into a sequence of qtest commands (outb, readw, etc). The interpreted commands are separated by a magic seaparator, which should be easy for the fuzzer to guess. Without ASan, the separator can be specified as a "dictionary value" using the -dict argument (see libFuzzer documentation). Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201023150746.107063-3-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Maxim Levitsky
|
d232b87ec6 |
libqtest: fix memory leak in the qtest_qmp_event_ref
The g_list_remove_link doesn't free the link element, opposed to what I thought. Switch to g_list_delete_link that does free it. Also refactor the code a bit. Thanks for Max Reitz for helping me with this. Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20201019163702.471239-4-mlevitsk@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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|
Maxim Levitsky
|
7f9d519c0d |
libqtest: fix the order of buffered events
By a mistake I added the pending events in a wrong order. Fix this by using g_list_append. Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20201019163702.471239-3-mlevitsk@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Havard Skinnemoen
|
288c31e30d |
tests/qtest: Make npcm7xx_timer-test conditional on CONFIG_NPCM7XX
This test won't work if qemu was compiled without CONFIG_NPCM7XX, as pointed out by Thomas Huth on a different patch. Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Message-Id: <20201023210637.351238-2-hskinnemoen@google.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
|
b7f47e82e2 |
tests/qtest/libqtest: Fix detection of architecture for binaries without path
The qtests can be run directly by specifying the QEMU binary with the QTEST_QEMU_BINARY environment variable, for example: $ QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 tests/qtest/test-hmp However, if you specify a binary without a path, for example with QTEST_QEMU_BINARY=qemu-system-x86_64 if the QEMU binary is in your $PATH, then the test currently simply crashes. Let's try a little bit smarter here by looking for the final '-' instead of the slash. Message-Id: <20201012114816.43546-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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|
Chen Qun
|
9ab4fb21f5 |
tests/migration: fix memleak in wait_command/wait_command_fd
Properly free each command resp to avoid memory leak.
ASAN shows memory leak stack:
Indirect leak of 2352520 byte(s) in 571 object(s) allocated from:
#0 0x7f6ca3308d4e in __interceptor_calloc (/lib64/libasan.so.5+0x112d4e)
#1 0x7f6ca3127a50 in g_malloc0 (/lib64/libglib-2.0.so.0+0x55a50)
#2 0x557bf3c71d2b in qdict_new ../qobject/qdict.c:29
#3 0x557bf3c9caba in parse_object ../qobject/json-parser.c:318
#4 0x557bf3c9ce75 in json_parser_parse ../qobject/json-parser.c:580
#5 0x557bf3c8c8cf in json_message_process_token ../qobject/json-streamer.c:92
#6 0x557bf3c9ea59 in json_lexer_feed_char ../qobject/json-lexer.c:313
#7 0x557bf3c9eeb5 in json_lexer_feed ../qobject/json-lexer.c:350
#8 0x557bf3c4793a in qmp_fd_receive ../tests/qtest/libqtest.c:608
#9 0x557bf3c47b58 in qtest_qmp_receive ../tests/qtest/libqtest.c:618
#10 0x557bf3c44245 in wait_command ../tests/qtest/migration-helpers.c:59
#11 0x557bf3c445cb in migrate_query_status ../tests/qtest/migration-helpers.c:108
#12 0x557bf3c44642 in check_migration_status ../tests/qtest/migration-helpers.c:124
#13 0x557bf3c447e7 in wait_for_migration_status ../tests/qtest/migration-helpers.c:148
#14 0x557bf3c43b8f in test_migrate_auto_converge ../tests/qtest/migration-test.c:1243
......
Fix:
|
||
Claudio Fontana
|
9b1c911654 |
replay: do not build if TCG is not available
this fixes non-TCG builds broken recently by replay reverse debugging. Stub the needed functions in stub/, splitting roughly between functions needed only by system emulation, by system emulation and tools, and by everyone. This includes duplicating some code in replay/, and puts the logic for non-replay related events in the replay/ module (+ the stubs), so this should be revisited in the future. Surprisingly, only _one_ qtest was affected by this, ide-test.c, which resulted in a buzz as the bh events were never delivered, and the bh never executed. Many other subsystems _should_ have been affected. This fixes the immediate issue, however a better way to group replay functionality to TCG-only code could be developed in the long term. Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20201013192123.22632-4-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Claudio Fontana
|
c51a5a23d8 |
qtest: unbreak non-TCG builds in bios-tables-test
the tests assume TCG is available, thus breaking for TCG-only tests, where only the TCG accelerator option is passed to the QEMU binary. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20201013192123.22632-3-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Paolo Bonzini
|
34f02e9f33 |
do not use colons in test names
Starting with meson 0.56, colons are used to separate the subproject name from the test name. Use dash or slash depending on what looks nicer. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Peter Maydell
|
02aa56c4bc |
microvm: fix PCIe IRQs in APIC table.
microvm: add usb support.
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Merge remote-tracking branch 'remotes/kraxel/tags/microvm-20201021-pull-request' into staging
microvm: fix PCIe IRQs in APIC table.
microvm: add usb support.
# gpg: Signature made Wed 21 Oct 2020 15:48:00 BST
# gpg: using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/microvm-20201021-pull-request:
tests/acpi: update expected data files
tests/acpi: add microvm rtc test
tests/acpi: add microvm usb test
tests/acpi: add empty tests/data/acpi/microvm/DSDT.{usb, rtc} files
tests/acpi: allow updates for expected data files
microvm: add usb support
usb/xhci: fixup xhci kconfig deps
usb/xhci: add xhci_sysbus_build_aml() helper
usb/xhci: add include/hw/usb/xhci.h header file
acpi: add aml builder stubs
tests/acpi: disallow changes for microvm/APIC.pcie
tests/acpi: update expected data files
apci: drop has_pci arg for acpi_build_madt
microvm: set pci_irq_mask
x86: make pci irqs runtime configurable
tests/acpi: add empty microvm/APIC.pcie
tests/acpi: allow changes for microvm/APIC.pcie
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Gerd Hoffmann
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66907f3d3b |
tests/acpi: update expected data files
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201020074844.5304-11-kraxel@redhat.com |
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Gerd Hoffmann
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0c491c8485 |
tests/acpi: add microvm rtc test
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201020074844.5304-10-kraxel@redhat.com |
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Gerd Hoffmann
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f072fd2f85 |
tests/acpi: add microvm usb test
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201020074844.5304-9-kraxel@redhat.com |
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Gerd Hoffmann
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702ef9b6ae |
tests/acpi: allow updates for expected data files
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201020074844.5304-7-kraxel@redhat.com |
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Gerd Hoffmann
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0a10b8f718 |
tests/acpi: disallow changes for microvm/APIC.pcie
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201016113835.17465-8-kraxel@redhat.com |
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Gerd Hoffmann
|
129927fdae |
tests/acpi: allow changes for microvm/APIC.pcie
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201016113835.17465-2-kraxel@redhat.com |
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Havard Skinnemoen
|
19d50149c8 |
tests/qtest: Add npcm7xx timer test
This test exercises the various modes of the npcm7xx timer. In particular, it triggers the bug found by the fuzzer, as reported here: https://lists.gnu.org/archive/html/qemu-devel/2020-09/msg02992.html It also found several other bugs, especially related to interrupt handling. The test exercises all the timers in all the timer modules, which expands to 180 test cases in total. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20201008232154.94221-2-hskinnemoen@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Christian Schoenebeck
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653daf3897 |
tests/9pfs: add local Tmkdir test
This test case uses the 9pfs 'local' driver to create a directory and then checks if the expected directory was actually created (as real directory) on host side. This patch introduces a custom split() implementation, because the test code requires non empty array elements as result. For that reason g_strsplit() would not be a good alternative, as it would require additional filter code for reshuffling the array, and the resulting code would be even more complex than this split() function. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <be342f236842272275f65dbe05587f0a5409ad77.1602182956.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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Christian Schoenebeck
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e55b178b5e |
tests/9pfs: add virtio_9p_test_path()
This new public function virtio_9p_test_path() allows 9pfs 'local' tests to translate a path from guest scope to host scope. For instance by passing an empty string it would return the root path on host of the exported 9pfs tree. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <b563d3c73c6391ec927a2622c9f65c09ca56bd83.1602182956.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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Christian Schoenebeck
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051f0e5be1 |
tests/9pfs: wipe local 9pfs test directory
Before running the first 9pfs test case, make sure the test directory for running the 9pfs 'local' tests on is entirely empty. For that reason simply delete the test directory (if any) before (re)creating it on test suite startup. Note: The preferable precise behaviour would be the test directory only being wiped once *before* a test suite run. Right now the test directory is also wiped at the *end* of a test suite run because libqos is calling the virtio_9p_register_nodes() callback for some reason also when a test suite completed. This is suboptimal as developers cannot immediately see what files and directories the 9pfs local tests created precisely after the test suite completed. But fortunately the test directory is not wiped if some test failed. So it is probably not worth it drilling another hole into libqos for this issue. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <b30776ea3289dc40dabc7d0063d825d21d9a65bf.1602182956.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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Christian Schoenebeck
|
3a565c641a |
tests/9pfs: introduce local tests
This patch introduces 9pfs test cases using the 9pfs 'local' filesystem driver which reads/writes/creates/deletes real files and directories. In this initial version, there is only one local test which actually only checks if the 9pfs 'local' device was created successfully. Before the 9pfs 'local' tests are run, a test directory 'qtest-9p-local' is created (with world rwx permissions) under the current working directory. At this point that test directory is not auto deleted yet. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <81fc4b3b6b6c9bf7999e79f5e7cbc364a5f09ddb.1602182956.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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Christian Schoenebeck
|
eefd2394ef |
tests/9pfs: change qtest name prefix to synth
All existing 9pfs test cases are using the 'synth' fs driver so far, which means they are not accessing real files, but a purely simulated (in RAM only) file system. Let's make this clear by changing the prefix of the individual qtest case names from 'fs/' to 'synth/'. That way they'll be easily distinguishable from upcoming new 9pfs test cases supposed to be using a different fs driver. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <e04e75acb849b085c6d6320b2433a15fa935bcff.1602182956.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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Alexander Bulekov
|
fc69fa216c |
fuzz: Disable QEMU's SIG{INT,HUP,TERM} handlers
Prior to this patch, the only way I found to terminate the fuzzer was
either to:
1. Explicitly specify the number of fuzzer runs with the -runs= flag
2. SIGKILL the process with "pkill -9 qemu-fuzz-*" or similar
In addition to being annoying to deal with, SIGKILLing the process skips
over any exit handlers(e.g. registered with atexit()). This is bad,
since some fuzzers might create temporary files that should ideally be
removed on exit using an exit handler. The only way to achieve a clean
exit now is to specify -runs=N , but the desired "N" is tricky to
identify prior to fuzzing.
Why doesn't the process exit with standard SIGINT,SIGHUP,SIGTERM
signals? QEMU installs its own handlers for these signals in
os-posix.c:os_setup_signal_handling, which notify the main loop that an
exit was requested. The fuzzer, however, does not run qemu_main_loop,
which performs the main_loop_should_exit() check. This means that the
fuzzer effectively ignores these signals. As we don't really care about
cleanly stopping the disposable fuzzer "VM", this patch uninstalls
QEMU's signal handlers. Thus, we can stop the fuzzer with
SIG{INT,HUP,TERM} and the fuzzing code can optionally use atexit() to
clean up temporary files/resources.
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
Message-Id: <20201014142157.46028-1-alxndr@bu.edu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Peter Maydell
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b37da83763 |
* qtest improvements (test for crash found with the fuzzer, increase
downtime in migration test, less verbose output when running w/o KVM) * Improve handling of acceptance tests in the Gitlab-CI * Run checkpatch.pl in the Gitlab-CI * Improve the gitlab-pipeline-status script * Misc patches (mark 'moxie' as deprecated, remove stale .gitignore files, ...) -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAl+FhiIRHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbXfcBAAkMc4eUbZ0Wkm7M7TdIRkn1vQEstgvyJN 6t02MuqY0R01rdbIBAnCLSw9okxfCTf7Q33VmC7snLtPo6WmvYIPAXZAnUiz13K1 hGhMJfEY0JSyPEXlENMC/SWcRfNuHud6OPp6KePvn6EQsVZ5CR9SeO5zMsCVj2SP bMaBYIAJsVCEHkR2lq9UXbjckjyO0GQnQ/oR3mNiqDLYBmrXUOxIFMBctgfbuUtm uPuvvknHVQa8foD18qVJ8QYZrpwrqN4edFjcoW3yvwfX6OOhTnx+pY43BG/of9YB OoRY7V4VN8aYmVR08sqyn6PRNpXW9WcSUn8D3JNeiAhLzO/8H197JhHwFVvbZc7t puLECIINy91wH2i3Onx7HWhss3XLUK3HsvWNLrvLui6vdbFHEtiW2/0GbwJzrcA0 a9inH7bvI7BlPiIau/J7goaDv0fzZ7xVXlQcrM8hC9oCWH5gvmvcgTBWJn/5OxUZ fov3iFxcRWslFSQe+D66gBceIl/fScF+TUmPoWyeSlD/f1OR2WW+q8N1FvnbLflz oPutIoja8b6CobzAzp8Igc6/9uQvzCAFB92Y8q1Og7eguQybw7dDtbArjBmjUBVi slFWoY8/ri2+uyiPsyU13Yfu9N5myqdwIQeM7H8sQ7qS40QHp0z2tj18o951xH2w WJv3PlGcez4= =lCRK -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-10-13' into staging * qtest improvements (test for crash found with the fuzzer, increase downtime in migration test, less verbose output when running w/o KVM) * Improve handling of acceptance tests in the Gitlab-CI * Run checkpatch.pl in the Gitlab-CI * Improve the gitlab-pipeline-status script * Misc patches (mark 'moxie' as deprecated, remove stale .gitignore files, ...) # gpg: Signature made Tue 13 Oct 2020 11:49:06 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-10-13: (23 commits) scripts/ci/gitlab-pipeline-status: wait for pipeline creation scripts/ci/gitlab-pipeline-status: use more descriptive exceptions scripts/ci/gitlab-pipeline-status: handle keyboard interrupts scripts/ci/gitlab-pipeline-status: refactor parser creation scripts/ci/gitlab-pipeline-status: give early feedback on running pipelines scripts/ci/gitlab-pipeline-status: improve message regarding timeout scripts/ci/gitlab-pipeline-status: make branch name configurable gitlab: assign python helper files to GitLab maintainers section gitlab: add a CI job to validate the DCO sign off gitlab: add a CI job for running checkpatch.pl configure: fixes indent of $meson setup docs/system/deprecated: Mark the 'moxie' CPU as deprecated Remove superfluous .gitignore files MAINTAINERS: Ignore bios-tables-test in the qtest section Add a comment in bios-tables-test.c to clarify the reason behind approach softmmu/vl: Be less verbose about missing KVM when running the qtests tests/migration: Allow longer timeouts qtest: add fuzz test case Acceptance tests: show test report on GitLab CI Acceptance tests: do not show canceled test logs on GitLab CI ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Ani Sinha
|
07f5903c85 |
Add a comment in bios-tables-test.c to clarify the reason behind approach
A comment is added in bios-tables-test.c that explains the reasoning behind the process of updating the ACPI table blobs when new tests are added or old tests are modified or code is committed that affect tests. The explanation would help future contributors follow the correct process when making code changes that affect ACPI tables. Signed-off-by: Ani Sinha <ani@anisinha.ca> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200929142501.1057-1-ani@anisinha.ca> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
Dr. David Alan Gilbert
|
a4339de2de |
tests/migration: Allow longer timeouts
In travis, with gcov and gprof we're seeing timeouts; hopefully fix this by increasing the test timeouts a bit, but for xbzrle ensure it really does get a couple of cycles through to test the cache. I think the problem in travis is we have about 2 host CPU threads, in the test we have at least 3: a) The vCPU thread (100% flat out) b) The source migration thread c) The destination migration thread if (b) & (c) are slow for any reason - gcov+gperf or a slow host - then they're sharing one host CPU thread so limit the migration bandwidth. Tested on my laptop with: taskset -c 0,1 ./tests/qtest/migration-test -p /x86_64/migration Reported-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20201008160330.130431-1-dgilbert@redhat.com> [thuth: Move the #define to the right location] Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Li Qiang
|
d8dd109501 |
qtest: add fuzz test case
Currently the device fuzzer finds more and more issues. For every fuzz case, we need not only the fixes but also the corresponding test case. We can analysis the reproducer for every case and find what happened in where and write a beautiful test case. However the raw data of reproducer is not friendly to analysis. It will take a very long time, even far more than the fixes itself. So let's create a new file to hold all of the fuzz test cases and just use the raw data to act as the test case. This way nobody will be afraid of writing a test case for the fuzz reproducer. This patch adds the issue LP#1878263 test case. Signed-off-by: Li Qiang <liq3ea@163.com> Message-Id: <20200921160605.19329-1-liq3ea@163.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> [thuth: Slightly adjusted commit message, removed empty lines] Signed-off-by: Thomas Huth <thuth@redhat.com> |
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|
Philippe Mathieu-Daudé
|
4f3ccd4f16 |
tests/qtest: Replace magic value by NANOSECONDS_PER_SECOND definition
Use self-explicit NANOSECONDS_PER_SECOND definition instead of a magic value. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201011194918.3219195-5-f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Paolo Bonzini
|
d8a18da56d |
qemu-iotests, qtest: rewrite test 067 as a qtest
Test 067 from qemu-iotests is executing QMP commands to hotplug and hot-unplug disks, devices and blockdevs. Because the power of the text-based test harness is limited, it is actually limiting the checks that it does, for example by skipping DEVICE_DELETED events. tests/qtest already has a similar test, drive_del-test.c. We can merge them, and even reuse some of the existing code in drive_del-test.c. This will improve the quality of the test by covering DEVICE_DELETED events and testing multiple architectures (therefore covering multiple PCI hotplug mechanisms as well as s390x virtio-ccw). The only difference is that the new test will always use null-co:// for the medium rather than qcow2 or raw, but this should be irrelevant for what the test is covering. For example there are no "qemu-img check" runs in 067 that would check that the file is properly closed. The new tests requires PCI hot-plug support, so drive_del-test is moved from qemu-system-ppc to qemu-system-ppc64. Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
9a613ddccc |
qtest: check that drives are really appearing and disappearing
Do not just trust the HMP commands to create and delete the drive, use query-block to check that this is actually the case. Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Maxim Levitsky
|
bb1a5b97f7 |
qtest: switch users back to qtest_qmp_receive
Let test use the new functionality for buffering events. The only remaining users of qtest_qmp_receive_dict are tests that fuzz the QMP protocol. Tested with 'make check-qtest'. Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20201006123904.610658-4-mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
c45a70d8c2 |
device-plug-test: use qtest_qmp to send the device_del command
Simplify the code now that events are buffered. There is no need anymore to separate sending the command and retrieving the response. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Maxim Levitsky
|
5e34005571 |
qtest: remove qtest_qmp_receive_success
The purpose of qtest_qmp_receive_success was mostly to process events that arrived between the issueing of a command and the "return" line from QMP. This is now handled by the buffering of events that libqtest performs automatically. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> |
||
|
Maxim Levitsky
|
c22045bfe6 |
qtest: Reintroduce qtest_qmp_receive with QMP event buffering
The new qtest_qmp_receive buffers all the received qmp events, allowing qtest_qmp_eventwait_ref to return them. This is intended to solve the race in regard to ordering of qmp events vs qmp responses, as soon as the callers start using the new interface. In addition to that, define qtest_qmp_event_ref a function which only scans the buffer that qtest_qmp_receive stores the events to. This is intended for callers that are only interested in events that were received during the last call to the qtest_qmp_receive. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20201006123904.610658-3-mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Maxim Levitsky
|
1c3e2a38de |
qtest: rename qtest_qmp_receive to qtest_qmp_receive_dict
In the next patch a new version of qtest_qmp_receive will be reintroduced that will buffer received qmp events for later consumption in qtest_qmp_eventwait_ref No functional change intended. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
da00d067ea |
qtest: unify extra_qtest_srcs and extra_qtest_deps
Currently the extra sources and extra dependencies of qtests are held in two separate dictionaries. Use the same trick as tests/meson.build to combine them into one. This will make it easier to update the documentation for unit tests and qtests. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
Eduardo Habkost
|
51c778edd3 |
docs/devel/qtest: Include libqtest API reference
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201005205228.697463-4-ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
Andrew Jones
|
68970d1e0d |
hw/arm/virt: Implement kvm-steal-time
We add the kvm-steal-time CPU property and implement it for machvirt. A tiny bit of refactoring was also done to allow pmu and pvtime to use the same vcpu device helper functions. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-7-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Andrew Jones
|
05889d15d1 |
tests/qtest: Restore aarch64 arm-cpu-features test
arm-cpu-features got dropped from the AArch64 tests during the meson conversion shuffle. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-6-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Peter Maydell
|
6eeea6725a |
* Don't stop at the first unbootable device, continue scanning
* Fix corner cases in booting from ECKD * s390x-ccw bios cleanup part 2 -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAl98tMoRHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbWioA//bp1fp++Apn8w+Bbw3YY30wIG6/OLgjlw k//MtdcNasDswrWEES77lyR9ud22B/MSKqdfFpnTI1vQ8+e6BuH82iu3d7yNS0cd 8tgb8jr1dO4gMjExJZ6ada5gY/ZkNWyM7gJooqVqTd+lEnIeo8yMAIPHE/3OyfeA xIIA0+owppxEQc3UuE3hS7Cu0ph03HDugWDEqMA6LcD2E8Yl2bP3Sh5uztVdjqmI CH1nuB62WR0kNheU+9woKPDBZP/NPwFvLRnJmNZptKensPotiwX1QjK9aqE15iU5 Mr28qVxubRIMxfmlzJ+3NImTNjdJnOgKFxDwP/hCjJ5lBSHgM/69+nZcDt49Cg4k 52LH9y+9RsDvOz7jNle0xn2V+T48ykkzLKvAHT/2wzSqE8eccpKilqP8ZoFPq11c WcyP68C6ag28AK72JRdNN43aM0clTeUVdUMgy4nqu6HzBDDHKhwTyj6W1zbs+aJC bBtITOxZyjrqPi156pJQCKWYrQQyq2SZV7BBAKSq56nkR+wkj4lxSbor2Am8h3Xk 2QQBXtMgsmwcQTOfGlKer9KXWh7bEINh3iGtJ6QDL0KJtUFn2Uyi2U7uiSq4SlGS QH0AIxTKkYZ8VlRNgCCTf4XXJM0LGjX3XKIDePAnY5aA5F5bYdd7vFfCBChUWMML ARN7JMSXL70= =T7wc -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-10-06' into staging * Don't stop at the first unbootable device, continue scanning * Fix corner cases in booting from ECKD * s390x-ccw bios cleanup part 2 # gpg: Signature made Tue 06 Oct 2020 19:17:46 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-10-06: tests/qtest/cdrom: Add more s390x-related boot tests pc-bios/s390: Update the s390-ccw bios binaries pc-bios: s390x: Go into disabled wait when encountering a PGM exception pc-bios: s390x: Use reset PSW if avaliable pc-bios: s390x: Save PSW rework pc-bios: s390x: Fix bootmap.c zipl component entry data handling pc-bios/s390-ccw: break loop if a null block number is reached pc-bios/s390-ccw: fix off-by-one error pc-bios/s390-ccw/main: Remove superfluous call to enable_subchannel() pc-bios/s390-ccw: Allow booting in case the first virtio-blk disk is bad pc-bios/s390-ccw: Scan through all devices if no boot device specified pc-bios/s390-ccw: Do not bail out early if not finding a SCSI disk pc-bios/s390-ccw: Move the inner logic of find_subch() to a separate function pc-bios/s390-ccw: Introduce ENODEV define and remove guards of others pc-bios/s390-ccw: Move ipl-related code from main() into a separate function pc-bios/s390-ccw/Makefile: Compile with -std=gnu99, -fwrapv and -fno-common Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Thomas Huth
|
eb32abd8d9 |
tests/qtest/cdrom: Add more s390x-related boot tests
Let's add two new tests: 1) Booting with "bootindex" is the architected default behavior on the s390x target, so we should have at least one test that is using the "bootindex" property. 2) The s390-ccw bios used to fail when other unbootable devices have been specified before the bootable device (without "bootindex"). Now that the s390-ccw bios is a little bit smarter here, we should test this scenario, too, to avoid regressions. Message-Id: <20200806105349.632-10-thuth@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Paolo Bonzini
|
4d34a86b2b |
slirp: Convert Makefile bits to meson bits
SLIRP uses Meson so it could become a subproject in the future, but our choice of configure options is not yet supported in Meson (https://github.com/mesonbuild/meson/pull/7740). For now, build the library via the main meson.build just like for capstone. This improves the current state of affairs in that we will re-link the qemu executables against a changed libslirp.a, which we wouldn't do before-hand. Tested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Peter Maydell
|
b23317eec4 |
microvm: add pcie support.
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCgAGBQJfdMT5AAoJEEy22O7T6HE4QHkQAKBLDfVAoogJTQgKcgKKVAfb vxH+c0zIX4bXlh+/+aAShXf/1To1BkZtbIxYJX2hx9oec3zO+DK+p1YrAK8O0Lcz hleEyVpYhhX90y0HDzFlF9q05O90vYP+hzj8VW+IgkOJ7nWG+KdkiRBkxlwvn0PJ Zw4qw9fjZ/MW0Ml2UVQv2lfAaTc8XiasZo1ZEfZ8rK/a0ut+0wLefzWzqm//bJD+ Ek2x9Om3okg2emeuBkeSWLlZ40fMGfEXn4UQkE7ZCLN6Q/LqSdEIn00MSjJa8C4T Z3CVNeHRlgG9C80tbM6rs+2YbWhBj0RPa7woNGZmVJaLIsBrMSC5s9ifvvnamtnE wzBm9Qayv67BcQHZOgEgxrSrNc7/tibwvcpGfiT9ONz/PVbMO7eTlRGFnwNGh2Fv 0caPb8Ge9PLyfc7BXLday/0RM91lu3zTOlnfm6U/KFWPucF+zMFN5KCAGyqComxk g+1VxPPpXtCcIFwGYZ1yesKTW6VHFUEb6v5+gkU1UUJhSoz6141AR72DNFm2NA0j gk9GJ5ZZzMlFQV6YcrGkpFo0q0DKqSMy3dU1HjT7zMbh09hhJqdT1dyIBEfxJpgu LvDI318bvBjwqkdnlRxwQ01GZ3HGGkga0UHjz1LbeYlR59UC2wJWtCoMRYt9Oms4 d+b7Fmbec2tU18uVtSOP =BHn7 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kraxel/tags/microvm-20200930-pull-request' into staging microvm: add pcie support. # gpg: Signature made Wed 30 Sep 2020 18:48:41 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/microvm-20200930-pull-request: tests/acpi: update expected data files acpi/gpex: no reason to use a method for _CRS tests/acpi: add microvm pcie test tests/acpi: factor out common microvm test setup tests/acpi: add empty tests/data/acpi/microvm/DSDT.pcie file tests/acpi: allow updates for expected data files microvm/pcie: add 64bit mmio window microvm: add pcie support microvm: add irq table arm: use acpi_dsdt_add_gpex acpi: add acpi_dsdt_add_gpex move MemMapEntry Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Eduardo Habkost
|
d1e2d46467 |
bios-tables-test: Remove kernel-irqchip=off option
We don't need to use kernel-irqchip=off for irq0 override if IRQ routing is supported by the host, which is the case since 2009 (IRQ routing was added to KVM in Linux v2.6.30). This is a more straightforward fix for Launchpad bug #1896263, as it doesn't require increasing the complexity of the MSR code. kernel-irqchip=off is for debugging only and there's no need to increase the complexity of the code just to work around an issue that was already fixed in the kernel. Fixes: https://bugs.launchpad.net/bugs/1896263 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200922194732.2100510-1-ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
ea1edcd7da |
vl: relocate paths to data directories
As an additional advantage, the logic is now unified between POSIX and Win32 systems. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
ec986777ac |
fuzz: use qemu_get_exec_dir
Make things consistent with how softmmu/vl.c uses os_find_datadir. Initializing the path to the executables will also be needed for get_relocatable_path to work. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
a4c13869f9 |
oslib: do not call g_strdup from qemu_get_exec_dir
Just return the directory without requiring the caller to free it. This also removes a bogus check for NULL in os_find_datadir and module_load_one; g_strdup of a static variable cannot return NULL. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Paolo Bonzini
|
fd5eef85fe |
meson: qtest: set "depends" correctly
This does not have any effect on Meson's behavior itself, since "meson test" always rebuilds everything (that is one reason why we are not using it...). However, mtest2make can use this information to do a selective rebuild for the requested suite. Cc: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Gerd Hoffmann
|
7f6c3d1a57 |
tests/acpi: update expected data files
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200928104256.9241-13-kraxel@redhat.com |
||
|
Gerd Hoffmann
|
18bb73b327 |
tests/acpi: add microvm pcie test
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200928104256.9241-11-kraxel@redhat.com |
||
|
Gerd Hoffmann
|
62b61b8552 |
tests/acpi: factor out common microvm test setup
... into new test_acpi_microvm_prepare helper Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200928104256.9241-10-kraxel@redhat.com |
||
|
Gerd Hoffmann
|
928dda4301 |
tests/acpi: allow updates for expected data files
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200928104256.9241-8-kraxel@redhat.com |
||
|
Ani Sinha
|
4280355231 |
tests/acpi: add DSDT.hpbrroot DSDT table blob to test global i440fx hotplug
This change adds a new DSDT golden master table blob to test disabling
hotplug on both pci root bus and pci bridges. Also reverts the change
in file bios-tables-test-allowed-diff.h to make sure its now empty so that
future modifications to acpi tables can be caught.
The following is the disassembled diff between DSDT.hpbridge and DSDT.hpbrroot:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbridge, Tue Sep 29 17:51:04 2020
+ * Disassembly of tests/data/acpi/pc/DSDT.hpbrroot, Tue Sep 29 17:50:00 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x0000139D (5021)
+ * Length 0x00000C07 (3079)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x05
+ * Checksum 0xAD
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -247,38 +247,6 @@
}
}
- Scope (_SB.PCI0)
- {
- OperationRegion (PCST, SystemIO, 0xAE00, 0x08)
- Field (PCST, DWordAcc, NoLock, WriteAsZeros)
- {
- PCIU, 32,
- PCID, 32
- }
-
- OperationRegion (SEJ, SystemIO, 0xAE08, 0x04)
- Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
- {
- B0EJ, 32
- }
-
- OperationRegion (BNMR, SystemIO, 0xAE10, 0x04)
- Field (BNMR, DWordAcc, NoLock, WriteAsZeros)
- {
- BNUM, 32
- }
-
- Mutex (BLCK, 0x00)
- Method (PCEJ, 2, NotSerialized)
- {
- Acquire (BLCK, 0xFFFF)
- BNUM = Arg0
- B0EJ = (One << Arg1)
- Release (BLCK)
- Return (Zero)
- }
- }
-
Scope (_SB)
{
Scope (PCI0)
@@ -737,12 +705,6 @@
Scope (_GPE)
{
Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID
- Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE
- {
- Acquire (\_SB.PCI0.BLCK, 0xFFFF)
- \_SB.PCI0.PCNT ()
- Release (\_SB.PCI0.BLCK)
- }
}
Scope (\_SB.PCI0)
@@ -813,22 +775,6 @@
)
})
}
-
- Device (PHPR)
- {
- Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID
- Name (_UID, "PCI Hotplug resources") // _UID: Unique ID
- Name (_STA, 0x0B) // _STA: Status
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- IO (Decode16,
- 0xAE00, // Range Minimum
- 0xAE00, // Range Maximum
- 0x01, // Alignment
- 0x14, // Length
- )
- })
- }
}
Scope (\)
@@ -878,7 +824,6 @@
{
Scope (PCI0)
{
- Name (BSEL, Zero)
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
@@ -907,436 +852,6 @@
{
Name (_ADR, 0x00030000) // _ADR: Address
}
-
- Device (S20)
- {
- Name (_SUN, 0x04) // _SUN: Slot User Number
- Name (_ADR, 0x00040000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S28)
- {
- Name (_SUN, 0x05) // _SUN: Slot User Number
- Name (_ADR, 0x00050000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S30)
- {
- Name (_SUN, 0x06) // _SUN: Slot User Number
- Name (_ADR, 0x00060000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S38)
- {
- Name (_SUN, 0x07) // _SUN: Slot User Number
- Name (_ADR, 0x00070000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S40)
- {
- Name (_SUN, 0x08) // _SUN: Slot User Number
- Name (_ADR, 0x00080000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S48)
- {
- Name (_SUN, 0x09) // _SUN: Slot User Number
- Name (_ADR, 0x00090000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S50)
- {
- Name (_SUN, 0x0A) // _SUN: Slot User Number
- Name (_ADR, 0x000A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S58)
- {
- Name (_SUN, 0x0B) // _SUN: Slot User Number
- Name (_ADR, 0x000B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S60)
- {
- Name (_SUN, 0x0C) // _SUN: Slot User Number
- Name (_ADR, 0x000C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S68)
- {
- Name (_SUN, 0x0D) // _SUN: Slot User Number
- Name (_ADR, 0x000D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S70)
- {
- Name (_SUN, 0x0E) // _SUN: Slot User Number
- Name (_ADR, 0x000E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S78)
- {
- Name (_SUN, 0x0F) // _SUN: Slot User Number
- Name (_ADR, 0x000F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S80)
- {
- Name (_SUN, 0x10) // _SUN: Slot User Number
- Name (_ADR, 0x00100000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S88)
- {
- Name (_SUN, 0x11) // _SUN: Slot User Number
- Name (_ADR, 0x00110000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S90)
- {
- Name (_SUN, 0x12) // _SUN: Slot User Number
- Name (_ADR, 0x00120000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S98)
- {
- Name (_SUN, 0x13) // _SUN: Slot User Number
- Name (_ADR, 0x00130000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA0)
- {
- Name (_SUN, 0x14) // _SUN: Slot User Number
- Name (_ADR, 0x00140000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA8)
- {
- Name (_SUN, 0x15) // _SUN: Slot User Number
- Name (_ADR, 0x00150000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB0)
- {
- Name (_SUN, 0x16) // _SUN: Slot User Number
- Name (_ADR, 0x00160000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB8)
- {
- Name (_SUN, 0x17) // _SUN: Slot User Number
- Name (_ADR, 0x00170000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC0)
- {
- Name (_SUN, 0x18) // _SUN: Slot User Number
- Name (_ADR, 0x00180000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC8)
- {
- Name (_SUN, 0x19) // _SUN: Slot User Number
- Name (_ADR, 0x00190000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD0)
- {
- Name (_SUN, 0x1A) // _SUN: Slot User Number
- Name (_ADR, 0x001A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD8)
- {
- Name (_SUN, 0x1B) // _SUN: Slot User Number
- Name (_ADR, 0x001B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE0)
- {
- Name (_SUN, 0x1C) // _SUN: Slot User Number
- Name (_ADR, 0x001C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE8)
- {
- Name (_SUN, 0x1D) // _SUN: Slot User Number
- Name (_ADR, 0x001D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF0)
- {
- Name (_SUN, 0x1E) // _SUN: Slot User Number
- Name (_ADR, 0x001E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF8)
- {
- Name (_SUN, 0x1F) // _SUN: Slot User Number
- Name (_ADR, 0x001F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Method (DVNT, 2, NotSerialized)
- {
- If ((Arg0 & 0x10))
- {
- Notify (S20, Arg1)
- }
-
- If ((Arg0 & 0x20))
- {
- Notify (S28, Arg1)
- }
-
- If ((Arg0 & 0x40))
- {
- Notify (S30, Arg1)
- }
-
- If ((Arg0 & 0x80))
- {
- Notify (S38, Arg1)
- }
-
- If ((Arg0 & 0x0100))
- {
- Notify (S40, Arg1)
- }
-
- If ((Arg0 & 0x0200))
- {
- Notify (S48, Arg1)
- }
-
- If ((Arg0 & 0x0400))
- {
- Notify (S50, Arg1)
- }
-
- If ((Arg0 & 0x0800))
- {
- Notify (S58, Arg1)
- }
-
- If ((Arg0 & 0x1000))
- {
- Notify (S60, Arg1)
- }
-
- If ((Arg0 & 0x2000))
- {
- Notify (S68, Arg1)
- }
-
- If ((Arg0 & 0x4000))
- {
- Notify (S70, Arg1)
- }
-
- If ((Arg0 & 0x8000))
- {
- Notify (S78, Arg1)
- }
-
- If ((Arg0 & 0x00010000))
- {
- Notify (S80, Arg1)
- }
-
- If ((Arg0 & 0x00020000))
- {
- Notify (S88, Arg1)
- }
-
- If ((Arg0 & 0x00040000))
- {
- Notify (S90, Arg1)
- }
-
- If ((Arg0 & 0x00080000))
- {
- Notify (S98, Arg1)
- }
-
- If ((Arg0 & 0x00100000))
- {
- Notify (SA0, Arg1)
- }
-
- If ((Arg0 & 0x00200000))
- {
- Notify (SA8, Arg1)
- }
-
- If ((Arg0 & 0x00400000))
- {
- Notify (SB0, Arg1)
- }
-
- If ((Arg0 & 0x00800000))
- {
- Notify (SB8, Arg1)
- }
-
- If ((Arg0 & 0x01000000))
- {
- Notify (SC0, Arg1)
- }
-
- If ((Arg0 & 0x02000000))
- {
- Notify (SC8, Arg1)
- }
-
- If ((Arg0 & 0x04000000))
- {
- Notify (SD0, Arg1)
- }
-
- If ((Arg0 & 0x08000000))
- {
- Notify (SD8, Arg1)
- }
-
- If ((Arg0 & 0x10000000))
- {
- Notify (SE0, Arg1)
- }
-
- If ((Arg0 & 0x20000000))
- {
- Notify (SE8, Arg1)
- }
-
- If ((Arg0 & 0x40000000))
- {
- Notify (SF0, Arg1)
- }
-
- If ((Arg0 & 0x80000000))
- {
- Notify (SF8, Arg1)
- }
- }
-
- Method (PCNT, 0, NotSerialized)
- {
- BNUM = Zero
- DVNT (PCIU, One)
- DVNT (PCID, 0x03)
- }
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200929123011.31836-3-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Ani Sinha
|
5645f99690 |
tests/acpi: unit test exercising global pci hotplug off for i440fx
This change adds a unit test to exercise the case when hotplug is disabled both for pci root bus and the pci bridges by passing the following two switches to qemu: -global PIIX4_PM.acpi-root-pci-hotplug=off -global PIIX4_PM.acpi-pci-hotplug-with-bridge-support=off bios-tables-test-allowed-diff.h documents the fact that a new DSDT acpi gold master binary blob we need to be added to test this. We will do the actual addition in the next patch in the series. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200929123011.31836-2-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
Michael S. Tsirkin
|
f142e4ede7 |
tests/acpi: drop unnecessary files
The last pull added a ton of useless files by mistake.
Drop them all.
Fixes:
|
||
|
Ani Sinha
|
0ed93f4c05 |
tests/acpi: update golden master DSDT binary table blobs for q35
In the previously applied commit ("piix4: don't reserve hw resources when
hotplug is off globally"), we make changes to the ACPI DSDT tables
such that some ACPI code are not generated when bsel is absent. Since
as of this point in time, in q35 machines, we do not use bsel for pci
buses, we need to update the DSDT table blobs.
This patch updates the DSDT golden master tables for q35 machines.
At the same time, we clear bios-tables-test-allowed-diff.h for future
changes which update tables.
Following is a typical diff between the q35 acpi DSDT table blobs:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180105 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Tue Sep 15 18:52:47 2020
+ * Disassembly of /tmp/aml-3O0DR0, Tue Sep 15 18:52:47 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001DFE (7678)
+ * Length 0x00001DF6 (7670)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xAC
+ * Checksum 0x17
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -3113,24 +3113,20 @@
Name (_ADR, 0x00010000) // _ADR: Address
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
{
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
-
- Method (PCNT, 0, NotSerialized)
- {
- }
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-12-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Ani Sinha
|
c4bb646ffb |
Add ACPI DSDT tables for q35 that are being updated by the next patch
The following patch ("piix4: don't reserve hw resources when
hotplug is off globally") modifies certain ACPI tables for q35 machines.
This patch adds those table names to tests/qtest/bios-tables-test-allowed-diff.h
so that unit tests continue to pass and bisection is not broken.
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-10-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Ani Sinha
|
8b434b031f |
tests/acpi: add newly added acpi DSDT table blob for pci bridge hotplug flag
This patch adds a binary blob corresponding to the DSDT acpi table. It is used
to unit test the flag 'acpi-pci-hotplug-with-bridge-support' used with pci
bridges.
This change also clears the file tests/qtest/bios-tables-test-allowed-diff.h
so that future changes which affect the table can be caught.
The following is the diff between files tests/data/acpi/pc/DSDT.bridge and
tests/data/acpi/pc/DSDT.hpbridge after disassembly :
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180105 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.bridge, Fri Sep 11 23:21:34 2020
+ * Disassembly of /tmp/aml-7UURQ0, Fri Sep 11 23:21:34 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001A89 (6793)
+ * Length 0x0000131F (4895)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x09
+ * Checksum 0xF9
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -859,522 +859,32 @@
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
Device (S18)
{
Name (_ADR, 0x00030000) // _ADR: Address
- Name (BSEL, One)
- Device (S00)
- {
- Name (_SUN, Zero) // _SUN: Slot User Number
- Name (_ADR, Zero) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S08)
- {
- Name (_SUN, One) // _SUN: Slot User Number
- Name (_ADR, 0x00010000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S10)
- {
- Name (_SUN, 0x02) // _SUN: Slot User Number
- Name (_ADR, 0x00020000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S18)
- {
- Name (_SUN, 0x03) // _SUN: Slot User Number
- Name (_ADR, 0x00030000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S20)
- {
- Name (_SUN, 0x04) // _SUN: Slot User Number
- Name (_ADR, 0x00040000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S28)
- {
- Name (_SUN, 0x05) // _SUN: Slot User Number
- Name (_ADR, 0x00050000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S30)
- {
- Name (_SUN, 0x06) // _SUN: Slot User Number
- Name (_ADR, 0x00060000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S38)
- {
- Name (_SUN, 0x07) // _SUN: Slot User Number
- Name (_ADR, 0x00070000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S40)
- {
- Name (_SUN, 0x08) // _SUN: Slot User Number
- Name (_ADR, 0x00080000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S48)
- {
- Name (_SUN, 0x09) // _SUN: Slot User Number
- Name (_ADR, 0x00090000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S50)
- {
- Name (_SUN, 0x0A) // _SUN: Slot User Number
- Name (_ADR, 0x000A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S58)
- {
- Name (_SUN, 0x0B) // _SUN: Slot User Number
- Name (_ADR, 0x000B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S60)
- {
- Name (_SUN, 0x0C) // _SUN: Slot User Number
- Name (_ADR, 0x000C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S68)
- {
- Name (_SUN, 0x0D) // _SUN: Slot User Number
- Name (_ADR, 0x000D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S70)
- {
- Name (_SUN, 0x0E) // _SUN: Slot User Number
- Name (_ADR, 0x000E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S78)
- {
- Name (_SUN, 0x0F) // _SUN: Slot User Number
- Name (_ADR, 0x000F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S80)
- {
- Name (_SUN, 0x10) // _SUN: Slot User Number
- Name (_ADR, 0x00100000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S88)
- {
- Name (_SUN, 0x11) // _SUN: Slot User Number
- Name (_ADR, 0x00110000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S90)
- {
- Name (_SUN, 0x12) // _SUN: Slot User Number
- Name (_ADR, 0x00120000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S98)
- {
- Name (_SUN, 0x13) // _SUN: Slot User Number
- Name (_ADR, 0x00130000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA0)
- {
- Name (_SUN, 0x14) // _SUN: Slot User Number
- Name (_ADR, 0x00140000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA8)
- {
- Name (_SUN, 0x15) // _SUN: Slot User Number
- Name (_ADR, 0x00150000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB0)
- {
- Name (_SUN, 0x16) // _SUN: Slot User Number
- Name (_ADR, 0x00160000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB8)
- {
- Name (_SUN, 0x17) // _SUN: Slot User Number
- Name (_ADR, 0x00170000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC0)
- {
- Name (_SUN, 0x18) // _SUN: Slot User Number
- Name (_ADR, 0x00180000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC8)
- {
- Name (_SUN, 0x19) // _SUN: Slot User Number
- Name (_ADR, 0x00190000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD0)
- {
- Name (_SUN, 0x1A) // _SUN: Slot User Number
- Name (_ADR, 0x001A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD8)
- {
- Name (_SUN, 0x1B) // _SUN: Slot User Number
- Name (_ADR, 0x001B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE0)
- {
- Name (_SUN, 0x1C) // _SUN: Slot User Number
- Name (_ADR, 0x001C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE8)
- {
- Name (_SUN, 0x1D) // _SUN: Slot User Number
- Name (_ADR, 0x001D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF0)
- {
- Name (_SUN, 0x1E) // _SUN: Slot User Number
- Name (_ADR, 0x001E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF8)
- {
- Name (_SUN, 0x1F) // _SUN: Slot User Number
- Name (_ADR, 0x001F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Method (DVNT, 2, NotSerialized)
- {
- If ((Arg0 & One))
- {
- Notify (S00, Arg1)
- }
-
- If ((Arg0 & 0x02))
- {
- Notify (S08, Arg1)
- }
-
- If ((Arg0 & 0x04))
- {
- Notify (S10, Arg1)
- }
-
- If ((Arg0 & 0x08))
- {
- Notify (S18, Arg1)
- }
-
- If ((Arg0 & 0x10))
- {
- Notify (S20, Arg1)
- }
-
- If ((Arg0 & 0x20))
- {
- Notify (S28, Arg1)
- }
-
- If ((Arg0 & 0x40))
- {
- Notify (S30, Arg1)
- }
-
- If ((Arg0 & 0x80))
- {
- Notify (S38, Arg1)
- }
-
- If ((Arg0 & 0x0100))
- {
- Notify (S40, Arg1)
- }
-
- If ((Arg0 & 0x0200))
- {
- Notify (S48, Arg1)
- }
-
- If ((Arg0 & 0x0400))
- {
- Notify (S50, Arg1)
- }
-
- If ((Arg0 & 0x0800))
- {
- Notify (S58, Arg1)
- }
-
- If ((Arg0 & 0x1000))
- {
- Notify (S60, Arg1)
- }
-
- If ((Arg0 & 0x2000))
- {
- Notify (S68, Arg1)
- }
-
- If ((Arg0 & 0x4000))
- {
- Notify (S70, Arg1)
- }
-
- If ((Arg0 & 0x8000))
- {
- Notify (S78, Arg1)
- }
-
- If ((Arg0 & 0x00010000))
- {
- Notify (S80, Arg1)
- }
-
- If ((Arg0 & 0x00020000))
- {
- Notify (S88, Arg1)
- }
-
- If ((Arg0 & 0x00040000))
- {
- Notify (S90, Arg1)
- }
-
- If ((Arg0 & 0x00080000))
- {
- Notify (S98, Arg1)
- }
-
- If ((Arg0 & 0x00100000))
- {
- Notify (SA0, Arg1)
- }
-
- If ((Arg0 & 0x00200000))
- {
- Notify (SA8, Arg1)
- }
-
- If ((Arg0 & 0x00400000))
- {
- Notify (SB0, Arg1)
- }
-
- If ((Arg0 & 0x00800000))
- {
- Notify (SB8, Arg1)
- }
-
- If ((Arg0 & 0x01000000))
- {
- Notify (SC0, Arg1)
- }
-
- If ((Arg0 & 0x02000000))
- {
- Notify (SC8, Arg1)
- }
-
- If ((Arg0 & 0x04000000))
- {
- Notify (SD0, Arg1)
- }
-
- If ((Arg0 & 0x08000000))
- {
- Notify (SD8, Arg1)
- }
-
- If ((Arg0 & 0x10000000))
- {
- Notify (SE0, Arg1)
- }
-
- If ((Arg0 & 0x20000000))
- {
- Notify (SE8, Arg1)
- }
-
- If ((Arg0 & 0x40000000))
- {
- Notify (SF0, Arg1)
- }
-
- If ((Arg0 & 0x80000000))
- {
- Notify (SF8, Arg1)
- }
- }
-
- Method (PCNT, 0, NotSerialized)
- {
- BNUM = One
- DVNT (PCIU, One)
- DVNT (PCID, 0x03)
- }
}
Device (S20)
{
Name (_SUN, 0x04) // _SUN: Slot User Number
Name (_ADR, 0x00040000) // _ADR: Address
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
PCEJ (BSEL, _SUN)
}
}
Device (S28)
{
Name (_SUN, 0x05) // _SUN: Slot User Number
Name (_ADR, 0x00050000) // _ADR: Address
@@ -1779,22 +1289,21 @@
If ((Arg0 & 0x40000000))
{
Notify (SF0, Arg1)
}
If ((Arg0 & 0x80000000))
{
Notify (SF8, Arg1)
}
}
Method (PCNT, 0, NotSerialized)
{
BNUM = Zero
DVNT (PCIU, One)
DVNT (PCID, 0x03)
- ^S18.PCNT ()
}
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-9-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Ani Sinha
|
5e3a486211 |
tests/acpi: unit test for 'acpi-pci-hotplug-with-bridge-support' bridge flag
This change adds a new unit test for the global flag 'acpi-pci-hotplug-with-bridge-support' which is available for cold plugged pci bridges in i440fx. The flag can be used to turn off ACPI based hotplug support on all pci bridges. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200918084111.15339-8-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Ani Sinha
|
0fb41e8987 |
tests/acpi: list added acpi table binary file for pci bridge hotplug test
The file 'tests/data/acpi/pc/DSDT.hpbridge' is a newly added acpi table file for testing the pci bridge option 'acpi-pci-hotplug-with-bridge-support' under i440fx. This change documents this fact. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200918084111.15339-7-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Ani Sinha
|
df00a52972 |
tests/acpi: add a new ACPI table in order to test root pci hotplug on/off
A new binary ACPI table tests/data/acpi/pc/DSDT.roothp is added in order
to unit test hotplug on/off capability on the root pci bus for i440fx.
The diff between the table DSDT.bridge and DSDT.roothp is listed below:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180105 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.bridge, Fri Sep 11 22:51:04 2020
+ * Disassembly of /tmp/aml-UGIHQ0, Fri Sep 11 22:51:04 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001A89 (6793)
+ * Length 0x0000140A (5130)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x09
+ * Checksum 0xE6
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -831,61 +831,60 @@
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0510, // Range Minimum
0x0510, // Range Maximum
0x01, // Alignment
0x0C, // Length
)
})
}
}
Scope (\_SB)
{
Scope (PCI0)
{
- Name (BSEL, Zero)
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (S10)
{
Name (_ADR, 0x00020000) // _ADR: Address
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
{
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
Device (S18)
{
Name (_ADR, 0x00030000) // _ADR: Address
- Name (BSEL, One)
+ Name (BSEL, Zero)
Device (S00)
{
Name (_SUN, Zero) // _SUN: Slot User Number
Name (_ADR, Zero) // _ADR: Address
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
PCEJ (BSEL, _SUN)
}
}
Device (S08)
{
Name (_SUN, One) // _SUN: Slot User Number
Name (_ADR, 0x00010000) // _ADR: Address
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
@@ -1345,456 +1344,30 @@
Notify (SE8, Arg1)
}
If ((Arg0 & 0x40000000))
{
Notify (SF0, Arg1)
}
If ((Arg0 & 0x80000000))
{
Notify (SF8, Arg1)
}
}
Method (PCNT, 0, NotSerialized)
{
- BNUM = One
+ BNUM = Zero
DVNT (PCIU, One)
DVNT (PCID, 0x03)
}
}
- Device (S20)
- {
- Name (_SUN, 0x04) // _SUN: Slot User Number
- Name (_ADR, 0x00040000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S28)
- {
- Name (_SUN, 0x05) // _SUN: Slot User Number
- Name (_ADR, 0x00050000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S30)
- {
- Name (_SUN, 0x06) // _SUN: Slot User Number
- Name (_ADR, 0x00060000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S38)
- {
- Name (_SUN, 0x07) // _SUN: Slot User Number
- Name (_ADR, 0x00070000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S40)
- {
- Name (_SUN, 0x08) // _SUN: Slot User Number
- Name (_ADR, 0x00080000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S48)
- {
- Name (_SUN, 0x09) // _SUN: Slot User Number
- Name (_ADR, 0x00090000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S50)
- {
- Name (_SUN, 0x0A) // _SUN: Slot User Number
- Name (_ADR, 0x000A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S58)
- {
- Name (_SUN, 0x0B) // _SUN: Slot User Number
- Name (_ADR, 0x000B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S60)
- {
- Name (_SUN, 0x0C) // _SUN: Slot User Number
- Name (_ADR, 0x000C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S68)
- {
- Name (_SUN, 0x0D) // _SUN: Slot User Number
- Name (_ADR, 0x000D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S70)
- {
- Name (_SUN, 0x0E) // _SUN: Slot User Number
- Name (_ADR, 0x000E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S78)
- {
- Name (_SUN, 0x0F) // _SUN: Slot User Number
- Name (_ADR, 0x000F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S80)
- {
- Name (_SUN, 0x10) // _SUN: Slot User Number
- Name (_ADR, 0x00100000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S88)
- {
- Name (_SUN, 0x11) // _SUN: Slot User Number
- Name (_ADR, 0x00110000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S90)
- {
- Name (_SUN, 0x12) // _SUN: Slot User Number
- Name (_ADR, 0x00120000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S98)
- {
- Name (_SUN, 0x13) // _SUN: Slot User Number
- Name (_ADR, 0x00130000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA0)
- {
- Name (_SUN, 0x14) // _SUN: Slot User Number
- Name (_ADR, 0x00140000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA8)
- {
- Name (_SUN, 0x15) // _SUN: Slot User Number
- Name (_ADR, 0x00150000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB0)
- {
- Name (_SUN, 0x16) // _SUN: Slot User Number
- Name (_ADR, 0x00160000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB8)
- {
- Name (_SUN, 0x17) // _SUN: Slot User Number
- Name (_ADR, 0x00170000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC0)
- {
- Name (_SUN, 0x18) // _SUN: Slot User Number
- Name (_ADR, 0x00180000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC8)
- {
- Name (_SUN, 0x19) // _SUN: Slot User Number
- Name (_ADR, 0x00190000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD0)
- {
- Name (_SUN, 0x1A) // _SUN: Slot User Number
- Name (_ADR, 0x001A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD8)
- {
- Name (_SUN, 0x1B) // _SUN: Slot User Number
- Name (_ADR, 0x001B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE0)
- {
- Name (_SUN, 0x1C) // _SUN: Slot User Number
- Name (_ADR, 0x001C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE8)
- {
- Name (_SUN, 0x1D) // _SUN: Slot User Number
- Name (_ADR, 0x001D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF0)
- {
- Name (_SUN, 0x1E) // _SUN: Slot User Number
- Name (_ADR, 0x001E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF8)
- {
- Name (_SUN, 0x1F) // _SUN: Slot User Number
- Name (_ADR, 0x001F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Method (DVNT, 2, NotSerialized)
- {
- If ((Arg0 & 0x10))
- {
- Notify (S20, Arg1)
- }
-
- If ((Arg0 & 0x20))
- {
- Notify (S28, Arg1)
- }
-
- If ((Arg0 & 0x40))
- {
- Notify (S30, Arg1)
- }
-
- If ((Arg0 & 0x80))
- {
- Notify (S38, Arg1)
- }
-
- If ((Arg0 & 0x0100))
- {
- Notify (S40, Arg1)
- }
-
- If ((Arg0 & 0x0200))
- {
- Notify (S48, Arg1)
- }
-
- If ((Arg0 & 0x0400))
- {
- Notify (S50, Arg1)
- }
-
- If ((Arg0 & 0x0800))
- {
- Notify (S58, Arg1)
- }
-
- If ((Arg0 & 0x1000))
- {
- Notify (S60, Arg1)
- }
-
- If ((Arg0 & 0x2000))
- {
- Notify (S68, Arg1)
- }
-
- If ((Arg0 & 0x4000))
- {
- Notify (S70, Arg1)
- }
-
- If ((Arg0 & 0x8000))
- {
- Notify (S78, Arg1)
- }
-
- If ((Arg0 & 0x00010000))
- {
- Notify (S80, Arg1)
- }
-
- If ((Arg0 & 0x00020000))
- {
- Notify (S88, Arg1)
- }
-
- If ((Arg0 & 0x00040000))
- {
- Notify (S90, Arg1)
- }
-
- If ((Arg0 & 0x00080000))
- {
- Notify (S98, Arg1)
- }
-
- If ((Arg0 & 0x00100000))
- {
- Notify (SA0, Arg1)
- }
-
- If ((Arg0 & 0x00200000))
- {
- Notify (SA8, Arg1)
- }
-
- If ((Arg0 & 0x00400000))
- {
- Notify (SB0, Arg1)
- }
-
- If ((Arg0 & 0x00800000))
- {
- Notify (SB8, Arg1)
- }
-
- If ((Arg0 & 0x01000000))
- {
- Notify (SC0, Arg1)
- }
-
- If ((Arg0 & 0x02000000))
- {
- Notify (SC8, Arg1)
- }
-
- If ((Arg0 & 0x04000000))
- {
- Notify (SD0, Arg1)
- }
-
- If ((Arg0 & 0x08000000))
- {
- Notify (SD8, Arg1)
- }
-
- If ((Arg0 & 0x10000000))
- {
- Notify (SE0, Arg1)
- }
-
- If ((Arg0 & 0x20000000))
- {
- Notify (SE8, Arg1)
- }
-
- If ((Arg0 & 0x40000000))
- {
- Notify (SF0, Arg1)
- }
-
- If ((Arg0 & 0x80000000))
- {
- Notify (SF8, Arg1)
- }
- }
-
Method (PCNT, 0, NotSerialized)
{
- BNUM = Zero
- DVNT (PCIU, One)
- DVNT (PCID, 0x03)
^S18.PCNT ()
}
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-4-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Ani Sinha
|
274763957b |
tests/acpi: add new unit test to test hotplug off/on feature on the root pci bus
Ability to turn hotplug off on the pci root bus for i440fx was added in commit:
|
||
|
Ani Sinha
|
eb9609a17d |
tests/acpi: mark addition of table DSDT.roothp for unit testing root pci hotplug
A new binary acpi table tests/data/acpi/pc/DSDT.roothp is added in order to
unit test the feature flag that can disable/enable root pci bus hotplug on
i440fx. This feature was added with the commit:
|