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9a819377d8
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422 Commits

Author SHA1 Message Date
aurel32
9a819377d8 target-ppc: fix fcmp{o,u} instructions 
The instructions are specified to update the condition register even if
an error is to be signaled because of NaN input.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6034 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 19:34:09 +00:00
aurel32
b12363e1b7 target-ppc: remove FPRF optimization 
FPRF optimization is totally broken, remove it.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6033 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:59:08 +00:00
aurel32
6e35d5243c target-ppc: fix mtfsb0 and mtfsb1 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6032 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:40:58 +00:00
aurel32
7889270acb target-ppc: display FPSCR in register dump 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6031 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:40:49 +00:00
aurel32
2637004698 target-ppc: fix mbar opcode 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6027 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 11:12:20 +00:00
aurel32
6ad7365a81 target-ppc: fix fsel instruction 
Fix fsel instruction.  Eliminate unneeded temporaries while we're at it,
too.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6026 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 11:12:10 +00:00
aurel32
5e9ae189f8 target-ppc: keep only the table version for mfrom 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6007 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 12:30:21 +00:00
aurel32
be94c952e4 target-ppc: use accessors to access fp_status exception_flags 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6006 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 12:13:33 +00:00
aurel32
cf1cf21eac target-ppc: fix compilation with PRECISE_EMULATION 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6004 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 11:46:36 +00:00
aurel32
a44d2ce18a target-ppc: fix compilation with CONFIG_SOFTFLOAT 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6003 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 11:46:27 +00:00
aurel32
9322057384 target-ppc: remove remaining warnings 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5991 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:33 +00:00
aurel32
94fa46e2c2 target-ppc: remove unneeded include 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5990 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:25 +00:00
aurel32
e06fcd754e target-ppc: rework exception code 
... also remove two warnings.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5989 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:14 +00:00
aurel32
2a3ec4b5b3 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5988 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:04 +00:00
aurel32
4c2ab98869 target-ppc: enable SPE and Altivec in user mode 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5965 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-10 15:02:33 +00:00
aurel32
fe463b7dbc target-ppc: initialize MSR appropriately in user-mode 
Mask the initial MSR with the mask from the PowerPC CPU definition.

Noticed by Nathan Froyd.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5964 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-10 15:02:24 +00:00
aurel32
db9a16a70c target-ppc: kill a warning 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5952 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:50 +00:00
aurel32
0e69805af6 target-ppc: cleanup op_helper.c after TCG conversion 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5951 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:42 +00:00
aurel32
b4cec7b455 target-ppc: enable access type in MMU 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5950 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:33 +00:00
aurel32
76db3ba44e target-ppc: memory load/store rework 
Rework the memory load/store:
- Unify load/store functions for 32-bit and 64-bit CPU
- Don't swap values twice for bit-reverse load/store functions
  in little endian mode.
- On a 64-bit CPU in 32-bit mode, do the address truncation for
  address computation instead of every load store. Truncate the
  address when incrementing the address (if needed)
- Cache writes to access_types.
- Add a few missing calls to gen_set_access_type()

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5949 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:21 +00:00
aurel32
0c34a5d722 target-ppc: kill a few warnings 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5941 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 23:00:00 +00:00
aurel32
e8fc4fa7a1 target-ppc: disable single stepping 
... which left was enabled by mistake.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5918 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 16:23:22 +00:00
aurel32
ec72e276c5 target-ppc: Fix use of uninitialized TCG variable in tlbiva 
Silences a warning about possible unitialized use of t0.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5915 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 15:45:15 +00:00
aurel32
45d827d2d7 target-ppc: convert SPR accesses to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5910 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 13:40:29 +00:00
aurel32
fa0d32c4e4 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5909 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 13:40:15 +00:00
aurel32
8983da70c4 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5896 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 22:01:01 +00:00
aurel32
74d37793f4 target-ppc: convert SLB/TLB instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5895 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 21:46:17 +00:00
aurel32
06dca6a7c1 target-ppc: convert dcr load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5893 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 16:37:18 +00:00
aurel32
6527f6ea9c target-ppc: convert msr load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5892 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 13:03:35 +00:00
aurel32
22e0e17337 target-ppc: convert POWER bridge instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5891 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 12:19:14 +00:00
aurel32
7487953d70 target-ppc: convert POWER shift instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5882 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-05 07:21:44 +00:00
aurel32
54cdcae646 target-ppc: add functions to load/store SPR 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5881 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-05 07:21:31 +00:00
aurel32
b8dbdddc9e target-ppc: remove unused file op_mem_access.h 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5838 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 17:54:28 +00:00
aurel32
dcc532c809 target-ppc: use ldl/ldub/stl/stub for load/store in op_helper.c 
Should not give any performance penality given cpu_mmu_index() is
an inline function returning a value from env.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5837 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 17:54:21 +00:00
aurel32
ef0d51af1e target-ppc: convert PPC 440 instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5836 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 17:26:29 +00:00
aurel32
d72a19f7bd target-ppc: convert return from interrupt instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5832 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:55 +00:00
aurel32
fa407c030c target-ppc: convert external load/store instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5831 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:47 +00:00
aurel32
cf360a32af target-ppc: convert load/store with reservation instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5830 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:39 +00:00
aurel32
bdb4b68907 target-ppc: convert lscbx instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5829 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:30 +00:00
aurel32
dfbc799d8e target-ppc: convert load/store string instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5828 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:21 +00:00
aurel32
37d269dfc6 target-ppc: convert icbi instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5827 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:13 +00:00
aurel32
799a8c8d0a target-ppc: convert dcbz instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5826 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:05 +00:00
aurel32
ff4a62cd81 target-ppc: convert load/store multiple instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5825 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:56 +00:00
aurel32
931ff27258 target-ppc: convert wait instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5824 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:46 +00:00
aurel32
cf02a65c77 target-ppc: convert mfrom instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5823 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:35 +00:00
aurel32
e49a3c8f85 target-ppc: remove dead code from op.c 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5822 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:25 +00:00
aurel32
2cbd949d7a Common cpu_loop_exit prototype 
All archs use the same cpu_loop_exit, so move the prototype in a common
header. i386 was carrying a __hidden attribute, but that was empty for
this arch anyway.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:09 +00:00
aurel32
0f3955e2d2 target-ppc: convert software TLB instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5819 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:22:56 +00:00
aurel32
01a4afeb99 target-ppc: convert POWER2 load/store instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5805 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-27 19:30:56 +00:00
aurel32
6a6ae23f3c target-ppc: convert SPE load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5804 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-27 19:30:47 +00:00