Commit Graph

521 Commits

Author SHA1 Message Date
Tsuneo Saito
b5176d279a SPARC64: treat UA2007 ASI_BLK_* as translating ASIs.
UA2007 ASI_BLK_* should be added in is_translating_asi().

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-20 21:11:08 +00:00
Tsuneo Saito
b7d69dc233 SPARC64: add missing break on fmovdcc
"break" is missing on V9 fmovdcc (%icc).

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-20 20:44:50 +00:00
Tsuneo Saito
afcb737512 SPARC64: fix VIS1 SIMD signed compare instructions
The destination registers of SIMD signed compare instructions
(fcmp*<16|32>) are not FP registers but general purpose r registers.
Comparisons should be freg_rs1 CMP freg_rs2, that were reversed.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-20 20:44:23 +00:00
Blue Swirl
f838e2c535 Sparc: fix FPU and AM enable checks for translation
Translation used incorrectly CPUState fields directly to check
for FPU enable state and 32 bit address masking on Sparc64.

Fix by using TB flags instead.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 17:30:43 +00:00
Tsuneo Saito
d8e586ffcc SPARC64: C99 comment fix for block-transfer ASIs
Fixed C99 comments on block-tranfer ASIs.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 15:36:50 +00:00
Tsuneo Saito
d920bde923 SPARC64: Add JPS1 ASI_BLK_AIU[PS]L ASIs for ldfa and stfa
Support JPS1 little endian block transfer ASIs.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 15:36:44 +00:00
Tsuneo Saito
073a044410 SPARC64: Add UA2007 ASI_BLK_AIU[PS]L? ASIs for stfa
Support UA2007 block store ASIs for stfa instructions.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 15:36:37 +00:00
Tsuneo Saito
41317e2e2b SPARC64: Add UA2007 ASI_BLK_AIU[PS]L? ASIs for ldfa
Support UA2007 block load ASIs for ldfa instructions.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 15:36:30 +00:00
Tsuneo Saito
5f06b54718 SPARC64: fp_disabled checks on stfa/stdfa/stqfa
stfa/stdfa/stqfa instructions should raise fp_disabled exceptions
if %pstate.PEF==0 or %fprs.FEF==0.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 15:36:15 +00:00
Tsuneo Saito
e1ef36c4a3 SPARC64: Implement stfa/stdfa/stqfa instrcutions properly
This patch implements sparcv9 stfa/stdfa/stqfa instructions
with non block-store ASIs.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 15:36:10 +00:00
Tsuneo Saito
8872eb4f56 SPARC64: fp_disabled checks on ldfa/lddfa/ldqfa
ldfa/lddfa/ldqfa instructions should raise fp_disabled exceptions
if %pstate.PEF==0 or %fprs.FEF==0.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 15:35:01 +00:00
Tsuneo Saito
4183f36df0 SPARC64: Implement ldfa/lddfa/ldqfa instructions properly
This patch implements sparcv9 ldfa/lddfa/ldqfa instructions
with non block-load ASIs.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14 15:34:34 +00:00
Artyom Tarasenko
8e91ed3080 fix cpu_cc_src and cpu_cc_src2 corruption in udivx and sdivx
udivx and sdvix don't modify condition flags, so they shall not
overwrite cpu_cc_*

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-01 21:28:00 +00:00
Blue Swirl
2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Blue Swirl
f081c76ccf Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is
needed by later patches.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:31 +00:00
Blue Swirl
f3e270377a exec.h: fix coding style and change cpu_has_work to return bool
Before the next patch, fix coding style of the areas affected.

Change the type of the return value from cpu_has_work() and
qemu_cpu_has_work() to bool.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:26 +00:00
Blue Swirl
e67768d0f1 sparc: move do_interrupt to helper.c
do_interrupt() was mixing CPUState pointer passed from caller
and global env (AREG0).

Fix by moving the function to helper.c. Introduce a helper for calling
change_pstate() safely from outside of execution context.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:17 +00:00
Blue Swirl
fa3c9559db sparc: fix coding style of the area to be moved
Before the next patch, fix coding style of the areas affected.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:15 +00:00
Blue Swirl
1162c041c1 cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relying
on global env.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:13 +00:00
Blue Swirl
4d2c2b77f3 Sparc32: dummy implementation of MXCC MMU breakpoint registers
Add dummy registers for SuperSPARC MXCC MMU counter breakpoints, save
and load all MXCC registers.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:09 +00:00
Alexandre Raymond
9bf0960a9a Fix compilation warning due to missing header for sigaction (followup)
This patch removes all references to signal.h when qemu-common.h is included
as they become redundant.

Signed-off-by: Alexandre Raymond <cerbere@gmail.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-06-08 09:04:29 +01:00
Blue Swirl
dcfd14b374 Delete unused tb_invalidate_page_range
tb_invalidate_page_range() was intended to be used to invalidate an
area of a TB which the guest explicitly flushes from i-cache. However,
QEMU detects writes to code areas where TBs have been generated, so
his has never been useful.

Delete the function, adjust callers.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-22 10:47:28 +00:00
Blue Swirl
86f1f2aee8 sparc64: fix incorrect BPcc target sign extension
Fix wrong number of bits used when sign extending the branch offset of BPcc
instructions.

Reported-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-14 07:30:31 +00:00
Blue Swirl
a2589e5cf2 sparc64: fix wrpstate and wrtl on delay slot
Use TCG local to work around TCG register flush due to a branch.

Thanks to Artyom Tarasenko, Igor Kovalenko and Aurelien Jarno.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-14 07:30:28 +00:00
Stefan Weil
618ba8e6a1 Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.
Is is now unused, so remove it.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:37:03 +02:00
Stefan Weil
e87b7cb0f0 Remove unused function parameters from gen_pc_load and rename the function
Function gen_pc_load was introduced in commit
d2856f1ad4.
The only reason for parameter searched_pc was
a debug statement in target-i386/translate.c.

Parameter puc was needed by target-sparc until
commit d7da2a1040.

Remove searched_pc from the debug statement and remove both
parameters from the parameter list of gen_pc_load.

As the function name gen_pc_load was also misleading,
it is now called restore_state_to_opc. This new name
was suggested by Peter Maydell, thanks.

v2: Remove last parameter, too, and rename the function.

v3: Fix [] typo in target-arm/translate.c.
    Fix wrong SHA1 object name in commit message (copy+paste error).

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:33:59 +02:00
Stefan Weil
4b4a72e556 Fix conversions from pointer to tcg_target_long
tcg_gen_exit_tb takes a parameter of type tcg_target_long,
so the type casts of pointer to long should be replaced by
type casts of pointer to tcg_target_long (suggested by Blue Swirl).

These changes are needed for build environments where
sizeof(long) != sizeof(void *), especially for w64.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10 00:45:16 +02:00
Paolo Bonzini
eda48c344f inline cpu_halted into sole caller
All implementations are now the same, and there is only one caller,
so inline the function there.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-13 14:44:21 +00:00
Fabien Chouteau
60f356e86d SPARC: Fix Leon3 cache control
The "leon3_cache_control_int" (op_helper.c) function is called within leon3.c
which leads to segfault error with the global "env".

Now cache control is a CPU feature and everything is handled in op_helper.c.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-02-01 17:01:41 +00:00
Fabien Chouteau
4a2ba23284 SPARC: Add asr17 register support
This register is activated by CPU_FEATURE_ASR17 in the feature field.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-24 20:54:34 +00:00
Fabien Chouteau
b04d989054 SPARC: Emulation of Leon3
Leon3 is an open-source VHDL System-On-Chip, well known in space industry (more
information on http://www.gaisler.com).

Leon3 is made of multiple components available in the GrLib VHDL library.
Three devices are implemented: uart, timers and IRQ manager.
You can find code for these peripherals in the grlib_* files.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-24 20:54:34 +00:00
Blue Swirl
1b5f56b134 sparc: fix NaN handling
Fix several bugs in NaN handling:
 * e in fcmpe* only changes qNaN handling
 * FCC is unchanged if an exception is raised
 * clear previous FTT before setting it

Reported-by: Mateusz Loskot <mateusz@loskot.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-18 21:34:51 +00:00
Aurelien Jarno
0fcec41eec target-sparc: fix udiv(cc) and sdiv(cc)
Since commit 5a4bb580cd, Xorg crashes on
a Debian Etch image. The commit itself is fine, but it triggers a bug
due to wrong computation of flags for udiv(cc) and sdiv(cc).

This patch only compute cc_src2 for the cc version of udiv/sdiv. It
also moves the update of cc_dst and cc_op to the helper, as it is
faster doing it here when there is already an helper.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-28 18:44:51 +00:00
Blue Swirl
d41160a3e6 Sparc: implement monitor command 'info tlb'
Use existing dump_mmu() to implement monitor command 'info tlb'.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-19 13:42:56 +00:00
Stefan Weil
047b39e47c target-sparc: Use fprintf_function (format checking)
This change was missing in commit
9a78eead0c.

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-04 20:51:15 +00:00
Peter Maydell
ef5e4ea587 target-sparc: remove unused functions cpu_lock(), cpu_unlock() 2010-12-03 15:09:39 +02:00
Stefan Weil
9a78eead0c target-xxx: Use fprintf_function (format checking)
fprintf_function uses format checking with GCC_FMT_ATTR.

Format errors were fixed in
* target-i386/helper.c
* target-mips/translate.c
* target-ppc/translate.c

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-10-30 08:01:59 +00:00
Paolo Bonzini
a88790a14f remove exec-all.h inclusion from cpu.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-03 09:48:24 +03:00
Paolo Bonzini
10eb0cc03c move cpu_pc_from_tb to target-*/exec.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-03 09:48:12 +03:00
Igor V. Kovalenko
fb170183e7 sparc64: fix umul and smul insns
- truncate and sign or zero extend operands before multiplication
- factor out common code to gen_op_multiply() with parameter to sign/zero extend
- call gen_op_multiply from gen_op_umul and gen_op_smul

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:08:44 +00:00
Igor V. Kovalenko
09487205bb sparc64: fix udiv and sdiv insns
- truncate second operand to 32bit

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:07:13 +00:00
Igor V. Kovalenko
0e2fa9cab9 sparc64: improve ldf and stf insns
- implemented block load/store primary/secondary with user privilege

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:06:46 +00:00
Igor V. Kovalenko
b219094ace sparc64: use symbolic name for MMU index v1
- use symbolic name for MMU index
v0->v1:
- change debug traces to DPRINTF_MMU
- fix debug trace function names

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:06:04 +00:00
Igor V. Kovalenko
fe987e2394 sparc64: fix ldxfsr insn
- rearrange code to break from switch when appropriate
- allow deprecated ldfsr insn

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:05:30 +00:00
Igor V. Kovalenko
1295001c53 sparc64: fix missing address masking v1
- address masking for ldqf and stqf insns
- address masking for lddf and stdf insns
- address masking for translating ASI (Ultrasparc IIi)
v0->v1:
- move arch-specific code to helpers and drop more ifdefs at call sites
  using new helper asi_address_mask()
- change user emulation to use asi_address_mask()

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:03:52 +00:00
Igor V. Kovalenko
9168b3a545 sparc64: fix tag access register on mmu traps
- set mmu tag access register on FAULT and PROT traps as well

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:03:16 +00:00
Artyom Tarasenko
da7ed37955 sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)
SuperSPARC MMU Breakpoint Action register is used by OBP at boot

The patch allows booting Solaris and some other OS with
SPARCStation-20 OBP.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29 21:22:02 +00:00
Blue Swirl
03ae77d6d2 sparc64: fix user emulator build
Accesses with _nucleus prefix are not available when building user
emulators:
  CC    sparc64-linux-user/op_helper.o
cc1: warnings being treated as errors
/src/qemu/target-sparc/op_helper.c: In function 'helper_ldda_asi':
/src/qemu/target-sparc/op_helper.c:3063: error: implicit declaration of function 'ldq_nucleus'

Avoid making such accesses. Fixes breakage by 54a3c0f032.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29 10:20:44 +00:00
Igor V. Kovalenko
54a3c0f032 sparc64: fix 128-bit atomic load from nucleus context v1
- change 128-bit atomic loads to reference nucleus context
v0->v1: dropped disassembler change
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29 07:26:57 +00:00
Igor V. Kovalenko
664a65b0db sparc64: flush translations on mmu context change
- two pairs of softmmu indexes bind softmmu tlb to cpu tlb in fault handlers
  using value of DMMU primary and secondary context registers, so we need to
  flush softmmu translations when context registers are changed

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22 12:52:38 +00:00