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pseries: Remove XICS irq type enum type

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Currently the XICS interrupt controller emulation uses a custom enum to
specify whether a given interrupt is level-sensitive or message-triggered.
This enum makes life awkward for saving the state, and isn't particularly
useful since there are only two possibilities.  This patch replaces the
enum with a simple bool.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
David Gibson 2012-09-12 16:57:18 +00:00 committed by Alexander Graf
parent 98ca8c0238
commit ff9d2afa61
5 changed files with 17 additions and 25 deletions
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8
hw/spapr.c
View File

@ -89,7 +89,7 @@
sPAPREnvironment *spapr;
int spapr_allocate_irq(int hint, enum xics_irq_type type)
int spapr_allocate_irq(int hint, bool lsi)
{
int irq;
@ -105,13 +105,13 @@ int spapr_allocate_irq(int hint, enum xics_irq_type type)
return 0;
}
xics_set_irq_type(spapr->icp, irq, type);
xics_set_irq_type(spapr->icp, irq, lsi);
return irq;
}
/* Allocate block of consequtive IRQs, returns a number of the first */
int spapr_allocate_irq_block(int num, enum xics_irq_type type)
int spapr_allocate_irq_block(int num, bool lsi)
{
int first = -1;
int i;
@ -119,7 +119,7 @@ int spapr_allocate_irq_block(int num, enum xics_irq_type type)
for (i = 0; i < num; ++i) {
int irq;
irq = spapr_allocate_irq(0, type);
irq = spapr_allocate_irq(0, lsi);
if (!irq) {
return -1;
}

8
hw/spapr.h
View File

@ -291,17 +291,17 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
target_ulong *args);
int spapr_allocate_irq(int hint, enum xics_irq_type type);
int spapr_allocate_irq_block(int num, enum xics_irq_type type);
int spapr_allocate_irq(int hint, bool lsi);
int spapr_allocate_irq_block(int num, bool lsi);
static inline int spapr_allocate_msi(int hint)
{
return spapr_allocate_irq(hint, XICS_MSI);
return spapr_allocate_irq(hint, false);
}
static inline int spapr_allocate_lsi(int hint)
{
return spapr_allocate_irq(hint, XICS_LSI);
return spapr_allocate_irq(hint, true);
}
static inline uint32_t rtas_ld(target_ulong phys, int n)

2
hw/spapr_pci.c
View File

@ -351,7 +351,7 @@ static void rtas_ibm_change_msi(sPAPREnvironment *spapr,
/* There is no cached config, allocate MSIs */
if (!phb->msi_table[ndev].nvec) {
irq = spapr_allocate_irq_block(req_num, XICS_MSI);
irq = spapr_allocate_irq_block(req_num, true);
if (irq < 0) {
fprintf(stderr, "Cannot allocate MSIs for device#%d", ndev);
rtas_st(rets, 0, -1); /* Hardware error */

16
hw/xics.c
View File

@ -170,7 +170,7 @@ struct ics_irq_state {
#define XICS_STATUS_REJECTED 0x4
#define XICS_STATUS_MASKED_PENDING 0x8
uint8_t status;
enum xics_irq_type type;
bool lsi;
};
struct ics_state {
@ -244,7 +244,7 @@ static void ics_set_irq(void *opaque, int srcno, int val)
struct ics_state *ics = (struct ics_state *)opaque;
struct ics_irq_state *irq = ics->irqs + srcno;
if (irq->type == XICS_LSI) {
if (irq->lsi) {
set_irq_lsi(ics, srcno, val);
} else {
set_irq_msi(ics, srcno, val);
@ -278,7 +278,7 @@ static void ics_write_xive(struct ics_state *ics, int nr, int server,
irq->server = server;
irq->priority = priority;
if (irq->type == XICS_LSI) {
if (irq->lsi) {
write_xive_lsi(ics, srcno);
} else {
write_xive_msi(ics, srcno);
@ -301,7 +301,7 @@ static void ics_resend(struct ics_state *ics)
struct ics_irq_state *irq = ics->irqs + i;
/* FIXME: filter by server#? */
if (irq->type == XICS_LSI) {
if (irq->lsi) {
resend_lsi(ics, i);
} else {
resend_msi(ics, i);
@ -314,7 +314,7 @@ static void ics_eoi(struct ics_state *ics, int nr)
int srcno = nr - ics->offset;
struct ics_irq_state *irq = ics->irqs + srcno;
if (irq->type == XICS_LSI) {
if (irq->lsi) {
irq->status &= ~XICS_STATUS_SENT;
}
}
@ -333,14 +333,12 @@ qemu_irq xics_get_qirq(struct icp_state *icp, int irq)
return icp->ics->qirqs[irq - icp->ics->offset];
}
void xics_set_irq_type(struct icp_state *icp, int irq,
enum xics_irq_type type)
void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi)
{
assert((irq >= icp->ics->offset)
&& (irq < (icp->ics->offset + icp->ics->nr_irqs)));
assert((type == XICS_MSI) || (type == XICS_LSI));
icp->ics->irqs[irq - icp->ics->offset].type = type;
icp->ics->irqs[irq - icp->ics->offset].lsi = lsi;
}
static target_ulong h_cppr(CPUPPCState *env, sPAPREnvironment *spapr,

8
hw/xics.h
View File

@ -31,14 +31,8 @@
struct icp_state;
enum xics_irq_type {
XICS_MSI, /* Message-signalled (edge) interrupt */
XICS_LSI, /* Level-signalled interrupt */
};
qemu_irq xics_get_qirq(struct icp_state *icp, int irq);
void xics_set_irq_type(struct icp_state *icp, int irq,
enum xics_irq_type type);
void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi);
struct icp_state *xics_system_init(int nr_irqs);