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https://github.com/qemu/qemu.git
synced 2024-11-24 11:23:43 +08:00
cpu: Move watchpoint fields from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
parent
0429a97195
commit
ff4700b05c
@ -200,10 +200,11 @@ void cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler)
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static void cpu_handle_debug_exception(CPUArchState *env)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUWatchpoint *wp;
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if (!env->watchpoint_hit) {
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QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
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if (!cpu->watchpoint_hit) {
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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wp->flags &= ~BP_WATCHPOINT_HIT;
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}
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}
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33
exec.c
33
exec.c
@ -485,7 +485,7 @@ void cpu_exec_init(CPUArchState *env)
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cpu->cpu_index = cpu_index;
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cpu->numa_node = 0;
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QTAILQ_INIT(&env->breakpoints);
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QTAILQ_INIT(&env->watchpoints);
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QTAILQ_INIT(&cpu->watchpoints);
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#ifndef CONFIG_USER_ONLY
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cpu->as = &address_space_memory;
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cpu->thread_id = qemu_get_thread_id();
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@ -542,6 +542,7 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len
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int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
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int flags, CPUWatchpoint **watchpoint)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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target_ulong len_mask = ~(len - 1);
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CPUWatchpoint *wp;
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@ -559,10 +560,11 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len
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wp->flags = flags;
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/* keep all GDB-injected watchpoints in front */
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if (flags & BP_GDB)
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QTAILQ_INSERT_HEAD(&env->watchpoints, wp, entry);
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else
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QTAILQ_INSERT_TAIL(&env->watchpoints, wp, entry);
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if (flags & BP_GDB) {
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QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
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} else {
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QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
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}
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tlb_flush_page(env, addr);
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@ -575,10 +577,11 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len
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int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len,
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int flags)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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target_ulong len_mask = ~(len - 1);
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CPUWatchpoint *wp;
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QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if (addr == wp->vaddr && len_mask == wp->len_mask
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&& flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
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cpu_watchpoint_remove_by_ref(env, wp);
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@ -591,7 +594,9 @@ int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len
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/* Remove a specific watchpoint by reference. */
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void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint)
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{
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QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry);
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CPUState *cpu = ENV_GET_CPU(env);
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QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
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tlb_flush_page(env, watchpoint->vaddr);
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@ -601,9 +606,10 @@ void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint)
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/* Remove all matching watchpoints. */
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void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUWatchpoint *wp, *next;
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QTAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) {
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QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
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if (wp->flags & mask)
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cpu_watchpoint_remove_by_ref(env, wp);
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}
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@ -799,6 +805,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
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int prot,
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target_ulong *address)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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hwaddr iotlb;
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CPUWatchpoint *wp;
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@ -818,7 +825,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
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/* Make accesses to pages with watchpoints go via the
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watchpoint trap routines. */
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QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) {
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/* Avoid trapping reads of pages with a write breakpoint. */
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if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
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@ -1579,7 +1586,7 @@ static void check_watchpoint(int offset, int len_mask, int flags)
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CPUWatchpoint *wp;
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int cpu_flags;
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if (env->watchpoint_hit) {
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if (cpu->watchpoint_hit) {
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/* We re-entered the check after replacing the TB. Now raise
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* the debug interrupt so that is will trigger after the
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* current instruction. */
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@ -1587,12 +1594,12 @@ static void check_watchpoint(int offset, int len_mask, int flags)
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return;
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}
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vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
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QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if ((vaddr == (wp->vaddr & len_mask) ||
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(vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) {
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wp->flags |= BP_WATCHPOINT_HIT;
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if (!env->watchpoint_hit) {
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env->watchpoint_hit = wp;
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if (!cpu->watchpoint_hit) {
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cpu->watchpoint_hit = wp;
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tb_check_watchpoint(env);
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if (wp->flags & BP_STOP_BEFORE_ACCESS) {
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cpu->exception_index = EXCP_DEBUG;
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@ -1204,8 +1204,8 @@ static void gdb_vm_state_change(void *opaque, int running, RunState state)
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}
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switch (state) {
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case RUN_STATE_DEBUG:
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if (env->watchpoint_hit) {
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switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
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if (cpu->watchpoint_hit) {
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switch (cpu->watchpoint_hit->flags & BP_MEM_ACCESS) {
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case BP_MEM_READ:
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type = "r";
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break;
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@ -1219,8 +1219,8 @@ static void gdb_vm_state_change(void *opaque, int running, RunState state)
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snprintf(buf, sizeof(buf),
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"T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
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GDB_SIGNAL_TRAP, cpu_index(cpu), type,
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env->watchpoint_hit->vaddr);
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env->watchpoint_hit = NULL;
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(target_ulong)cpu->watchpoint_hit->vaddr);
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cpu->watchpoint_hit = NULL;
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goto send_packet;
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}
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tb_flush(env);
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@ -120,13 +120,6 @@ typedef struct CPUBreakpoint {
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QTAILQ_ENTRY(CPUBreakpoint) entry;
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} CPUBreakpoint;
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typedef struct CPUWatchpoint {
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target_ulong vaddr;
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target_ulong len_mask;
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int flags; /* BP_* */
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QTAILQ_ENTRY(CPUWatchpoint) entry;
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} CPUWatchpoint;
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#define CPU_TEMP_BUF_NLONGS 128
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#define CPU_COMMON \
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/* soft mmu support */ \
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@ -135,8 +128,5 @@ typedef struct CPUWatchpoint {
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/* from this point: preserved by CPU reset */ \
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/* ice debug support */ \
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QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints; \
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\
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QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints; \
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CPUWatchpoint *watchpoint_hit; \
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#endif
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@ -151,6 +151,13 @@ typedef struct icount_decr_u16 {
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} icount_decr_u16;
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#endif
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typedef struct CPUWatchpoint {
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vaddr vaddr;
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vaddr len_mask;
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int flags; /* BP_* */
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QTAILQ_ENTRY(CPUWatchpoint) entry;
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} CPUWatchpoint;
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struct KVMState;
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struct kvm_run;
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@ -231,6 +238,9 @@ struct CPUState {
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int gdb_num_g_regs;
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QTAILQ_ENTRY(CPUState) node;
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QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;
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CPUWatchpoint *watchpoint_hit;
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void *opaque;
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/* In order to avoid passing too many arguments to the MMIO helpers,
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@ -3435,6 +3435,7 @@ void init_task_state(TaskState *ts)
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CPUArchState *cpu_copy(CPUArchState *env)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUArchState *new_env = cpu_init(cpu_model);
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#if defined(TARGET_HAS_ICE)
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CPUBreakpoint *bp;
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@ -3450,12 +3451,12 @@ CPUArchState *cpu_copy(CPUArchState *env)
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Note: Once we support ptrace with hw-debug register access, make sure
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BP_CPU break/watchpoints are handled correctly on clone. */
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QTAILQ_INIT(&env->breakpoints);
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QTAILQ_INIT(&env->watchpoints);
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QTAILQ_INIT(&cpu->watchpoints);
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#if defined(TARGET_HAS_ICE)
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QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
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cpu_breakpoint_insert(new_env, bp->pc, bp->flags, NULL);
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}
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QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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cpu_watchpoint_insert(new_env, wp->vaddr, (~wp->len_mask) + 1,
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wp->flags, NULL);
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}
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@ -876,7 +876,7 @@ typedef struct CPUX86State {
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target_ulong dr[8]; /* debug registers */
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union {
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CPUBreakpoint *cpu_breakpoint[4];
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CPUWatchpoint *cpu_watchpoint[4];
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struct CPUWatchpoint *cpu_watchpoint[4];
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}; /* break/watchpoints for dr[0..3] */
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uint32_t smbase;
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int old_exception; /* exception in flight */
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@ -1088,11 +1088,12 @@ bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update)
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void breakpoint_handler(CPUX86State *env)
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{
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CPUState *cs = CPU(x86_env_get_cpu(env));
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CPUBreakpoint *bp;
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if (env->watchpoint_hit) {
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if (env->watchpoint_hit->flags & BP_CPU) {
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env->watchpoint_hit = NULL;
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if (cs->watchpoint_hit) {
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if (cs->watchpoint_hit->flags & BP_CPU) {
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cs->watchpoint_hit = NULL;
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if (check_hw_breakpoints(env, false)) {
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raise_exception(env, EXCP01_DB);
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} else {
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@ -2277,13 +2277,13 @@ static int kvm_handle_debug(X86CPU *cpu,
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break;
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case 0x1:
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ret = EXCP_DEBUG;
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env->watchpoint_hit = &hw_watchpoint;
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cs->watchpoint_hit = &hw_watchpoint;
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hw_watchpoint.vaddr = hw_breakpoint[n].addr;
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hw_watchpoint.flags = BP_MEM_WRITE;
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break;
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case 0x3:
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ret = EXCP_DEBUG;
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env->watchpoint_hit = &hw_watchpoint;
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cs->watchpoint_hit = &hw_watchpoint;
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hw_watchpoint.vaddr = hw_breakpoint[n].addr;
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hw_watchpoint.flags = BP_MEM_ACCESS;
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break;
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@ -2291,11 +2291,11 @@ static int kvm_handle_debug(X86CPU *cpu,
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}
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}
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}
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} else if (kvm_find_sw_breakpoint(CPU(cpu), arch_info->pc)) {
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} else if (kvm_find_sw_breakpoint(cs, arch_info->pc)) {
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ret = EXCP_DEBUG;
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}
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if (ret == 0) {
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cpu_synchronize_state(CPU(cpu));
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cpu_synchronize_state(cs);
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assert(env->exception_injected == -1);
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/* pass to guest */
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@ -167,7 +167,7 @@ struct CPULM32State {
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uint32_t wp[4]; /* watchpoints */
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CPUBreakpoint * cpu_breakpoint[4];
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CPUWatchpoint * cpu_watchpoint[4];
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struct CPUWatchpoint *cpu_watchpoint[4];
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CPU_COMMON
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@ -118,11 +118,12 @@ static bool check_watchpoints(CPULM32State *env)
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void lm32_debug_excp_handler(CPULM32State *env)
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{
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CPUState *cs = CPU(lm32_env_get_cpu(env));
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CPUBreakpoint *bp;
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if (env->watchpoint_hit) {
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if (env->watchpoint_hit->flags & BP_CPU) {
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env->watchpoint_hit = NULL;
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if (cs->watchpoint_hit) {
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if (cs->watchpoint_hit->flags & BP_CPU) {
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cs->watchpoint_hit = NULL;
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if (check_watchpoints(env)) {
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raise_exception(env, EXCP_WATCHPOINT);
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} else {
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@ -359,7 +359,7 @@ typedef struct CPUXtensaState {
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int exception_taken;
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/* Watchpoints for DBREAK registers */
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CPUWatchpoint *cpu_watchpoint[MAX_NDBREAK];
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struct CPUWatchpoint *cpu_watchpoint[MAX_NDBREAK];
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CPU_COMMON
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} CPUXtensaState;
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@ -81,11 +81,13 @@ static uint32_t check_hw_breakpoints(CPUXtensaState *env)
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void xtensa_breakpoint_handler(CPUXtensaState *env)
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{
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if (env->watchpoint_hit) {
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if (env->watchpoint_hit->flags & BP_CPU) {
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CPUState *cs = CPU(xtensa_env_get_cpu(env));
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if (cs->watchpoint_hit) {
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if (cs->watchpoint_hit->flags & BP_CPU) {
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uint32_t cause;
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env->watchpoint_hit = NULL;
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cs->watchpoint_hit = NULL;
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cause = check_hw_breakpoints(env);
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if (cause) {
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debug_exception_env(env, cause);
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