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cpu: Move CPUClass::vmsd to SysemuCPUOps
Migration is specific to system emulation. - Move the CPUClass::vmsd field to SysemuCPUOps, - restrict VMSTATE_CPU() macro to sysemu, - vmstate_dummy is now unused, remove it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-16-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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parent
8b80bd28a5
commit
feece4d070
15
cpu.c
15
cpu.c
@ -128,7 +128,9 @@ const VMStateDescription vmstate_cpu_common = {
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void cpu_exec_realizefn(CPUState *cpu, Error **errp)
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{
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#ifndef CONFIG_USER_ONLY
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CPUClass *cc = CPU_GET_CLASS(cpu);
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#endif
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cpu_list_add(cpu);
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if (!accel_cpu_realizefn(cpu, errp)) {
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@ -144,26 +146,23 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
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#ifdef CONFIG_USER_ONLY
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assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
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qdev_get_vmsd(DEVICE(cpu))->unmigratable);
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assert(cc->legacy_vmsd == NULL);
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#else
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if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
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vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
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}
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if (cc->legacy_vmsd != NULL) {
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vmstate_register(NULL, cpu->cpu_index, cc->legacy_vmsd, cpu);
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if (cc->sysemu_ops->legacy_vmsd != NULL) {
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vmstate_register(NULL, cpu->cpu_index, cc->sysemu_ops->legacy_vmsd, cpu);
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}
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#endif /* CONFIG_USER_ONLY */
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}
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void cpu_exec_unrealizefn(CPUState *cpu)
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{
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#ifndef CONFIG_USER_ONLY
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CPUClass *cc = CPU_GET_CLASS(cpu);
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#ifdef CONFIG_USER_ONLY
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assert(cc->legacy_vmsd == NULL);
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#else
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if (cc->legacy_vmsd != NULL) {
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vmstate_unregister(NULL, cc->legacy_vmsd, cpu);
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if (cc->sysemu_ops->legacy_vmsd != NULL) {
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vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
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}
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if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
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vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
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@ -125,8 +125,6 @@ struct SysemuCPUOps;
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* 32-bit VM coredump.
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* @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
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* note to a 32-bit VM coredump.
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* @legacy_vmsd: Legacy state description for migration.
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* Do not use in new targets, use #DeviceClass::vmsd instead.
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* @gdb_num_core_regs: Number of core registers accessible to GDB.
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* @gdb_core_xml_file: File name for core registers GDB XML description.
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* @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
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@ -181,7 +179,6 @@ struct CPUClass {
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int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
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void *opaque);
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const VMStateDescription *legacy_vmsd;
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const char *gdb_core_xml_file;
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gchar * (*gdb_arch_name)(CPUState *cpu);
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const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
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@ -1065,10 +1062,8 @@ bool target_words_bigendian(void);
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#ifdef NEED_CPU_H
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#ifdef CONFIG_SOFTMMU
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extern const VMStateDescription vmstate_cpu_common;
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#else
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#define vmstate_cpu_common vmstate_dummy
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#endif
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#define VMSTATE_CPU() { \
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.name = "parent_obj", \
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@ -1077,6 +1072,7 @@ extern const VMStateDescription vmstate_cpu_common;
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.flags = VMS_STRUCT, \
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.offset = 0, \
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}
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#endif /* CONFIG_SOFTMMU */
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#endif /* NEED_CPU_H */
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@ -16,6 +16,12 @@
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* struct SysemuCPUOps: System operations specific to a CPU class
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*/
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typedef struct SysemuCPUOps {
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/**
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* @legacy_vmsd: Legacy state for migration.
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* Do not use in new targets, use #DeviceClass::vmsd instead.
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*/
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const VMStateDescription *legacy_vmsd;
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} SysemuCPUOps;
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#endif /* SYSEMU_CPU_OPS_H */
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@ -194,8 +194,6 @@ struct VMStateDescription {
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const VMStateDescription **subsections;
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};
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extern const VMStateDescription vmstate_dummy;
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extern const VMStateInfo vmstate_info_bool;
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extern const VMStateInfo vmstate_info_int8;
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@ -1,8 +1,6 @@
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#include "qemu/osdep.h"
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#include "migration/vmstate.h"
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const VMStateDescription vmstate_dummy = {};
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int vmstate_register_with_alias_id(VMStateIf *obj,
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uint32_t instance_id,
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const VMStateDescription *vmsd,
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@ -1948,6 +1948,7 @@ static gchar *arm_gdb_arch_name(CPUState *cs)
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#include "hw/core/sysemu-cpu-ops.h"
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static const struct SysemuCPUOps arm_sysemu_ops = {
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.legacy_vmsd = &vmstate_arm_cpu,
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};
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#endif
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@ -1990,7 +1991,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
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#ifndef CONFIG_USER_ONLY
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cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug;
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cc->asidx_from_attrs = arm_asidx_from_attrs;
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cc->legacy_vmsd = &vmstate_arm_cpu;
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cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian;
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cc->write_elf64_note = arm_cpu_write_elf64_note;
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cc->write_elf32_note = arm_cpu_write_elf32_note;
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@ -6718,6 +6718,7 @@ static Property x86_cpu_properties[] = {
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#include "hw/core/sysemu-cpu-ops.h"
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static const struct SysemuCPUOps i386_sysemu_ops = {
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.legacy_vmsd = &vmstate_x86_cpu,
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};
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#endif
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@ -6756,7 +6757,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
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cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote;
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cc->write_elf32_note = x86_cpu_write_elf32_note;
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cc->write_elf32_qemunote = x86_cpu_write_elf32_qemunote;
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cc->legacy_vmsd = &vmstate_x86_cpu;
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cc->sysemu_ops = &i386_sysemu_ops;
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#endif /* !CONFIG_USER_ONLY */
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@ -525,6 +525,7 @@ static Property mips_cpu_properties[] = {
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#include "hw/core/sysemu-cpu-ops.h"
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static const struct SysemuCPUOps mips_sysemu_ops = {
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.legacy_vmsd = &vmstate_mips_cpu,
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};
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#endif
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@ -568,7 +569,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
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cc->gdb_write_register = mips_cpu_gdb_write_register;
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#ifndef CONFIG_USER_ONLY
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cc->get_phys_page_debug = mips_cpu_get_phys_page_debug;
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cc->legacy_vmsd = &vmstate_mips_cpu;
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cc->sysemu_ops = &mips_sysemu_ops;
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#endif
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cc->disas_set_info = mips_cpu_disas_set_info;
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@ -9267,6 +9267,7 @@ static Property ppc_cpu_properties[] = {
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#include "hw/core/sysemu-cpu-ops.h"
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static const struct SysemuCPUOps ppc_sysemu_ops = {
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.legacy_vmsd = &vmstate_ppc_cpu,
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};
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#endif
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@ -9312,7 +9313,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
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cc->gdb_write_register = ppc_cpu_gdb_write_register;
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#ifndef CONFIG_USER_ONLY
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cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug;
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cc->legacy_vmsd = &vmstate_ppc_cpu;
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cc->sysemu_ops = &ppc_sysemu_ops;
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#endif
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#if defined(CONFIG_SOFTMMU)
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@ -600,6 +600,7 @@ static const char *riscv_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname)
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#include "hw/core/sysemu-cpu-ops.h"
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static const struct SysemuCPUOps riscv_sysemu_ops = {
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.legacy_vmsd = &vmstate_riscv_cpu,
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};
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#endif
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@ -645,7 +646,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
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cc->disas_set_info = riscv_cpu_disas_set_info;
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#ifndef CONFIG_USER_ONLY
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cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug;
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cc->legacy_vmsd = &vmstate_riscv_cpu;
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cc->sysemu_ops = &riscv_sysemu_ops;
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cc->write_elf64_note = riscv_cpu_write_elf64_note;
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cc->write_elf32_note = riscv_cpu_write_elf32_note;
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@ -480,6 +480,7 @@ static void s390_cpu_reset_full(DeviceState *dev)
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#include "hw/core/sysemu-cpu-ops.h"
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static const struct SysemuCPUOps s390_sysemu_ops = {
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.legacy_vmsd = &vmstate_s390_cpu,
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};
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#endif
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@ -523,7 +524,6 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
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cc->gdb_write_register = s390_cpu_gdb_write_register;
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#ifndef CONFIG_USER_ONLY
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cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
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cc->legacy_vmsd = &vmstate_s390_cpu;
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cc->get_crash_info = s390_cpu_get_crash_info;
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cc->write_elf64_note = s390_cpu_write_elf64_note;
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cc->sysemu_ops = &s390_sysemu_ops;
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@ -852,6 +852,7 @@ static Property sparc_cpu_properties[] = {
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#include "hw/core/sysemu-cpu-ops.h"
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static const struct SysemuCPUOps sparc_sysemu_ops = {
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.legacy_vmsd = &vmstate_sparc_cpu,
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};
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#endif
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@ -896,7 +897,6 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
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cc->gdb_write_register = sparc_cpu_gdb_write_register;
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#ifndef CONFIG_USER_ONLY
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cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug;
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cc->legacy_vmsd = &vmstate_sparc_cpu;
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cc->sysemu_ops = &sparc_sysemu_ops;
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#endif
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cc->disas_set_info = cpu_sparc_disas_set_info;
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