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ppc/pnv: Introduce a PnvCore reset handler
in which individual CPUs are reset. It will ease the introduction of future change reseting the interrupt presenter from the CPU reset handler. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20191022163812.330-4-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -40,9 +40,8 @@ static const char *pnv_core_cpu_typename(PnvCore *pc)
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return cpu_type;
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}
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static void pnv_cpu_reset(void *opaque)
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static void pnv_core_cpu_reset(PowerPCCPU *cpu)
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{
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PowerPCCPU *cpu = opaque;
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CPUState *cs = CPU(cpu);
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CPUPPCState *env = &cpu->env;
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@ -192,8 +191,17 @@ static void pnv_realize_vcpu(PowerPCCPU *cpu, PnvChip *chip, Error **errp)
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/* Set time-base frequency to 512 MHz */
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cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ);
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}
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qemu_register_reset(pnv_cpu_reset, cpu);
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static void pnv_core_reset(void *dev)
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{
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CPUCore *cc = CPU_CORE(dev);
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PnvCore *pc = PNV_CORE(dev);
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int i;
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for (i = 0; i < cc->nr_threads; i++) {
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pnv_core_cpu_reset(pc->threads[i]);
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}
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}
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static void pnv_core_realize(DeviceState *dev, Error **errp)
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@ -244,6 +252,8 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
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snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id);
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pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), pcc->xscom_ops,
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pc, name, PNV_XSCOM_EX_SIZE);
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qemu_register_reset(pnv_core_reset, pc);
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return;
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err:
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@ -259,7 +269,6 @@ static void pnv_unrealize_vcpu(PowerPCCPU *cpu)
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{
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PnvCPUState *pnv_cpu = pnv_cpu_state(cpu);
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qemu_unregister_reset(pnv_cpu_reset, cpu);
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object_unparent(OBJECT(pnv_cpu_state(cpu)->intc));
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cpu_remove_sync(CPU(cpu));
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cpu->machine_data = NULL;
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@ -273,6 +282,8 @@ static void pnv_core_unrealize(DeviceState *dev, Error **errp)
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CPUCore *cc = CPU_CORE(dev);
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int i;
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qemu_unregister_reset(pnv_core_reset, pc);
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for (i = 0; i < cc->nr_threads; i++) {
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pnv_unrealize_vcpu(pc->threads[i]);
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}
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