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target/ppc: Move PowerPCCPUClass definition to 'cpu.h'

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The OBJECT_DECLARE_CPU_TYPE() macro forward-declares the
PowerPCCPUClass type. This forward declaration is sufficient
for code in hw/ to use the QOM definitions. No need to expose
the structure definition. Keep it local to target/ppc/ by
moving it to target/ppc/cpu.h.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013125630.95116-5-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-10-13 12:11:18 +02:00
parent 866c8cf918
commit f3cb33255c
3 changed files with 52 additions and 57 deletions
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2
include/hw/ppc/ppc.h
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@ -1,7 +1,7 @@
#ifndef HW_PPC_H
#define HW_PPC_H
#include "target/ppc/cpu-qom.h"
#include "target/ppc/cpu.h"
void ppc_set_irq(PowerPCCPU *cpu, int n_IRQ, int level);
PowerPCCPU *ppc_get_vcpu_by_pir(int pir);

56
target/ppc/cpu-qom.h
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@ -21,7 +21,6 @@
#define QEMU_PPC_CPU_QOM_H
#include "hw/core/cpu.h"
#include "qom/object.h"
#ifdef TARGET_PPC64
#define TYPE_POWERPC_CPU "powerpc64-cpu"
@ -36,10 +35,6 @@ OBJECT_DECLARE_CPU_TYPE(PowerPCCPU, PowerPCCPUClass, POWERPC_CPU)
#define TYPE_HOST_POWERPC_CPU POWERPC_CPU_TYPE_NAME("host")
typedef struct CPUArchState CPUPPCState;
typedef struct ppc_tb_t ppc_tb_t;
typedef struct ppc_dcr_t ppc_dcr_t;
/*****************************************************************************/
/* MMU model */
typedef enum powerpc_mmu_t powerpc_mmu_t;
@ -133,57 +128,6 @@ enum powerpc_input_t {
PPC_FLAGS_INPUT_RCPU,
};
typedef struct PPCHash64Options PPCHash64Options;
/**
* PowerPCCPUClass:
* @parent_realize: The parent class' realize handler.
* @parent_phases: The parent class' reset phase handlers.
*
* A PowerPC CPU model.
*/
struct PowerPCCPUClass {
/*< private >*/
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
DeviceUnrealize parent_unrealize;
ResettablePhases parent_phases;
void (*parent_parse_features)(const char *type, char *str, Error **errp);
uint32_t pvr;
/*
* If @best is false, match if pcc is in the family of pvr
* Else match only if pcc is the best match for pvr in this family.
*/
bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr, bool best);
uint64_t pcr_mask; /* Available bits in PCR register */
uint64_t pcr_supported; /* Bits for supported PowerISA versions */
uint32_t svr;
uint64_t insns_flags;
uint64_t insns_flags2;
uint64_t msr_mask;
uint64_t lpcr_mask; /* Available bits in the LPCR */
uint64_t lpcr_pm; /* Power-saving mode Exit Cause Enable bits */
powerpc_mmu_t mmu_model;
powerpc_excp_t excp_model;
powerpc_input_t bus_model;
uint32_t flags;
int bfd_mach;
uint32_t l1_dcache_size, l1_icache_size;
#ifndef CONFIG_USER_ONLY
unsigned int gdb_num_sprs;
const char *gdb_spr_xml;
#endif
const PPCHash64Options *hash64_opts;
struct ppc_radix_page_info *radix_page_info;
uint32_t lrg_decr_bits;
int n_host_threads;
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
};
#ifndef CONFIG_USER_ONLY
typedef struct PPCTimebase {
uint64_t guest_timebase;

51
target/ppc/cpu.h
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@ -200,9 +200,14 @@ typedef struct opc_handler_t opc_handler_t;
/*****************************************************************************/
/* Types used to describe some PowerPC registers etc. */
typedef struct DisasContext DisasContext;
typedef struct ppc_dcr_t ppc_dcr_t;
typedef struct ppc_spr_t ppc_spr_t;
typedef struct ppc_tb_t ppc_tb_t;
typedef union ppc_tlb_t ppc_tlb_t;
typedef struct ppc_hash_pte64 ppc_hash_pte64_t;
typedef struct PPCHash64Options PPCHash64Options;
typedef struct CPUArchState CPUPPCState;
/* SPR access micro-ops generations callbacks */
struct ppc_spr_t {
@ -1341,6 +1346,52 @@ struct ArchCPU {
int32_t mig_slb_nr;
};
/**
* PowerPCCPUClass:
* @parent_realize: The parent class' realize handler.
* @parent_phases: The parent class' reset phase handlers.
*
* A PowerPC CPU model.
*/
struct PowerPCCPUClass {
CPUClass parent_class;
DeviceRealize parent_realize;
DeviceUnrealize parent_unrealize;
ResettablePhases parent_phases;
void (*parent_parse_features)(const char *type, char *str, Error **errp);
uint32_t pvr;
/*
* If @best is false, match if pcc is in the family of pvr
* Else match only if pcc is the best match for pvr in this family.
*/
bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr, bool best);
uint64_t pcr_mask; /* Available bits in PCR register */
uint64_t pcr_supported; /* Bits for supported PowerISA versions */
uint32_t svr;
uint64_t insns_flags;
uint64_t insns_flags2;
uint64_t msr_mask;
uint64_t lpcr_mask; /* Available bits in the LPCR */
uint64_t lpcr_pm; /* Power-saving mode Exit Cause Enable bits */
powerpc_mmu_t mmu_model;
powerpc_excp_t excp_model;
powerpc_input_t bus_model;
uint32_t flags;
int bfd_mach;
uint32_t l1_dcache_size, l1_icache_size;
#ifndef CONFIG_USER_ONLY
unsigned int gdb_num_sprs;
const char *gdb_spr_xml;
#endif
const PPCHash64Options *hash64_opts;
struct ppc_radix_page_info *radix_page_info;
uint32_t lrg_decr_bits;
int n_host_threads;
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
};
ObjectClass *ppc_cpu_class_by_name(const char *name);
PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);