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xhci: add trb type name lookup support.
When logging TRBs add a the type name for more readable debug output. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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@ -420,6 +420,60 @@ typedef struct XHCIEvRingSeg {
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uint32_t rsvd;
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} XHCIEvRingSeg;
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#ifdef DEBUG_XHCI
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static const char *TRBType_names[] = {
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[TRB_RESERVED] = "TRB_RESERVED",
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[TR_NORMAL] = "TR_NORMAL",
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[TR_SETUP] = "TR_SETUP",
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[TR_DATA] = "TR_DATA",
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[TR_STATUS] = "TR_STATUS",
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[TR_ISOCH] = "TR_ISOCH",
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[TR_LINK] = "TR_LINK",
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[TR_EVDATA] = "TR_EVDATA",
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[TR_NOOP] = "TR_NOOP",
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[CR_ENABLE_SLOT] = "CR_ENABLE_SLOT",
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[CR_DISABLE_SLOT] = "CR_DISABLE_SLOT",
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[CR_ADDRESS_DEVICE] = "CR_ADDRESS_DEVICE",
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[CR_CONFIGURE_ENDPOINT] = "CR_CONFIGURE_ENDPOINT",
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[CR_EVALUATE_CONTEXT] = "CR_EVALUATE_CONTEXT",
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[CR_RESET_ENDPOINT] = "CR_RESET_ENDPOINT",
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[CR_STOP_ENDPOINT] = "CR_STOP_ENDPOINT",
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[CR_SET_TR_DEQUEUE] = "CR_SET_TR_DEQUEUE",
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[CR_RESET_DEVICE] = "CR_RESET_DEVICE",
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[CR_FORCE_EVENT] = "CR_FORCE_EVENT",
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[CR_NEGOTIATE_BW] = "CR_NEGOTIATE_BW",
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[CR_SET_LATENCY_TOLERANCE] = "CR_SET_LATENCY_TOLERANCE",
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[CR_GET_PORT_BANDWIDTH] = "CR_GET_PORT_BANDWIDTH",
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[CR_FORCE_HEADER] = "CR_FORCE_HEADER",
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[CR_NOOP] = "CR_NOOP",
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[ER_TRANSFER] = "ER_TRANSFER",
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[ER_COMMAND_COMPLETE] = "ER_COMMAND_COMPLETE",
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[ER_PORT_STATUS_CHANGE] = "ER_PORT_STATUS_CHANGE",
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[ER_BANDWIDTH_REQUEST] = "ER_BANDWIDTH_REQUEST",
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[ER_DOORBELL] = "ER_DOORBELL",
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[ER_HOST_CONTROLLER] = "ER_HOST_CONTROLLER",
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[ER_DEVICE_NOTIFICATION] = "ER_DEVICE_NOTIFICATION",
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[ER_MFINDEX_WRAP] = "ER_MFINDEX_WRAP",
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[CR_VENDOR_VIA_CHALLENGE_RESPONSE] = "CR_VENDOR_VIA_CHALLENGE_RESPONSE",
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[CR_VENDOR_NEC_FIRMWARE_REVISION] = "CR_VENDOR_NEC_FIRMWARE_REVISION",
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[CR_VENDOR_NEC_CHALLENGE_RESPONSE] = "CR_VENDOR_NEC_CHALLENGE_RESPONSE",
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};
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static const char *lookup_name(uint32_t index, const char **list, uint32_t llen)
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{
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if (index >= llen || list[index] == NULL) {
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return "???";
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}
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return list[index];
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}
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static const char *trb_name(XHCITRB *trb)
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{
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return lookup_name(TRB_TYPE(*trb), TRBType_names,
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ARRAY_SIZE(TRBType_names));
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}
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#endif
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static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
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unsigned int epid);
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@ -487,8 +541,9 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent *event)
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}
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ev_trb.control = cpu_to_le32(ev_trb.control);
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DPRINTF("xhci_write_event(): [%d] %016"PRIx64" %08x %08x\n",
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xhci->er_ep_idx, ev_trb.parameter, ev_trb.status, ev_trb.control);
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DPRINTF("xhci_write_event(): [%d] %016"PRIx64" %08x %08x %s\n",
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xhci->er_ep_idx, ev_trb.parameter, ev_trb.status, ev_trb.control,
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trb_name(&ev_trb));
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addr = xhci->er_start + TRB_SIZE*xhci->er_ep_idx;
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cpu_physical_memory_write(addr, (uint8_t *) &ev_trb, TRB_SIZE);
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@ -649,8 +704,9 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
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le32_to_cpus(&trb->control);
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DPRINTF("xhci: TRB fetched [" TARGET_FMT_plx "]: "
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"%016" PRIx64 " %08x %08x\n",
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ring->dequeue, trb->parameter, trb->status, trb->control);
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"%016" PRIx64 " %08x %08x %s\n",
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ring->dequeue, trb->parameter, trb->status, trb->control,
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trb_name(trb));
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if ((trb->control & TRB_C) != ring->ccs) {
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return 0;
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