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- linux-user:

Browse Source 
. Don't use 16-bit UIDs with SPARC V9
   . Pick MIPS3 CPU by default to run NaN2008 ELF binaries
 
 - HW:
   . Fix invalid GT64120 north bridge endianness register swap
   . Prevent NULL pointer dereference by SMBus devices
 
 - Buildsys:
   . Fix compiling with liblzfse on Darwin
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Merge tag 'misc-fixes-20230330' of https://github.com/philmd/qemu into staging

- linux-user:
  . Don't use 16-bit UIDs with SPARC V9
  . Pick MIPS3 CPU by default to run NaN2008 ELF binaries

- HW:
  . Fix invalid GT64120 north bridge endianness register swap
  . Prevent NULL pointer dereference by SMBus devices

- Buildsys:
  . Fix compiling with liblzfse on Darwin

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# gpg: Signature made Thu 30 Mar 2023 14:17:35 BST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'misc-fixes-20230330' of https://github.com/philmd/qemu:
  block/dmg: Ignore C99 prototype declaration mismatch from <lzfse.h>
  hw/i2c: pmbus: block uninitialised string reads
  tests/avocado: Enable TuxRun/mips64 (big-endian) test
  hw/mips/gt64xxx_pci: Don't endian-swap GT_PCI0_CFGADDR
  linux-user/mips: Use P5600 as default CPU to run NaN2008 ELF binaries
  linux-user/sparc: Don't use 16-bit UIDs on SPARC V9

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2023-03-30 14:22:29 +01:00
commit efcd0ec14b
6 changed files with 22 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
block/dmg-lzfse.c
View File

@ -23,7 +23,12 @@
*/
#include "qemu/osdep.h"
#include "dmg.h"
/* Work around a -Wstrict-prototypes warning in LZFSE headers */
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wstrict-prototypes"
#include <lzfse.h>
#pragma GCC diagnostic pop
static int dmg_uncompress_lzfse_do(char *next_in, unsigned int avail_in,
char *next_out, unsigned int avail_out)

7
hw/i2c/pmbus_device.c
View File

@ -94,6 +94,13 @@ void pmbus_send64(PMBusDevice *pmdev, uint64_t data)
void pmbus_send_string(PMBusDevice *pmdev, const char *data)
{
if (!data) {
qemu_log_mask(LOG_GUEST_ERROR,
"%s: %s: uninitialised read from 0x%02x\n",
__func__, DEVICE(pmdev)->canonical_path, pmdev->code);
return;
}
size_t len = strlen(data);
g_assert(len > 0);
g_assert(len + pmdev->out_buf_len < SMBUS_DATA_MAX_LEN);

18
hw/pci-host/gt64120.c
View File

@ -321,9 +321,6 @@ static void gt64120_isd_mapping(GT64120State *s)
static void gt64120_update_pci_cfgdata_mapping(GT64120State *s)
{
/* Indexed on MByteSwap bit, see Table 158: PCI_0 Command, Offset: 0xc00 */
static const MemoryRegionOps *pci_host_conf_ops[] = {
&pci_host_conf_be_ops, &pci_host_conf_le_ops
};
static const MemoryRegionOps *pci_host_data_ops[] = {
&pci_host_data_be_ops, &pci_host_data_le_ops
};
@ -339,15 +336,6 @@ static void gt64120_update_pci_cfgdata_mapping(GT64120State *s)
* - Table 16: 32-bit PCI Transaction Endianess
* - Table 158: PCI_0 Command, Offset: 0xc00
*/
if (memory_region_is_mapped(&phb->conf_mem)) {
memory_region_del_subregion(&s->ISD_mem, &phb->conf_mem);
object_unparent(OBJECT(&phb->conf_mem));
}
memory_region_init_io(&phb->conf_mem, OBJECT(phb),
pci_host_conf_ops[s->regs[GT_PCI0_CMD] & 1],
s, "pci-conf-idx", 4);
memory_region_add_subregion_overlap(&s->ISD_mem, GT_PCI0_CFGADDR << 2,
&phb->conf_mem, 1);
if (memory_region_is_mapped(&phb->data_mem)) {
memory_region_del_subregion(&s->ISD_mem, &phb->data_mem);
@ -1208,6 +1196,12 @@ static void gt64120_realize(DeviceState *dev, Error **errp)
PCI_DEVFN(18, 0), TYPE_PCI_BUS);
pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
memory_region_init_io(&phb->conf_mem, OBJECT(phb),
&pci_host_conf_le_ops,
s, "pci-conf-idx", 4);
memory_region_add_subregion_overlap(&s->ISD_mem, GT_PCI0_CFGADDR << 2,
&phb->conf_mem, 1);
/*
* The whole address space decoded by the GT-64120A doesn't generate

3
linux-user/mips/target_elf.h
View File

@ -15,6 +15,9 @@ static inline const char *cpu_get_model(uint32_t eflags)
if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) {
return "R5900";
}
if (eflags & EF_MIPS_NAN2008) {
return "P5600";
}
return "24Kf";
}
#endif

2
linux-user/syscall_defs.h
View File

@ -61,7 +61,7 @@
#if (defined(TARGET_I386) && defined(TARGET_ABI32)) \
|| (defined(TARGET_ARM) && defined(TARGET_ABI32)) \
|| defined(TARGET_SPARC) \
|| (defined(TARGET_SPARC) && defined(TARGET_ABI32)) \
|| defined(TARGET_M68K) || defined(TARGET_SH4) || defined(TARGET_CRIS)
/* 16 bit uid wrappers emulation */
#define USE_UID16

1
tests/avocado/tuxrun_baselines.py
View File

@ -270,7 +270,6 @@ class TuxRunBaselineTest(QemuSystemTest):
"""
self.common_tuxrun(drive="driver=ide-hd,bus=ide.0,unit=0")
@skip("QEMU currently broken") # regression against stable QEMU
def test_mips64(self):
"""
:avocado: tags=arch:mips64