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pseries: Implement IOMMU and DMA for PAPR PCI devices
Currently the pseries machine emulation does not support DMA for emulated PCI devices, because the PAPR spec always requires a (guest visible, paravirtualized) IOMMU which was not implemented. Now that we have infrastructure for IOMMU emulation, we can correct this and allow PCI DMA for pseries. With the existing PAPR IOMMU code used for VIO devices, this is almost trivial. We use a single DMAContext for each (virtual) PCI host bridge, which is the usual configuration on real PAPR machines (which often have _many_ PCI host bridges). Cc: Alex Graf <agraf@suse.de> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@ -330,6 +330,7 @@ typedef struct sPAPRTCE {
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} sPAPRTCE;
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#define SPAPR_VIO_BASE_LIOBN 0x00000000
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#define SPAPR_PCI_BASE_LIOBN 0x80000000
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void spapr_iommu_init(void);
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DMAContext *spapr_tce_new_dma_context(uint32_t liobn, size_t window_size);
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@ -162,35 +162,11 @@ void spapr_tce_free(DMAContext *dma)
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}
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}
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static target_ulong h_put_tce(CPUPPCState *env, sPAPREnvironment *spapr,
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target_ulong opcode, target_ulong *args)
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static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
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target_ulong tce)
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{
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target_ulong liobn = args[0];
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target_ulong ioba = args[1];
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target_ulong tce = args[2];
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sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
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sPAPRTCE *tcep;
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if (liobn & 0xFFFFFFFF00000000ULL) {
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hcall_dprintf("spapr_vio_put_tce on out-of-boundsw LIOBN "
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TARGET_FMT_lx "\n", liobn);
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return H_PARAMETER;
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}
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if (!tcet) {
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hcall_dprintf("spapr_vio_put_tce on non-existent LIOBN "
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TARGET_FMT_lx "\n", liobn);
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return H_PARAMETER;
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}
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ioba &= ~(SPAPR_TCE_PAGE_SIZE - 1);
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#ifdef DEBUG_TCE
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fprintf(stderr, "spapr_vio_put_tce on liobn=" TARGET_FMT_lx /*%s*/
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" ioba 0x" TARGET_FMT_lx " TCE 0x" TARGET_FMT_lx "\n",
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liobn, /*dev->qdev.id, */ioba, tce);
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#endif
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if (ioba >= tcet->window_size) {
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hcall_dprintf("spapr_vio_put_tce on out-of-boards IOBA 0x"
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TARGET_FMT_lx "\n", ioba);
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@ -203,6 +179,34 @@ static target_ulong h_put_tce(CPUPPCState *env, sPAPREnvironment *spapr,
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return H_SUCCESS;
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}
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static target_ulong h_put_tce(CPUPPCState *env, sPAPREnvironment *spapr,
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target_ulong opcode, target_ulong *args)
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{
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target_ulong liobn = args[0];
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target_ulong ioba = args[1];
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target_ulong tce = args[2];
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sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
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if (liobn & 0xFFFFFFFF00000000ULL) {
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hcall_dprintf("spapr_vio_put_tce on out-of-boundsw LIOBN "
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TARGET_FMT_lx "\n", liobn);
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return H_PARAMETER;
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}
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ioba &= ~(SPAPR_TCE_PAGE_SIZE - 1);
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if (tcet) {
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return put_tce_emu(tcet, ioba, tce);
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}
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#ifdef DEBUG_TCE
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fprintf(stderr, "%s on liobn=" TARGET_FMT_lx /*%s*/
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" ioba 0x" TARGET_FMT_lx " TCE 0x" TARGET_FMT_lx "\n",
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__func__, liobn, /*dev->qdev.id, */ioba, tce);
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#endif
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return H_PARAMETER;
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}
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void spapr_iommu_init(void)
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{
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QLIST_INIT(&spapr_tce_tables);
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@ -266,12 +266,21 @@ static const MemoryRegionOps spapr_io_ops = {
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/*
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* PHB PCI device
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*/
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static DMAContext *spapr_pci_dma_context_fn(PCIBus *bus, void *opaque,
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int devfn)
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{
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sPAPRPHBState *phb = opaque;
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return phb->dma;
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}
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static int spapr_phb_init(SysBusDevice *s)
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{
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sPAPRPHBState *phb = FROM_SYSBUS(sPAPRPHBState, s);
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char *namebuf;
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int i;
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PCIBus *bus;
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uint32_t liobn;
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phb->dtbusname = g_strdup_printf("pci@%" PRIx64, phb->buid);
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namebuf = alloca(strlen(phb->dtbusname) + 32);
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@ -312,6 +321,10 @@ static int spapr_phb_init(SysBusDevice *s)
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PCI_DEVFN(0, 0), PCI_NUM_PINS);
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phb->host_state.bus = bus;
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liobn = SPAPR_PCI_BASE_LIOBN | (pci_find_domain(bus) << 16);
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phb->dma = spapr_tce_new_dma_context(liobn, 0x40000000);
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pci_setup_iommu(bus, spapr_pci_dma_context_fn, phb);
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QLIST_INSERT_HEAD(&spapr->phbs, phb, list);
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/* Initialize the LSI table */
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@ -472,6 +485,8 @@ int spapr_populate_pci_devices(sPAPRPHBState *phb,
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_FDT(fdt_setprop(fdt, bus_off, "interrupt-map", &interrupt_map,
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sizeof(interrupt_map)));
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spapr_dma_dt(fdt, bus_off, "ibm,dma-window", phb->dma);
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return 0;
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}
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@ -38,6 +38,7 @@ typedef struct sPAPRPHBState {
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MemoryRegion memspace, iospace;
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target_phys_addr_t mem_win_addr, mem_win_size, io_win_addr, io_win_size;
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MemoryRegion memwindow, iowindow;
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DMAContext *dma;
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struct {
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uint32_t dt_irq;
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