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better locks
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@169 c046a42c-6fe2-441c-8c8c-71466251a162
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100
cpu-i386.h
100
cpu-i386.h
@ -542,4 +542,104 @@ static inline TranslationBlock *tb_find(TranslationBlock ***pptb,
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#define offsetof(type, field) ((size_t) &((type *)0)->field)
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#endif
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#ifdef __powerpc__
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static inline int testandset (int *p)
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{
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int ret;
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__asm__ __volatile__ (
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"0: lwarx %0,0,%1 ;"
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" xor. %0,%3,%0;"
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" bne 1f;"
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" stwcx. %2,0,%1;"
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" bne- 0b;"
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"1: "
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: "=&r" (ret)
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: "r" (p), "r" (1), "r" (0)
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: "cr0", "memory");
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return ret;
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}
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#endif
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#ifdef __i386__
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static inline int testandset (int *p)
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{
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char ret;
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long int readval;
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__asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
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: "=q" (ret), "=m" (*p), "=a" (readval)
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: "r" (1), "m" (*p), "a" (0)
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: "memory");
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return ret;
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}
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#endif
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#ifdef __s390__
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static inline int testandset (int *p)
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{
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int ret;
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__asm__ __volatile__ ("0: cs %0,%1,0(%2)\n"
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" jl 0b"
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: "=&d" (ret)
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: "r" (1), "a" (p), "0" (*p)
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: "cc", "memory" );
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return ret;
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}
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#endif
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#ifdef __alpha__
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int testandset (int *p)
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{
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int ret;
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unsigned long one;
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__asm__ __volatile__ ("0: mov 1,%2\n"
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" ldl_l %0,%1\n"
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" stl_c %2,%1\n"
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" beq %2,1f\n"
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".subsection 2\n"
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"1: br 0b\n"
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".previous"
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: "=r" (ret), "=m" (*p), "=r" (one)
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: "m" (*p));
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return ret;
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}
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#endif
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#ifdef __sparc__
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static inline int testandset (int *p)
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{
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int ret;
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__asm__ __volatile__("ldstub [%1], %0"
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: "=r" (ret)
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: "r" (p)
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: "memory");
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return (ret ? 1 : 0);
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}
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#endif
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typedef int spinlock_t;
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#define SPIN_LOCK_UNLOCKED 0
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static inline void spin_lock(spinlock_t *lock)
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{
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while (testandset(lock));
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}
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static inline void spin_unlock(spinlock_t *lock)
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{
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*lock = 0;
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}
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static inline int spin_trylock(spinlock_t *lock)
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{
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return !testandset(lock);
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}
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extern spinlock_t tb_lock;
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#endif /* CPU_I386_H */
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4
exec.c
4
exec.c
@ -42,6 +42,8 @@
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TranslationBlock tbs[CODE_GEN_MAX_BLOCKS];
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TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
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int nb_tbs;
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/* any access to the tbs or the page table must use this lock */
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spinlock_t tb_lock = SPIN_LOCK_UNLOCKED;
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uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
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uint8_t *code_gen_ptr;
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@ -172,6 +174,7 @@ void page_set_flags(unsigned long start, unsigned long end, int flags)
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end = TARGET_PAGE_ALIGN(end);
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if (flags & PAGE_WRITE)
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flags |= PAGE_WRITE_ORG;
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spin_lock(&tb_lock);
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for(addr = start; addr < end; addr += TARGET_PAGE_SIZE) {
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p = page_find_alloc(addr >> TARGET_PAGE_BITS);
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/* if the write protection is set, then we invalidate the code
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@ -183,6 +186,7 @@ void page_set_flags(unsigned long start, unsigned long end, int flags)
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}
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p->flags = flags;
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}
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spin_unlock(&tb_lock);
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}
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void cpu_x86_tblocks_init(void)
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