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spapr: Workaround for broken radix guests
For a little while around 4.9, Linux kernels that saw the radix bit in ibm,pa-features would attempt to set up the MMU as if they were a hypervisor, even if they were a guest, which would cause them to crash. Work around this by detecting pre-ISA 3.0 guests by their lack of that bit in option vector 1, and then removing the radix bit from ibm,pa-features. Note: This now requires regeneration of that node after CAS negotiation. Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> [dwg: Fix style nits] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -228,7 +228,8 @@ static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, CPUState *cs)
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}
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/* Populate the "ibm,pa-features" property */
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static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset)
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static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset,
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bool legacy_guest)
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{
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uint8_t pa_features_206[] = { 6, 0,
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0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
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@ -295,6 +296,12 @@ static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset)
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if (kvmppc_has_cap_htm() && pa_size > 24) {
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pa_features[24] |= 0x80; /* Transactional memory support */
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}
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if (legacy_guest && pa_size > 40) {
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/* Workaround for broken kernels that attempt (guest) radix
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* mode when they can't handle it, if they see the radix bit set
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* in pa-features. So hide it from them. */
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pa_features[40 + 2] &= ~0x80; /* Radix MMU */
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}
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_FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
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}
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@ -309,6 +316,7 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
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CPU_FOREACH(cs) {
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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CPUPPCState *env = &cpu->env;
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DeviceClass *dc = DEVICE_GET_CLASS(cs);
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int index = ppc_get_vcpu_dt_id(cpu);
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int compat_smt = MIN(smp_threads, ppc_compat_max_threads(cpu));
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@ -350,6 +358,9 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
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if (ret < 0) {
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return ret;
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}
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spapr_populate_pa_features(env, fdt, offset,
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spapr->cas_legacy_guest_workaround);
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}
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return ret;
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}
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@ -547,7 +558,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
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page_sizes_prop, page_sizes_prop_size)));
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}
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spapr_populate_pa_features(env, fdt, offset);
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spapr_populate_pa_features(env, fdt, offset, false);
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_FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",
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cs->cpu_index / vcpus_per_socket)));
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@ -1062,7 +1062,7 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
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uint32_t max_compat = cpu->max_compat;
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uint32_t best_compat = 0;
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int i;
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sPAPROptionVector *ov5_guest, *ov5_cas_old, *ov5_updates;
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sPAPROptionVector *ov1_guest, *ov5_guest, *ov5_cas_old, *ov5_updates;
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bool guest_radix;
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/*
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@ -1114,6 +1114,7 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
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/* For the future use: here @ov_table points to the first option vector */
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ov_table = list;
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ov1_guest = spapr_ovec_parse_vector(ov_table, 1);
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ov5_guest = spapr_ovec_parse_vector(ov_table, 5);
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if (spapr_ovec_test(ov5_guest, OV5_MMU_BOTH)) {
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error_report("guest requested hash and radix MMU, which is invalid.");
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@ -1155,7 +1156,8 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu,
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exit(EXIT_FAILURE);
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}
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}
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spapr->cas_legacy_guest_workaround = !spapr_ovec_test(ov1_guest,
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OV1_PPC_3_00);
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if (!spapr->cas_reboot) {
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spapr->cas_reboot =
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(spapr_h_cas_compose_response(spapr, args[1], args[2],
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@ -89,6 +89,7 @@ struct sPAPRMachineState {
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sPAPROptionVector *ov5; /* QEMU-supported option vectors */
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sPAPROptionVector *ov5_cas; /* negotiated (via CAS) option vectors */
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bool cas_reboot;
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bool cas_legacy_guest_workaround;
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Notifier epow_notifier;
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QTAILQ_HEAD(, sPAPREventLogEntry) pending_events;
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@ -43,6 +43,9 @@ typedef struct sPAPROptionVector sPAPROptionVector;
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#define OV_BIT(byte, bit) ((byte - 1) * BITS_PER_BYTE + bit)
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/* option vector 1 */
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#define OV1_PPC_3_00 OV_BIT(3, 0) /* guest supports PowerPC 3.00? */
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/* option vector 5 */
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#define OV5_DRCONF_MEMORY OV_BIT(2, 2)
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#define OV5_FORM1_AFFINITY OV_BIT(5, 0)
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