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target/loongarch: Add constant timer support
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-25-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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target/loongarch/constant_timer.c
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64
target/loongarch/constant_timer.c
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@ -0,0 +1,64 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* QEMU LoongArch constant timer support
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*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*/
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#include "qemu/osdep.h"
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#include "qemu/timer.h"
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#include "cpu.h"
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#include "internals.h"
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#include "cpu-csr.h"
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#define TIMER_PERIOD 10 /* 10 ns period for 100 MHz frequency */
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#define CONSTANT_TIMER_TICK_MASK 0xfffffffffffcUL
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#define CONSTANT_TIMER_ENABLE 0x1UL
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uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu)
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{
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return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / TIMER_PERIOD;
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}
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uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu)
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{
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uint64_t now, expire;
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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expire = timer_expire_time_ns(&cpu->timer);
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return (expire - now) / TIMER_PERIOD;
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}
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void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,
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uint64_t value)
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{
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CPULoongArchState *env = &cpu->env;
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uint64_t now, next;
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env->CSR_TCFG = value;
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if (value & CONSTANT_TIMER_ENABLE) {
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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next = now + (value & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD;
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timer_mod(&cpu->timer, next);
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} else {
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timer_del(&cpu->timer);
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}
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}
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void loongarch_constant_timer_cb(void *opaque)
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{
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LoongArchCPU *cpu = opaque;
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CPULoongArchState *env = &cpu->env;
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uint64_t now, next;
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if (FIELD_EX64(env->CSR_TCFG, CSR_TCFG, PERIODIC)) {
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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next = now + (env->CSR_TCFG & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD;
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timer_mod(&cpu->timer, next);
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} else {
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env->CSR_TCFG = FIELD_DP64(env->CSR_TCFG, CSR_TCFG, EN, 0);
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}
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loongarch_cpu_set_irq(opaque, IRQ_TIMER, 1);
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}
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@ -495,6 +495,8 @@ static void loongarch_cpu_init(Object *obj)
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cpu_set_cpustate_pointers(cpu);
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qdev_init_gpio_in(DEVICE(cpu), loongarch_cpu_set_irq, N_IRQS);
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timer_init_ns(&cpu->timer, QEMU_CLOCK_VIRTUAL,
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&loongarch_constant_timer_cb, cpu);
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}
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static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model)
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@ -11,6 +11,7 @@
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#include "exec/cpu-defs.h"
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#include "fpu/softfloat-types.h"
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#include "hw/registerfields.h"
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#include "qemu/timer.h"
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#define TCG_GUEST_DEFAULT_MO (0)
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@ -185,6 +186,8 @@ extern const char * const regnames[32];
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extern const char * const fregnames[32];
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#define N_IRQS 13
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#define IRQ_TIMER 11
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#define IRQ_IPI 12
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#define LOONGARCH_STLB 2048 /* 2048 STLB */
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#define LOONGARCH_MTLB 64 /* 64 MTLB */
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@ -295,6 +298,7 @@ struct ArchCPU {
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CPUNegativeOffsetState neg;
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CPULoongArchState env;
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QEMUTimer timer;
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};
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#define TYPE_LOONGARCH_CPU "loongarch-cpu"
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@ -32,6 +32,12 @@ extern const VMStateDescription vmstate_loongarch_cpu;
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void loongarch_cpu_set_irq(void *opaque, int irq, int level);
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void loongarch_constant_timer_cb(void *opaque);
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uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu);
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uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu);
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void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,
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uint64_t value);
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bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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@ -18,6 +18,7 @@ loongarch_softmmu_ss = ss.source_set()
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loongarch_softmmu_ss.add(files(
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'machine.c',
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'tlb_helper.c',
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'constant_timer.c',
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))
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loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
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