hw/mips_malta: remove redundant irq and clock init

Global smp_cpus is never zero (even if user provides -smp 0), thus clocks
and irqs are always initialized for each created CPU in the loop at the
beginning of mips_malta_init.

These two lines cause a leak of already allocated timer and irqs for the
first CPU - remove them.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
This commit is contained in:
Leon Alrae 2016-03-15 09:59:33 +00:00
parent cc518af0b2
commit dc520a7dee

View File

@ -1135,10 +1135,6 @@ void mips_malta_init(MachineState *machine)
/* Board ID = 0x420 (Malta Board with CoreLV) */
stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
/* Init internal devices */
cpu_mips_irq_init_cpu(env);
cpu_mips_clock_init(env);
/*
* We have a circular dependency problem: pci_bus depends on isa_irq,
* isa_irq is provided by i8259, i8259 depends on ISA, ISA depends