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Implement nucleus quad ldda

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4902 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2008-07-19 13:25:28 +00:00
parent 8571c05566
commit db166940e2
3 changed files with 70 additions and 20 deletions
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1
target-sparc/helper.h
View File

@ -22,6 +22,7 @@ DEF_HELPER(target_ulong, helper_array8, (target_ulong pixel_addr, \
DEF_HELPER(target_ulong, helper_alignaddr, (target_ulong addr, \
target_ulong offset))
DEF_HELPER(target_ulong, helper_popc, (target_ulong val))
DEF_HELPER(void, helper_ldda_asi, (target_ulong addr, int asi, int rd))
DEF_HELPER(void, helper_ldf_asi, (target_ulong addr, int asi, int size, int rd))
DEF_HELPER(void, helper_stf_asi, (target_ulong addr, int asi, int size, int rd))
DEF_HELPER(target_ulong, helper_cas_asi, (target_ulong addr, \

61
target-sparc/op_helper.c
View File

@ -1634,12 +1634,15 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign)
}
break;
}
case 0x24: // Nucleus quad LDD 128 bit atomic
case 0x2c: // Nucleus quad LDD 128 bit atomic LE
// Only ldda allowed
raise_exception(TT_ILL_INSN);
return 0;
case 0x04: // Nucleus
case 0x0c: // Nucleus Little Endian (LE)
case 0x11: // As if user secondary
case 0x19: // As if user secondary LE
case 0x24: // Nucleus quad LDD 128 bit atomic
case 0x2c: // Nucleus quad LDD 128 bit atomic
case 0x4a: // UPA config
case 0x81: // Secondary
case 0x83: // Secondary no-fault
@ -1943,12 +1946,15 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size)
}
}
return;
case 0x24: // Nucleus quad LDD 128 bit atomic
case 0x2c: // Nucleus quad LDD 128 bit atomic LE
// Only ldda allowed
raise_exception(TT_ILL_INSN);
return;
case 0x04: // Nucleus
case 0x0c: // Nucleus Little Endian (LE)
case 0x11: // As if user secondary
case 0x19: // As if user secondary LE
case 0x24: // Nucleus quad LDD 128 bit atomic
case 0x2c: // Nucleus quad LDD 128 bit atomic
case 0x4a: // UPA config
case 0x81: // Secondary
case 0x89: // Secondary LE
@ -2144,6 +2150,53 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size)
}
#endif /* CONFIG_USER_ONLY */
void helper_ldda_asi(target_ulong addr, int asi, int rd)
{
unsigned int i;
if ((asi < 0x80 && (env->pstate & PS_PRIV) == 0)
|| (asi >= 0x30 && asi < 0x80 && !(env->hpstate & HS_PRIV)))
raise_exception(TT_PRIV_ACT);
switch (asi) {
case 0x24: // Nucleus quad LDD 128 bit atomic
case 0x2c: // Nucleus quad LDD 128 bit atomic LE
helper_check_align(addr, 0xf);
if (rd == 0) {
env->gregs[1] = ldq_kernel(addr + 8);
if (asi == 0x2c)
bswap64s(&env->gregs[1]);
} else if (rd < 8) {
env->gregs[rd] = ldq_kernel(addr);
env->gregs[rd + 1] = ldq_kernel(addr + 8);
if (asi == 0x2c) {
bswap64s(&env->gregs[rd]);
bswap64s(&env->gregs[rd + 1]);
}
} else {
env->regwptr[rd] = ldq_kernel(addr);
env->regwptr[rd + 1] = ldq_kernel(addr + 8);
if (asi == 0x2c) {
bswap64s(&env->regwptr[rd]);
bswap64s(&env->regwptr[rd + 1]);
}
}
break;
default:
helper_check_align(addr, 0x3);
if (rd == 0)
env->gregs[1] = helper_ld_asi(addr + 4, asi, 4, 0);
else if (rd < 8) {
env->gregs[rd] = helper_ld_asi(addr, asi, 4, 0);
env->gregs[rd + 1] = helper_ld_asi(addr + 4, asi, 4, 0);
} else {
env->regwptr[rd] = helper_ld_asi(addr, asi, 4, 0);
env->regwptr[rd + 1] = helper_ld_asi(addr + 4, asi, 4, 0);
}
break;
}
}
void helper_ldf_asi(target_ulong addr, int asi, int size, int rd)
{
unsigned int i;

28
target-sparc/translate.c
View File

@ -1722,20 +1722,15 @@ static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn)
tcg_gen_trunc_i64_tl(dst, cpu_tmp64);
}
static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn)
static inline void gen_ldda_asi(TCGv hi, TCGv addr, int insn, int rd)
{
TCGv r_asi, r_size, r_sign;
TCGv r_asi, r_rd;
r_asi = gen_get_asi(insn, addr);
r_size = tcg_const_i32(8);
r_sign = tcg_const_i32(0);
tcg_gen_helper_1_4(helper_ld_asi, cpu_tmp64, addr, r_asi, r_size, r_sign);
tcg_temp_free(r_sign);
tcg_temp_free(r_size);
r_rd = tcg_const_i32(rd);
tcg_gen_helper_0_3(helper_ldda_asi, addr, r_asi, r_rd);
tcg_temp_free(r_rd);
tcg_temp_free(r_asi);
tcg_gen_andi_i64(lo, cpu_tmp64, 0xffffffffULL);
tcg_gen_shri_i64(cpu_tmp64, cpu_tmp64, 32);
tcg_gen_andi_i64(hi, cpu_tmp64, 0xffffffffULL);
}
static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd)
@ -1822,7 +1817,7 @@ static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn)
tcg_gen_trunc_i64_tl(dst, cpu_tmp64);
}
static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn)
static inline void gen_ldda_asi(TCGv hi, TCGv addr, int insn, int rd)
{
TCGv r_asi, r_size, r_sign;
@ -1833,9 +1828,11 @@ static inline void gen_ldda_asi(TCGv lo, TCGv hi, TCGv addr, int insn)
tcg_temp_free(r_sign);
tcg_temp_free(r_size);
tcg_temp_free(r_asi);
tcg_gen_trunc_i64_tl(lo, cpu_tmp64);
tcg_gen_trunc_i64_tl(cpu_tmp0, cpu_tmp64);
gen_movl_TN_reg(rd + 1, cpu_tmp0);
tcg_gen_shri_i64(cpu_tmp64, cpu_tmp64, 32);
tcg_gen_trunc_i64_tl(hi, cpu_tmp64);
gen_movl_TN_reg(rd, hi);
}
static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd)
@ -4310,9 +4307,8 @@ static void disas_sparc_insn(DisasContext * dc)
if (rd & 1)
goto illegal_insn;
save_state(dc, cpu_cond);
gen_ldda_asi(cpu_tmp0, cpu_val, cpu_addr, insn);
gen_movl_TN_reg(rd + 1, cpu_tmp0);
break;
gen_ldda_asi(cpu_val, cpu_addr, insn, rd);
goto skip_move;
case 0x19: /* load signed byte alternate */
#ifndef TARGET_SPARC64
if (IS_IMM)
@ -4403,7 +4399,7 @@ static void disas_sparc_insn(DisasContext * dc)
goto illegal_insn;
}
gen_movl_TN_reg(rd, cpu_val);
#ifdef TARGET_SPARC64
#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
skip_move: ;
#endif
} else if (xop >= 0x20 && xop < 0x24) {