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target-openrisc: Remove unnecessary code generated by jump instructions

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The sr_f variable is only used for the l.bf and l.bnf instructions.
For clarity the code is also rewritten using a switch statement instead
of if chaining.

Signed-off-by: Sebastian Macke <sebastian@macke.de>
Reviewed-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Jia Liu <proljc@gmail.com>
This commit is contained in:
Sebastian Macke 2013-10-22 02:12:38 +02:00 committed by Jia Liu
parent 352367e8bb
commit da1d77597b
1 changed files with 26 additions and 19 deletions
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45
target-openrisc/translate.c
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@ -209,42 +209,49 @@ static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
static void gen_jump(DisasContext *dc, uint32_t imm, uint32_t reg, uint32_t op0)
{
target_ulong tmp_pc;
int lab = gen_new_label();
TCGv sr_f = tcg_temp_new();
/* N26, 26bits imm */
tmp_pc = sign_extend((imm<<2), 26) + dc->pc;
tcg_gen_andi_tl(sr_f, cpu_sr, SR_F);
if (op0 == 0x00) { /* l.j */
switch (op0) {
case 0x00: /* l.j */
tcg_gen_movi_tl(jmp_pc, tmp_pc);
} else if (op0 == 0x01) { /* l.jal */
break;
case 0x01: /* l.jal */
tcg_gen_movi_tl(cpu_R[9], (dc->pc + 8));
tcg_gen_movi_tl(jmp_pc, tmp_pc);
} else if (op0 == 0x03) { /* l.bnf */
tcg_gen_movi_tl(jmp_pc, dc->pc+8);
tcg_gen_brcondi_i32(TCG_COND_EQ, sr_f, SR_F, lab);
tcg_gen_movi_tl(jmp_pc, tmp_pc);
gen_set_label(lab);
} else if (op0 == 0x04) { /* l.bf */
tcg_gen_movi_tl(jmp_pc, dc->pc+8);
tcg_gen_brcondi_i32(TCG_COND_NE, sr_f, SR_F, lab);
tcg_gen_movi_tl(jmp_pc, tmp_pc);
gen_set_label(lab);
} else if (op0 == 0x11) { /* l.jr */
break;
case 0x03: /* l.bnf */
case 0x04: /* l.bf */
{
int lab = gen_new_label();
TCGv sr_f = tcg_temp_new();
tcg_gen_movi_tl(jmp_pc, dc->pc+8);
tcg_gen_andi_tl(sr_f, cpu_sr, SR_F);
tcg_gen_brcondi_i32(op0 == 0x03 ? TCG_COND_EQ : TCG_COND_NE,
sr_f, SR_F, lab);
tcg_gen_movi_tl(jmp_pc, tmp_pc);
gen_set_label(lab);
tcg_temp_free(sr_f);
}
break;
case 0x11: /* l.jr */
tcg_gen_mov_tl(jmp_pc, cpu_R[reg]);
} else if (op0 == 0x12) { /* l.jalr */
break;
case 0x12: /* l.jalr */
tcg_gen_movi_tl(cpu_R[9], (dc->pc + 8));
tcg_gen_mov_tl(jmp_pc, cpu_R[reg]);
} else {
break;
default:
gen_illegal_exception(dc);
break;
}
tcg_temp_free(sr_f);
dc->delayed_branch = 2;
dc->tb_flags |= D_FLAG;
gen_sync_flags(dc);
}
static void dec_calc(DisasContext *dc, uint32_t insn)
{
uint32_t op0, op1, op2;