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Hexagon (target/hexagon) TCG generation cleanup

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Simplify TCG generation of hex_reg_written

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-2-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Taylor Simpson 2021-04-08 20:07:29 -05:00 committed by Richard Henderson
parent 5f261764ce
commit d799f8ad08
1 changed files with 9 additions and 5 deletions
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14
target/hexagon/genptr.c
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@ -35,7 +35,6 @@ static inline TCGv gen_read_preg(TCGv pred, uint8_t num)
static inline void gen_log_predicated_reg_write(int rnum, TCGv val, int slot) static inline void gen_log_predicated_reg_write(int rnum, TCGv val, int slot)
{ {
TCGv one = tcg_const_tl(1);
TCGv zero = tcg_const_tl(0); TCGv zero = tcg_const_tl(0);
TCGv slot_mask = tcg_temp_new(); TCGv slot_mask = tcg_temp_new();
@ -43,12 +42,17 @@ static inline void gen_log_predicated_reg_write(int rnum, TCGv val, int slot)
tcg_gen_movcond_tl(TCG_COND_EQ, hex_new_value[rnum], slot_mask, zero, tcg_gen_movcond_tl(TCG_COND_EQ, hex_new_value[rnum], slot_mask, zero,
val, hex_new_value[rnum]); val, hex_new_value[rnum]);
#if HEX_DEBUG #if HEX_DEBUG
/* Do this so HELPER(debug_commit_end) will know */ /*
tcg_gen_movcond_tl(TCG_COND_EQ, hex_reg_written[rnum], slot_mask, zero, * Do this so HELPER(debug_commit_end) will know
one, hex_reg_written[rnum]); *
* Note that slot_mask indicates the value is not written
* (i.e., slot was cancelled), so we create a true/false value before
* or'ing with hex_reg_written[rnum].
*/
tcg_gen_setcond_tl(TCG_COND_EQ, slot_mask, slot_mask, zero);
tcg_gen_or_tl(hex_reg_written[rnum], hex_reg_written[rnum], slot_mask);
#endif #endif
tcg_temp_free(one);
tcg_temp_free(zero); tcg_temp_free(zero);
tcg_temp_free(slot_mask); tcg_temp_free(slot_mask);
} }