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Make CPURead/WriteFunc structure 'const'

Browse Source 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-08-25 18:29:31 +00:00
parent fa31af0e63
commit d60efc6b0d
144 changed files with 1552 additions and 554 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
cpu-common.h
View File

@ -36,8 +36,8 @@ void *qemu_get_ram_ptr(ram_addr_t addr);
/* This should not be used by devices. */
ram_addr_t qemu_ram_addr_from_host(void *ptr);
int cpu_register_io_memory(CPUReadMemoryFunc **mem_read,
CPUWriteMemoryFunc **mem_write,
int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
CPUWriteMemoryFunc * const *mem_write,
void *opaque);
void cpu_unregister_io_memory(int table_address);

28
exec.c
View File

@ -205,8 +205,8 @@ static int tb_phys_invalidate_count;
#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
typedef struct subpage_t {
target_phys_addr_t base;
CPUReadMemoryFunc **mem_read[TARGET_PAGE_SIZE][4];
CPUWriteMemoryFunc **mem_write[TARGET_PAGE_SIZE][4];
CPUReadMemoryFunc * const *mem_read[TARGET_PAGE_SIZE][4];
CPUWriteMemoryFunc * const *mem_write[TARGET_PAGE_SIZE][4];
void *opaque[TARGET_PAGE_SIZE][2][4];
ram_addr_t region_offset[TARGET_PAGE_SIZE][2][4];
} subpage_t;
@ -2550,13 +2550,13 @@ static void unassigned_mem_writel(void *opaque, target_phys_addr_t addr, uint32_
#endif
}
static CPUReadMemoryFunc *unassigned_mem_read[3] = {
static CPUReadMemoryFunc * const unassigned_mem_read[3] = {
unassigned_mem_readb,
unassigned_mem_readw,
unassigned_mem_readl,
};
static CPUWriteMemoryFunc *unassigned_mem_write[3] = {
static CPUWriteMemoryFunc * const unassigned_mem_write[3] = {
unassigned_mem_writeb,
unassigned_mem_writew,
unassigned_mem_writel,
@ -2622,13 +2622,13 @@ static void notdirty_mem_writel(void *opaque, target_phys_addr_t ram_addr,
tlb_set_dirty(cpu_single_env, cpu_single_env->mem_io_vaddr);
}
static CPUReadMemoryFunc *error_mem_read[3] = {
static CPUReadMemoryFunc * const error_mem_read[3] = {
NULL, /* never used */
NULL, /* never used */
NULL, /* never used */
};
static CPUWriteMemoryFunc *notdirty_mem_write[3] = {
static CPUWriteMemoryFunc * const notdirty_mem_write[3] = {
notdirty_mem_writeb,
notdirty_mem_writew,
notdirty_mem_writel,
@ -2721,13 +2721,13 @@ static void watch_mem_writel(void *opaque, target_phys_addr_t addr,
stl_phys(addr, val);
}
static CPUReadMemoryFunc *watch_mem_read[3] = {
static CPUReadMemoryFunc * const watch_mem_read[3] = {
watch_mem_readb,
watch_mem_readw,
watch_mem_readl,
};
static CPUWriteMemoryFunc *watch_mem_write[3] = {
static CPUWriteMemoryFunc * const watch_mem_write[3] = {
watch_mem_writeb,
watch_mem_writew,
watch_mem_writel,
@ -2819,13 +2819,13 @@ static void subpage_writel (void *opaque,
subpage_writelen(opaque, addr, value, 2);
}
static CPUReadMemoryFunc *subpage_read[] = {
static CPUReadMemoryFunc * const subpage_read[] = {
&subpage_readb,
&subpage_readw,
&subpage_readl,
};
static CPUWriteMemoryFunc *subpage_write[] = {
static CPUWriteMemoryFunc * const subpage_write[] = {
&subpage_writeb,
&subpage_writew,
&subpage_writel,
@ -2906,8 +2906,8 @@ static int get_free_io_mem_idx(void)
value can be used with cpu_register_physical_memory(). (-1) is
returned if error. */
static int cpu_register_io_memory_fixed(int io_index,
CPUReadMemoryFunc **mem_read,
CPUWriteMemoryFunc **mem_write,
CPUReadMemoryFunc * const *mem_read,
CPUWriteMemoryFunc * const *mem_write,
void *opaque)
{
int i, subwidth = 0;
@ -2932,8 +2932,8 @@ static int cpu_register_io_memory_fixed(int io_index,
return (io_index << IO_MEM_SHIFT) | subwidth;
}
int cpu_register_io_memory(CPUReadMemoryFunc **mem_read,
CPUWriteMemoryFunc **mem_write,
int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
CPUWriteMemoryFunc * const *mem_write,
void *opaque)
{
return cpu_register_io_memory_fixed(0, mem_read, mem_write, opaque);

16
hw/apb_pci.c
View File

@ -75,13 +75,13 @@ static uint32_t pci_apb_config_readl (void *opaque,
return val;
}
static CPUWriteMemoryFunc *pci_apb_config_write[] = {
static CPUWriteMemoryFunc * const pci_apb_config_write[] = {
&pci_apb_config_writel,
&pci_apb_config_writel,
&pci_apb_config_writel,
};
static CPUReadMemoryFunc *pci_apb_config_read[] = {
static CPUReadMemoryFunc * const pci_apb_config_read[] = {
&pci_apb_config_readl,
&pci_apb_config_readl,
&pci_apb_config_readl,
@ -124,25 +124,25 @@ static uint32_t apb_config_readl (void *opaque,
return val;
}
static CPUWriteMemoryFunc *apb_config_write[] = {
static CPUWriteMemoryFunc * const apb_config_write[] = {
&apb_config_writel,
&apb_config_writel,
&apb_config_writel,
};
static CPUReadMemoryFunc *apb_config_read[] = {
static CPUReadMemoryFunc * const apb_config_read[] = {
&apb_config_readl,
&apb_config_readl,
&apb_config_readl,
};
static CPUWriteMemoryFunc *pci_apb_write[] = {
static CPUWriteMemoryFunc * const pci_apb_write[] = {
&pci_host_data_writeb,
&pci_host_data_writew,
&pci_host_data_writel,
};
static CPUReadMemoryFunc *pci_apb_read[] = {
static CPUReadMemoryFunc * const pci_apb_read[] = {
&pci_host_data_readb,
&pci_host_data_readw,
&pci_host_data_readl,
@ -190,13 +190,13 @@ static uint32_t pci_apb_ioreadl (void *opaque, target_phys_addr_t addr)
return val;
}
static CPUWriteMemoryFunc *pci_apb_iowrite[] = {
static CPUWriteMemoryFunc * const pci_apb_iowrite[] = {
&pci_apb_iowriteb,
&pci_apb_iowritew,
&pci_apb_iowritel,
};
static CPUReadMemoryFunc *pci_apb_ioread[] = {
static CPUReadMemoryFunc * const pci_apb_ioread[] = {
&pci_apb_ioreadb,
&pci_apb_ioreadw,
&pci_apb_ioreadl,

4
hw/apic.c
View File

@ -957,13 +957,13 @@ static void apic_reset(void *opaque)
cpu_synchronize_state(s->cpu_env, 1);
}
static CPUReadMemoryFunc *apic_mem_read[3] = {
static CPUReadMemoryFunc * const apic_mem_read[3] = {
apic_mem_readb,
apic_mem_readw,
apic_mem_readl,
};
static CPUWriteMemoryFunc *apic_mem_write[3] = {
static CPUWriteMemoryFunc * const apic_mem_write[3] = {
apic_mem_writeb,
apic_mem_writew,
apic_mem_writel,

4
hw/arm_gic.c
View File

@ -558,13 +558,13 @@ static void gic_dist_writel(void *opaque, target_phys_addr_t offset,
gic_dist_writew(opaque, offset + 2, value >> 16);
}
static CPUReadMemoryFunc *gic_dist_readfn[] = {
static CPUReadMemoryFunc * const gic_dist_readfn[] = {
gic_dist_readb,
gic_dist_readw,
gic_dist_readl
};
static CPUWriteMemoryFunc *gic_dist_writefn[] = {
static CPUWriteMemoryFunc * const gic_dist_writefn[] = {
gic_dist_writeb,
gic_dist_writew,
gic_dist_writel

4
hw/arm_sysctl.c
View File

@ -177,13 +177,13 @@ static void arm_sysctl_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *arm_sysctl_readfn[] = {
static CPUReadMemoryFunc * const arm_sysctl_readfn[] = {
arm_sysctl_read,
arm_sysctl_read,
arm_sysctl_read
};
static CPUWriteMemoryFunc *arm_sysctl_writefn[] = {
static CPUWriteMemoryFunc * const arm_sysctl_writefn[] = {
arm_sysctl_write,
arm_sysctl_write,
arm_sysctl_write

8
hw/arm_timer.c
View File

@ -223,13 +223,13 @@ static void sp804_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *sp804_readfn[] = {
static CPUReadMemoryFunc * const sp804_readfn[] = {
sp804_read,
sp804_read,
sp804_read
};
static CPUWriteMemoryFunc *sp804_writefn[] = {
static CPUWriteMemoryFunc * const sp804_writefn[] = {
sp804_write,
sp804_write,
sp804_write
@ -311,13 +311,13 @@ static void icp_pit_write(void *opaque, target_phys_addr_t offset,
}
static CPUReadMemoryFunc *icp_pit_readfn[] = {
static CPUReadMemoryFunc * const icp_pit_readfn[] = {
icp_pit_read,
icp_pit_read,
icp_pit_read
};
static CPUWriteMemoryFunc *icp_pit_writefn[] = {
static CPUWriteMemoryFunc * const icp_pit_writefn[] = {
icp_pit_write,
icp_pit_write,
icp_pit_write

4
hw/armv7m.c
View File

@ -105,13 +105,13 @@ static void bitband_writel(void *opaque, target_phys_addr_t offset,
cpu_physical_memory_write(addr, (uint8_t *)&v, 4);
}
static CPUReadMemoryFunc *bitband_readfn[] = {
static CPUReadMemoryFunc * const bitband_readfn[] = {
bitband_readb,
bitband_readw,
bitband_readl
};
static CPUWriteMemoryFunc *bitband_writefn[] = {
static CPUWriteMemoryFunc * const bitband_writefn[] = {
bitband_writeb,
bitband_writew,
bitband_writel

8
hw/axis_dev88.c
View File

@ -69,13 +69,13 @@ nand_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
s->rdy = rdy;
}
static CPUReadMemoryFunc *nand_read[] = {
static CPUReadMemoryFunc * const nand_read[] = {
&nand_readl,
&nand_readl,
&nand_readl,
};
static CPUWriteMemoryFunc *nand_write[] = {
static CPUWriteMemoryFunc * const nand_write[] = {
&nand_writel,
&nand_writel,
&nand_writel,
@ -226,12 +226,12 @@ static void gpio_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
static CPUReadMemoryFunc *gpio_read[] = {
static CPUReadMemoryFunc * const gpio_read[] = {
NULL, NULL,
&gpio_readl,
};
static CPUWriteMemoryFunc *gpio_write[] = {
static CPUWriteMemoryFunc * const gpio_write[] = {
NULL, NULL,
&gpio_writel,
};

16
hw/cirrus_vga.c
View File

@ -2156,13 +2156,13 @@ static void cirrus_vga_mem_writel(void *opaque, target_phys_addr_t addr, uint32_
#endif
}
static CPUReadMemoryFunc *cirrus_vga_mem_read[3] = {
static CPUReadMemoryFunc * const cirrus_vga_mem_read[3] = {
cirrus_vga_mem_readb,
cirrus_vga_mem_readw,
cirrus_vga_mem_readl,
};
static CPUWriteMemoryFunc *cirrus_vga_mem_write[3] = {
static CPUWriteMemoryFunc * const cirrus_vga_mem_write[3] = {
cirrus_vga_mem_writeb,
cirrus_vga_mem_writew,
cirrus_vga_mem_writel,
@ -2472,13 +2472,13 @@ static void cirrus_linear_writel(void *opaque, target_phys_addr_t addr,
}
static CPUReadMemoryFunc *cirrus_linear_read[3] = {
static CPUReadMemoryFunc * const cirrus_linear_read[3] = {
cirrus_linear_readb,
cirrus_linear_readw,
cirrus_linear_readl,
};
static CPUWriteMemoryFunc *cirrus_linear_write[3] = {
static CPUWriteMemoryFunc * const cirrus_linear_write[3] = {
cirrus_linear_writeb,
cirrus_linear_writew,
cirrus_linear_writel,
@ -2573,13 +2573,13 @@ static void cirrus_linear_bitblt_writel(void *opaque, target_phys_addr_t addr,
}
static CPUReadMemoryFunc *cirrus_linear_bitblt_read[3] = {
static CPUReadMemoryFunc * const cirrus_linear_bitblt_read[3] = {
cirrus_linear_bitblt_readb,
cirrus_linear_bitblt_readw,
cirrus_linear_bitblt_readl,
};
static CPUWriteMemoryFunc *cirrus_linear_bitblt_write[3] = {
static CPUWriteMemoryFunc * const cirrus_linear_bitblt_write[3] = {
cirrus_linear_bitblt_writeb,
cirrus_linear_bitblt_writew,
cirrus_linear_bitblt_writel,
@ -3003,13 +3003,13 @@ static void cirrus_mmio_writel(void *opaque, target_phys_addr_t addr,
}
static CPUReadMemoryFunc *cirrus_mmio_read[3] = {
static CPUReadMemoryFunc * const cirrus_mmio_read[3] = {
cirrus_mmio_readb,
cirrus_mmio_readw,
cirrus_mmio_readl,
};
static CPUWriteMemoryFunc *cirrus_mmio_write[3] = {
static CPUWriteMemoryFunc * const cirrus_mmio_write[3] = {
cirrus_mmio_writeb,
cirrus_mmio_writew,
cirrus_mmio_writel,

4
hw/cs4231.c
View File

@ -129,13 +129,13 @@ static void cs_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
}
}
static CPUReadMemoryFunc *cs_mem_read[3] = {
static CPUReadMemoryFunc * const cs_mem_read[3] = {
cs_mem_readl,
cs_mem_readl,
cs_mem_readl,
};
static CPUWriteMemoryFunc *cs_mem_write[3] = {
static CPUWriteMemoryFunc * const cs_mem_write[3] = {
cs_mem_writel,
cs_mem_writel,
cs_mem_writel,

4
hw/cuda.c
View File

@ -630,13 +630,13 @@ static uint32_t cuda_readl (void *opaque, target_phys_addr_t addr)
return 0;
}
static CPUWriteMemoryFunc *cuda_write[] = {
static CPUWriteMemoryFunc * const cuda_write[] = {
&cuda_writeb,
&cuda_writew,
&cuda_writel,
};
static CPUReadMemoryFunc *cuda_read[] = {
static CPUReadMemoryFunc * const cuda_read[] = {
&cuda_readb,
&cuda_readw,
&cuda_readl,

4
hw/dp8393x.c
View File

@ -663,13 +663,13 @@ static void dp8393x_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
dp8393x_writew(opaque, addr + 2, (val >> 16) & 0xffff);
}
static CPUReadMemoryFunc *dp8393x_read[3] = {
static CPUReadMemoryFunc * const dp8393x_read[3] = {
dp8393x_readb,
dp8393x_readw,
dp8393x_readl,
};
static CPUWriteMemoryFunc *dp8393x_write[3] = {
static CPUWriteMemoryFunc * const dp8393x_write[3] = {
dp8393x_writeb,
dp8393x_writew,
dp8393x_writel,

6
hw/ds1225y.c
View File

@ -126,19 +126,19 @@ static void nvram_writel_protected (void *opaque, target_phys_addr_t addr, uint3
nvram_writeb_protected(opaque, addr + 3, (val >> 24) & 0xff);
}
static CPUReadMemoryFunc *nvram_read[] = {
static CPUReadMemoryFunc * const nvram_read[] = {
&nvram_readb,
&nvram_readw,
&nvram_readl,
};
static CPUWriteMemoryFunc *nvram_write[] = {
static CPUWriteMemoryFunc * const nvram_write[] = {
&nvram_writeb,
&nvram_writew,
&nvram_writel,
};
static CPUWriteMemoryFunc *nvram_write_protected[] = {
static CPUWriteMemoryFunc * const nvram_write_protected[] = {
&nvram_writeb_protected,
&nvram_writew_protected,
&nvram_writel_protected,

4
hw/e1000.c
View File

@ -1020,11 +1020,11 @@ static const uint32_t mac_reg_init[] = {
/* PCI interface */
static CPUWriteMemoryFunc *e1000_mmio_write[] = {
static CPUWriteMemoryFunc * const e1000_mmio_write[] = {
e1000_mmio_writeb, e1000_mmio_writew, e1000_mmio_writel
};
static CPUReadMemoryFunc *e1000_mmio_read[] = {
static CPUReadMemoryFunc * const e1000_mmio_read[] = {
e1000_mmio_readb, e1000_mmio_readw, e1000_mmio_readl
};

8
hw/eccmemctl.c
View File

@ -221,13 +221,13 @@ static uint32_t ecc_mem_readl(void *opaque, target_phys_addr_t addr)
return ret;
}
static CPUReadMemoryFunc *ecc_mem_read[3] = {
static CPUReadMemoryFunc * const ecc_mem_read[3] = {
NULL,
NULL,
ecc_mem_readl,
};
static CPUWriteMemoryFunc *ecc_mem_write[3] = {
static CPUWriteMemoryFunc * const ecc_mem_write[3] = {
NULL,
NULL,
ecc_mem_writel,
@ -251,13 +251,13 @@ static uint32_t ecc_diag_mem_readb(void *opaque, target_phys_addr_t addr)
return ret;
}
static CPUReadMemoryFunc *ecc_diag_mem_read[3] = {
static CPUReadMemoryFunc * const ecc_diag_mem_read[3] = {
ecc_diag_mem_readb,
NULL,
NULL,
};
static CPUWriteMemoryFunc *ecc_diag_mem_write[3] = {
static CPUWriteMemoryFunc * const ecc_diag_mem_write[3] = {
ecc_diag_mem_writeb,
NULL,
NULL,

4
hw/eepro100.c
View File

@ -1405,13 +1405,13 @@ static uint32_t pci_mmio_readl(void *opaque, target_phys_addr_t addr)
return eepro100_read4(s, addr);
}
static CPUWriteMemoryFunc *pci_mmio_write[] = {
static CPUWriteMemoryFunc * const pci_mmio_write[] = {
pci_mmio_writeb,
pci_mmio_writew,
pci_mmio_writel
};
static CPUReadMemoryFunc *pci_mmio_read[] = {
static CPUReadMemoryFunc * const pci_mmio_read[] = {
pci_mmio_readb,
pci_mmio_readw,
pci_mmio_readl

4
hw/escc.c
View File

@ -654,13 +654,13 @@ static void serial_event(void *opaque, int event)
serial_receive_break(s);
}
static CPUReadMemoryFunc *escc_mem_read[3] = {
static CPUReadMemoryFunc * const escc_mem_read[3] = {
escc_mem_readb,
NULL,
NULL,
};
static CPUWriteMemoryFunc *escc_mem_write[3] = {
static CPUWriteMemoryFunc * const escc_mem_write[3] = {
escc_mem_writeb,
NULL,
NULL,

4
hw/esp.c
View File

@ -579,13 +579,13 @@ static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
s->wregs[saddr] = val;
}
static CPUReadMemoryFunc *esp_mem_read[3] = {
static CPUReadMemoryFunc * const esp_mem_read[3] = {
esp_mem_readb,
NULL,
NULL,
};
static CPUWriteMemoryFunc *esp_mem_write[3] = {
static CPUWriteMemoryFunc * const esp_mem_write[3] = {
esp_mem_writeb,
NULL,
esp_mem_writeb,

4
hw/etraxfs_dma.c
View File

@ -668,13 +668,13 @@ dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
static CPUReadMemoryFunc *dma_read[] = {
static CPUReadMemoryFunc * const dma_read[] = {
&dma_rinvalid,
&dma_rinvalid,
&dma_readl,
};
static CPUWriteMemoryFunc *dma_write[] = {
static CPUWriteMemoryFunc * const dma_write[] = {
&dma_winvalid,
&dma_winvalid,
&dma_writel,

4
hw/etraxfs_eth.c
View File

@ -544,12 +544,12 @@ static void eth_set_link(VLANClientState *vc)
eth->phy.link = !vc->link_down;
}
static CPUReadMemoryFunc *eth_read[] = {
static CPUReadMemoryFunc * const eth_read[] = {
NULL, NULL,
&eth_readl,
};
static CPUWriteMemoryFunc *eth_write[] = {
static CPUWriteMemoryFunc * const eth_write[] = {
NULL, NULL,
&eth_writel,
};

4
hw/etraxfs_pic.c
View File

@ -99,12 +99,12 @@ pic_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
static CPUReadMemoryFunc *pic_read[] = {
static CPUReadMemoryFunc * const pic_read[] = {
NULL, NULL,
&pic_readl,
};
static CPUWriteMemoryFunc *pic_write[] = {
static CPUWriteMemoryFunc * const pic_write[] = {
NULL, NULL,
&pic_writel,
};

4
hw/etraxfs_ser.c
View File

@ -122,12 +122,12 @@ ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
ser_update_irq(s);
}
static CPUReadMemoryFunc *ser_read[] = {
static CPUReadMemoryFunc * const ser_read[] = {
NULL, NULL,
&ser_readl,
};
static CPUWriteMemoryFunc *ser_write[] = {
static CPUWriteMemoryFunc * const ser_write[] = {
NULL, NULL,
&ser_writel,
};

4
hw/etraxfs_timer.c
View File

@ -285,12 +285,12 @@ timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
static CPUReadMemoryFunc *timer_read[] = {
static CPUReadMemoryFunc * const timer_read[] = {
NULL, NULL,
&timer_readl,
};
static CPUWriteMemoryFunc *timer_write[] = {
static CPUWriteMemoryFunc * const timer_write[] = {
NULL, NULL,
&timer_writel,
};

8
hw/fdc.c
View File

@ -603,25 +603,25 @@ static void fdctrl_write_mem (void *opaque,
fdctrl_write(opaque, (uint32_t)reg, value);
}
static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
static CPUReadMemoryFunc * const fdctrl_mem_read[3] = {
fdctrl_read_mem,
fdctrl_read_mem,
fdctrl_read_mem,
};
static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
static CPUWriteMemoryFunc * const fdctrl_mem_write[3] = {
fdctrl_write_mem,
fdctrl_write_mem,
fdctrl_write_mem,
};
static CPUReadMemoryFunc *fdctrl_mem_read_strict[3] = {
static CPUReadMemoryFunc * const fdctrl_mem_read_strict[3] = {
fdctrl_read_mem,
NULL,
NULL,
};
static CPUWriteMemoryFunc *fdctrl_mem_write_strict[3] = {
static CPUWriteMemoryFunc * const fdctrl_mem_write_strict[3] = {
fdctrl_write_mem,
NULL,
NULL,

8
hw/fw_cfg.c
View File

@ -133,25 +133,25 @@ static void fw_cfg_mem_writew(void *opaque, target_phys_addr_t addr,
fw_cfg_select(opaque, (uint16_t)value);
}
static CPUReadMemoryFunc *fw_cfg_ctl_mem_read[3] = {
static CPUReadMemoryFunc * const fw_cfg_ctl_mem_read[3] = {
NULL,
NULL,
NULL,
};
static CPUWriteMemoryFunc *fw_cfg_ctl_mem_write[3] = {
static CPUWriteMemoryFunc * const fw_cfg_ctl_mem_write[3] = {
NULL,
fw_cfg_mem_writew,
NULL,
};
static CPUReadMemoryFunc *fw_cfg_data_mem_read[3] = {
static CPUReadMemoryFunc * const fw_cfg_data_mem_read[3] = {
fw_cfg_mem_readb,
NULL,
NULL,
};
static CPUWriteMemoryFunc *fw_cfg_data_mem_write[3] = {
static CPUWriteMemoryFunc * const fw_cfg_data_mem_write[3] = {
fw_cfg_mem_writeb,
NULL,
NULL,

4
hw/g364fb.c
View File

@ -522,13 +522,13 @@ static void g364fb_ctrl_writeb(void *opaque, target_phys_addr_t addr, uint32_t v
g364fb_ctrl_writel(opaque, addr & ~0x3, val);
}
static CPUReadMemoryFunc *g364fb_ctrl_read[3] = {
static CPUReadMemoryFunc * const g364fb_ctrl_read[3] = {
g364fb_ctrl_readb,
g364fb_ctrl_readw,
g364fb_ctrl_readl,
};
static CPUWriteMemoryFunc *g364fb_ctrl_write[3] = {
static CPUWriteMemoryFunc * const g364fb_ctrl_write[3] = {
g364fb_ctrl_writeb,
g364fb_ctrl_writew,
g364fb_ctrl_writel,

8
hw/grackle_pci.c
View File

@ -72,25 +72,25 @@ static uint32_t pci_grackle_config_readl (void *opaque, target_phys_addr_t addr)
return val;
}
static CPUWriteMemoryFunc *pci_grackle_config_write[] = {
static CPUWriteMemoryFunc * const pci_grackle_config_write[] = {
&pci_grackle_config_writel,
&pci_grackle_config_writel,
&pci_grackle_config_writel,
};
static CPUReadMemoryFunc *pci_grackle_config_read[] = {
static CPUReadMemoryFunc * const pci_grackle_config_read[] = {
&pci_grackle_config_readl,
&pci_grackle_config_readl,
&pci_grackle_config_readl,
};
static CPUWriteMemoryFunc *pci_grackle_write[] = {
static CPUWriteMemoryFunc * const pci_grackle_write[] = {
&pci_host_data_writeb,
&pci_host_data_writew,
&pci_host_data_writel,
};
static CPUReadMemoryFunc *pci_grackle_read[] = {
static CPUReadMemoryFunc * const pci_grackle_read[] = {
&pci_host_data_readb,
&pci_host_data_readw,
&pci_host_data_readl,

4
hw/gt64xxx.c
View File

@ -854,13 +854,13 @@ static uint32_t gt64120_readl (void *opaque,
return val;
}
static CPUWriteMemoryFunc *gt64120_write[] = {
static CPUWriteMemoryFunc * const gt64120_write[] = {
&gt64120_writel,
&gt64120_writel,
&gt64120_writel,
};
static CPUReadMemoryFunc *gt64120_read[] = {
static CPUReadMemoryFunc * const gt64120_read[] = {
&gt64120_readl,
&gt64120_readl,
&gt64120_readl,

4
hw/heathrow_pic.c
View File

@ -126,13 +126,13 @@ static uint32_t pic_readl (void *opaque, target_phys_addr_t addr)
return value;
}
static CPUWriteMemoryFunc *pic_write[] = {
static CPUWriteMemoryFunc * const pic_write[] = {
&pic_writel,
&pic_writel,
&pic_writel,
};
static CPUReadMemoryFunc *pic_read[] = {
static CPUReadMemoryFunc * const pic_read[] = {
&pic_readl,
&pic_readl,
&pic_readl,

4
hw/hpet.c
View File

@ -508,7 +508,7 @@ static void hpet_ram_writel(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *hpet_ram_read[] = {
static CPUReadMemoryFunc * const hpet_ram_read[] = {
#ifdef HPET_DEBUG
hpet_ram_readb,
hpet_ram_readw,
@ -519,7 +519,7 @@ static CPUReadMemoryFunc *hpet_ram_read[] = {
hpet_ram_readl,
};
static CPUWriteMemoryFunc *hpet_ram_write[] = {
static CPUWriteMemoryFunc * const hpet_ram_write[] = {
#ifdef HPET_DEBUG
hpet_ram_writeb,
hpet_ram_writew,

12
hw/ide.c
View File

@ -3906,13 +3906,13 @@ static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr)
return retval;
}
static CPUWriteMemoryFunc *pmac_ide_write[] = {
static CPUWriteMemoryFunc * const pmac_ide_write[] = {
pmac_ide_writeb,
pmac_ide_writew,
pmac_ide_writel,
};
static CPUReadMemoryFunc *pmac_ide_read[] = {
static CPUReadMemoryFunc * const pmac_ide_read[] = {
pmac_ide_readb,
pmac_ide_readw,
pmac_ide_readl,
@ -4026,13 +4026,13 @@ static void mmio_ide_write (void *opaque, target_phys_addr_t addr,
ide_data_writew(ide, 0, val);
}
static CPUReadMemoryFunc *mmio_ide_reads[] = {
static CPUReadMemoryFunc * const mmio_ide_reads[] = {
mmio_ide_read,
mmio_ide_read,
mmio_ide_read,
};
static CPUWriteMemoryFunc *mmio_ide_writes[] = {
static CPUWriteMemoryFunc * const mmio_ide_writes[] = {
mmio_ide_write,
mmio_ide_write,
mmio_ide_write,
@ -4053,13 +4053,13 @@ static void mmio_ide_cmd_write (void *opaque, target_phys_addr_t addr,
ide_cmd_write(ide, 0, val);
}
static CPUReadMemoryFunc *mmio_ide_status[] = {
static CPUReadMemoryFunc * const mmio_ide_status[] = {
mmio_ide_status_read,
mmio_ide_status_read,
mmio_ide_status_read,
};
static CPUWriteMemoryFunc *mmio_ide_cmd[] = {
static CPUWriteMemoryFunc * const mmio_ide_cmd[] = {
mmio_ide_cmd_write,
mmio_ide_cmd_write,
mmio_ide_cmd_write,

12
hw/integratorcp.c
View File

@ -215,13 +215,13 @@ static void integratorcm_write(void *opaque, target_phys_addr_t offset,
/* Integrator/CM control registers. */
static CPUReadMemoryFunc *integratorcm_readfn[] = {
static CPUReadMemoryFunc * const integratorcm_readfn[] = {
integratorcm_read,
integratorcm_read,
integratorcm_read
};
static CPUWriteMemoryFunc *integratorcm_writefn[] = {
static CPUWriteMemoryFunc * const integratorcm_writefn[] = {
integratorcm_write,
integratorcm_write,
integratorcm_write
@ -360,13 +360,13 @@ static void icp_pic_write(void *opaque, target_phys_addr_t offset,
icp_pic_update(s);
}
static CPUReadMemoryFunc *icp_pic_readfn[] = {
static CPUReadMemoryFunc * const icp_pic_readfn[] = {
icp_pic_read,
icp_pic_read,
icp_pic_read
};
static CPUWriteMemoryFunc *icp_pic_writefn[] = {
static CPUWriteMemoryFunc * const icp_pic_writefn[] = {
icp_pic_write,
icp_pic_write,
icp_pic_write
@ -416,13 +416,13 @@ static void icp_control_write(void *opaque, target_phys_addr_t offset,
hw_error("icp_control_write: Bad offset %x\n", (int)offset);
}
}
static CPUReadMemoryFunc *icp_control_readfn[] = {
static CPUReadMemoryFunc * const icp_control_readfn[] = {
icp_control_read,
icp_control_read,
icp_control_read
};
static CPUWriteMemoryFunc *icp_control_writefn[] = {
static CPUWriteMemoryFunc * const icp_control_writefn[] = {
icp_control_write,
icp_control_write,
icp_control_write

4
hw/ioapic.c
View File

@ -229,13 +229,13 @@ static void ioapic_reset(void *opaque)
s->ioredtbl[i] = 1 << 16; /* mask LVT */
}
static CPUReadMemoryFunc *ioapic_mem_read[3] = {
static CPUReadMemoryFunc * const ioapic_mem_read[3] = {
ioapic_mem_readl,
ioapic_mem_readl,
ioapic_mem_readl,
};
static CPUWriteMemoryFunc *ioapic_mem_write[3] = {
static CPUWriteMemoryFunc * const ioapic_mem_write[3] = {
ioapic_mem_writel,
ioapic_mem_writel,
ioapic_mem_writel,

4
hw/iommu.c
View File

@ -238,13 +238,13 @@ static void iommu_mem_writel(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *iommu_mem_read[3] = {
static CPUReadMemoryFunc * const iommu_mem_read[3] = {
NULL,
NULL,
iommu_mem_readl,
};
static CPUWriteMemoryFunc *iommu_mem_write[3] = {
static CPUWriteMemoryFunc * const iommu_mem_write[3] = {
NULL,
NULL,
iommu_mem_writel,

4
hw/isa_mmio.c
View File

@ -79,13 +79,13 @@ static uint32_t isa_mmio_readl (void *opaque, target_phys_addr_t addr)
return val;
}
static CPUWriteMemoryFunc *isa_mmio_write[] = {
static CPUWriteMemoryFunc * const isa_mmio_write[] = {
&isa_mmio_writeb,
&isa_mmio_writew,
&isa_mmio_writel,
};
static CPUReadMemoryFunc *isa_mmio_read[] = {
static CPUReadMemoryFunc * const isa_mmio_read[] = {
&isa_mmio_readb,
&isa_mmio_readw,
&isa_mmio_readl,

4
hw/jazz_led.c
View File

@ -131,13 +131,13 @@ static void led_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
#endif
}
static CPUReadMemoryFunc *led_read[3] = {
static CPUReadMemoryFunc * const led_read[3] = {
led_readb,
led_readw,
led_readl,
};
static CPUWriteMemoryFunc *led_write[3] = {
static CPUWriteMemoryFunc * const led_write[3] = {
led_writeb,
led_writew,
led_writel,

8
hw/lsi53c895a.c
View File

@ -1779,13 +1779,13 @@ static uint32_t lsi_mmio_readl(void *opaque, target_phys_addr_t addr)
return val;
}
static CPUReadMemoryFunc *lsi_mmio_readfn[3] = {
static CPUReadMemoryFunc * const lsi_mmio_readfn[3] = {
lsi_mmio_readb,
lsi_mmio_readw,
lsi_mmio_readl,
};
static CPUWriteMemoryFunc *lsi_mmio_writefn[3] = {
static CPUWriteMemoryFunc * const lsi_mmio_writefn[3] = {
lsi_mmio_writeb,
lsi_mmio_writew,
lsi_mmio_writel,
@ -1860,13 +1860,13 @@ static uint32_t lsi_ram_readl(void *opaque, target_phys_addr_t addr)
return le32_to_cpu(s->script_ram[addr >> 2]);
}
static CPUReadMemoryFunc *lsi_ram_readfn[3] = {
static CPUReadMemoryFunc * const lsi_ram_readfn[3] = {
lsi_ram_readb,
lsi_ram_readw,
lsi_ram_readl,
};
static CPUWriteMemoryFunc *lsi_ram_writefn[3] = {
static CPUWriteMemoryFunc * const lsi_ram_writefn[3] = {
lsi_ram_writeb,
lsi_ram_writew,
lsi_ram_writel,

4
hw/m48t59.c
View File

@ -565,13 +565,13 @@ static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
return retval;
}
static CPUWriteMemoryFunc *nvram_write[] = {
static CPUWriteMemoryFunc * const nvram_write[] = {
&nvram_writeb,
&nvram_writew,
&nvram_writel,
};
static CPUReadMemoryFunc *nvram_read[] = {
static CPUReadMemoryFunc * const nvram_read[] = {
&nvram_readb,
&nvram_readw,
&nvram_readl,

4
hw/mac_dbdma.c
View File

@ -785,13 +785,13 @@ static uint32_t dbdma_readl (void *opaque, target_phys_addr_t addr)
return value;
}
static CPUWriteMemoryFunc *dbdma_write[] = {
static CPUWriteMemoryFunc * const dbdma_write[] = {
NULL,
NULL,
dbdma_writel,
};
static CPUReadMemoryFunc *dbdma_read[] = {
static CPUReadMemoryFunc * const dbdma_read[] = {
NULL,
NULL,
dbdma_readl,

4
hw/mac_nvram.c
View File

@ -93,13 +93,13 @@ static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
return value;
}
static CPUWriteMemoryFunc *nvram_write[] = {
static CPUWriteMemoryFunc * const nvram_write[] = {
&macio_nvram_writeb,
&macio_nvram_writeb,
&macio_nvram_writeb,
};
static CPUReadMemoryFunc *nvram_read[] = {
static CPUReadMemoryFunc * const nvram_read[] = {
&macio_nvram_readb,
&macio_nvram_readb,
&macio_nvram_readb,

4
hw/marvell_88w8618_audio.c
View File

@ -221,13 +221,13 @@ static void mv88w8618_audio_reset(void *opaque)
s->irq_enable = 0;
}
static CPUReadMemoryFunc *mv88w8618_audio_readfn[] = {
static CPUReadMemoryFunc * const mv88w8618_audio_readfn[] = {
mv88w8618_audio_read,
mv88w8618_audio_read,
mv88w8618_audio_read
};
static CPUWriteMemoryFunc *mv88w8618_audio_writefn[] = {
static CPUWriteMemoryFunc * const mv88w8618_audio_writefn[] = {
mv88w8618_audio_write,
mv88w8618_audio_write,
mv88w8618_audio_write

4
hw/mc146818rtc.c
View File

@ -696,13 +696,13 @@ static void cmos_mm_writel (void *opaque,
cmos_ioport_write(s, addr >> s->it_shift, value);
}
static CPUReadMemoryFunc *rtc_mm_read[] = {
static CPUReadMemoryFunc * const rtc_mm_read[] = {
&cmos_mm_readb,
&cmos_mm_readw,
&cmos_mm_readl,
};
static CPUWriteMemoryFunc *rtc_mm_write[] = {
static CPUWriteMemoryFunc * const rtc_mm_write[] = {
&cmos_mm_writeb,
&cmos_mm_writew,
&cmos_mm_writel,

4
hw/mcf5206.c
View File

@ -505,13 +505,13 @@ static void m5206_mbar_writel(void *opaque, target_phys_addr_t offset,
m5206_mbar_write(s, offset, value);
}
static CPUReadMemoryFunc *m5206_mbar_readfn[] = {
static CPUReadMemoryFunc * const m5206_mbar_readfn[] = {
m5206_mbar_readb,
m5206_mbar_readw,
m5206_mbar_readl
};
static CPUWriteMemoryFunc *m5206_mbar_writefn[] = {
static CPUWriteMemoryFunc * const m5206_mbar_writefn[] = {
m5206_mbar_writeb,
m5206_mbar_writew,
m5206_mbar_writel

8
hw/mcf5208.c
View File

@ -118,13 +118,13 @@ static uint32_t m5208_timer_read(void *opaque, target_phys_addr_t addr)
}
}
static CPUReadMemoryFunc *m5208_timer_readfn[] = {
static CPUReadMemoryFunc * const m5208_timer_readfn[] = {
m5208_timer_read,
m5208_timer_read,
m5208_timer_read
};
static CPUWriteMemoryFunc *m5208_timer_writefn[] = {
static CPUWriteMemoryFunc * const m5208_timer_writefn[] = {
m5208_timer_write,
m5208_timer_write,
m5208_timer_write
@ -157,13 +157,13 @@ static void m5208_sys_write(void *opaque, target_phys_addr_t addr,
hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
}
static CPUReadMemoryFunc *m5208_sys_readfn[] = {
static CPUReadMemoryFunc * const m5208_sys_readfn[] = {
m5208_sys_read,
m5208_sys_read,
m5208_sys_read
};
static CPUWriteMemoryFunc *m5208_sys_writefn[] = {
static CPUWriteMemoryFunc * const m5208_sys_writefn[] = {
m5208_sys_write,
m5208_sys_write,
m5208_sys_write

4
hw/mcf_fec.c
View File

@ -429,13 +429,13 @@ static ssize_t mcf_fec_receive(VLANClientState *vc, const uint8_t *buf, size_t s
return size;
}
static CPUReadMemoryFunc *mcf_fec_readfn[] = {
static CPUReadMemoryFunc * const mcf_fec_readfn[] = {
mcf_fec_read,
mcf_fec_read,
mcf_fec_read
};
static CPUWriteMemoryFunc *mcf_fec_writefn[] = {
static CPUWriteMemoryFunc * const mcf_fec_writefn[] = {
mcf_fec_write,
mcf_fec_write,
mcf_fec_write

4
hw/mcf_intc.c
View File

@ -127,13 +127,13 @@ static void mcf_intc_reset(mcf_intc_state *s)
s->active_vector = 24;
}
static CPUReadMemoryFunc *mcf_intc_readfn[] = {
static CPUReadMemoryFunc * const mcf_intc_readfn[] = {
mcf_intc_read,
mcf_intc_read,
mcf_intc_read
};
static CPUWriteMemoryFunc *mcf_intc_writefn[] = {
static CPUWriteMemoryFunc * const mcf_intc_writefn[] = {
mcf_intc_write,
mcf_intc_write,
mcf_intc_write

4
hw/mcf_uart.c
View File

@ -284,13 +284,13 @@ void *mcf_uart_init(qemu_irq irq, CharDriverState *chr)
}
static CPUReadMemoryFunc *mcf_uart_readfn[] = {
static CPUReadMemoryFunc * const mcf_uart_readfn[] = {
mcf_uart_read,
mcf_uart_read,
mcf_uart_read
};
static CPUWriteMemoryFunc *mcf_uart_writefn[] = {
static CPUWriteMemoryFunc * const mcf_uart_writefn[] = {
mcf_uart_write,
mcf_uart_write,
mcf_uart_write

8
hw/mips_jazz.c
View File

@ -58,13 +58,13 @@ static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
cpu_outw(env, 0x71, val & 0xff);
}
static CPUReadMemoryFunc *rtc_read[3] = {
static CPUReadMemoryFunc * const rtc_read[3] = {
rtc_readb,
rtc_readb,
rtc_readb,
};
static CPUWriteMemoryFunc *rtc_write[3] = {
static CPUWriteMemoryFunc * const rtc_write[3] = {
rtc_writeb,
rtc_writeb,
rtc_writeb,
@ -76,13 +76,13 @@ static void dma_dummy_writeb(void *opaque, target_phys_addr_t addr, uint32_t val
* the current DMA acknowledge cycle is completed. */
}
static CPUReadMemoryFunc *dma_dummy_read[3] = {
static CPUReadMemoryFunc * const dma_dummy_read[3] = {
NULL,
NULL,
NULL,
};
static CPUWriteMemoryFunc *dma_dummy_write[3] = {
static CPUWriteMemoryFunc * const dma_dummy_write[3] = {
dma_dummy_writeb,
dma_dummy_writeb,
dma_dummy_writeb,

4
hw/mips_malta.c
View File

@ -387,13 +387,13 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *malta_fpga_read[] = {
static CPUReadMemoryFunc * const malta_fpga_read[] = {
malta_fpga_readl,
malta_fpga_readl,
malta_fpga_readl
};
static CPUWriteMemoryFunc *malta_fpga_write[] = {
static CPUWriteMemoryFunc * const malta_fpga_write[] = {
malta_fpga_writel,
malta_fpga_writel,
malta_fpga_writel

4
hw/mips_r4k.c
View File

@ -56,13 +56,13 @@ static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
return 0;
}
static CPUWriteMemoryFunc *mips_qemu_write[] = {
static CPUWriteMemoryFunc * const mips_qemu_write[] = {
&mips_qemu_writel,
&mips_qemu_writel,
&mips_qemu_writel,
};
static CPUReadMemoryFunc *mips_qemu_read[] = {
static CPUReadMemoryFunc * const mips_qemu_read[] = {
&mips_qemu_readl,
&mips_qemu_readl,
&mips_qemu_readl,

4
hw/mpcore.c
View File

@ -243,13 +243,13 @@ bad_reg:
hw_error("mpcore_priv_read: Bad offset %x\n", (int)offset);
}
static CPUReadMemoryFunc *mpcore_priv_readfn[] = {
static CPUReadMemoryFunc * const mpcore_priv_readfn[] = {
mpcore_priv_read,
mpcore_priv_read,
mpcore_priv_read
};
static CPUWriteMemoryFunc *mpcore_priv_writefn[] = {
static CPUWriteMemoryFunc * const mpcore_priv_writefn[] = {
mpcore_priv_write,
mpcore_priv_write,
mpcore_priv_write

4
hw/msix.c
View File

@ -194,11 +194,11 @@ static void msix_mmio_write_unallowed(void *opaque, target_phys_addr_t addr,
fprintf(stderr, "MSI-X: only dword write is allowed!\n");
}
static CPUWriteMemoryFunc *msix_mmio_write[] = {
static CPUWriteMemoryFunc * const msix_mmio_write[] = {
msix_mmio_write_unallowed, msix_mmio_write_unallowed, msix_mmio_writel
};
static CPUReadMemoryFunc *msix_mmio_read[] = {
static CPUReadMemoryFunc * const msix_mmio_read[] = {
msix_mmio_read_unallowed, msix_mmio_read_unallowed, msix_mmio_readl
};

4
hw/mst_fpga.c
View File

@ -164,12 +164,12 @@ mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
static CPUReadMemoryFunc *mst_fpga_readfn[] = {
static CPUReadMemoryFunc * const mst_fpga_readfn[] = {
mst_fpga_readb,
mst_fpga_readb,
mst_fpga_readb,
};
static CPUWriteMemoryFunc *mst_fpga_writefn[] = {
static CPUWriteMemoryFunc * const mst_fpga_writefn[] = {
mst_fpga_writeb,
mst_fpga_writeb,
mst_fpga_writeb,

32
hw/musicpal.c
View File

@ -344,13 +344,13 @@ static void mv88w8618_eth_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *mv88w8618_eth_readfn[] = {
static CPUReadMemoryFunc * const mv88w8618_eth_readfn[] = {
mv88w8618_eth_read,
mv88w8618_eth_read,
mv88w8618_eth_read
};
static CPUWriteMemoryFunc *mv88w8618_eth_writefn[] = {
static CPUWriteMemoryFunc * const mv88w8618_eth_writefn[] = {
mv88w8618_eth_write,
mv88w8618_eth_write,
mv88w8618_eth_write
@ -532,13 +532,13 @@ static void musicpal_lcd_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *musicpal_lcd_readfn[] = {
static CPUReadMemoryFunc * const musicpal_lcd_readfn[] = {
musicpal_lcd_read,
musicpal_lcd_read,
musicpal_lcd_read
};
static CPUWriteMemoryFunc *musicpal_lcd_writefn[] = {
static CPUWriteMemoryFunc * const musicpal_lcd_writefn[] = {
musicpal_lcd_write,
musicpal_lcd_write,
musicpal_lcd_write
@ -630,13 +630,13 @@ static void mv88w8618_pic_reset(void *opaque)
s->enabled = 0;
}
static CPUReadMemoryFunc *mv88w8618_pic_readfn[] = {
static CPUReadMemoryFunc * const mv88w8618_pic_readfn[] = {
mv88w8618_pic_read,
mv88w8618_pic_read,
mv88w8618_pic_read
};
static CPUWriteMemoryFunc *mv88w8618_pic_writefn[] = {
static CPUWriteMemoryFunc * const mv88w8618_pic_writefn[] = {
mv88w8618_pic_write,
mv88w8618_pic_write,
mv88w8618_pic_write
@ -749,13 +749,13 @@ static void mv88w8618_pit_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *mv88w8618_pit_readfn[] = {
static CPUReadMemoryFunc * const mv88w8618_pit_readfn[] = {
mv88w8618_pit_read,
mv88w8618_pit_read,
mv88w8618_pit_read
};
static CPUWriteMemoryFunc *mv88w8618_pit_writefn[] = {
static CPUWriteMemoryFunc * const mv88w8618_pit_writefn[] = {
mv88w8618_pit_write,
mv88w8618_pit_write,
mv88w8618_pit_write
@ -812,13 +812,13 @@ static void mv88w8618_flashcfg_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *mv88w8618_flashcfg_readfn[] = {
static CPUReadMemoryFunc * const mv88w8618_flashcfg_readfn[] = {
mv88w8618_flashcfg_read,
mv88w8618_flashcfg_read,
mv88w8618_flashcfg_read
};
static CPUWriteMemoryFunc *mv88w8618_flashcfg_writefn[] = {
static CPUWriteMemoryFunc * const mv88w8618_flashcfg_writefn[] = {
mv88w8618_flashcfg_write,
mv88w8618_flashcfg_write,
mv88w8618_flashcfg_write
@ -856,13 +856,13 @@ static void musicpal_misc_write(void *opaque, target_phys_addr_t offset,
{
}
static CPUReadMemoryFunc *musicpal_misc_readfn[] = {
static CPUReadMemoryFunc * const musicpal_misc_readfn[] = {
musicpal_misc_read,
musicpal_misc_read,
musicpal_misc_read,
};
static CPUWriteMemoryFunc *musicpal_misc_writefn[] = {
static CPUWriteMemoryFunc * const musicpal_misc_writefn[] = {
musicpal_misc_write,
musicpal_misc_write,
musicpal_misc_write,
@ -901,13 +901,13 @@ static void mv88w8618_wlan_write(void *opaque, target_phys_addr_t offset,
{
}
static CPUReadMemoryFunc *mv88w8618_wlan_readfn[] = {
static CPUReadMemoryFunc * const mv88w8618_wlan_readfn[] = {
mv88w8618_wlan_read,
mv88w8618_wlan_read,
mv88w8618_wlan_read,
};
static CPUWriteMemoryFunc *mv88w8618_wlan_writefn[] = {
static CPUWriteMemoryFunc * const mv88w8618_wlan_writefn[] = {
mv88w8618_wlan_write,
mv88w8618_wlan_write,
mv88w8618_wlan_write,
@ -1099,13 +1099,13 @@ static void musicpal_gpio_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *musicpal_gpio_readfn[] = {
static CPUReadMemoryFunc * const musicpal_gpio_readfn[] = {
musicpal_gpio_read,
musicpal_gpio_read,
musicpal_gpio_read,
};
static CPUWriteMemoryFunc *musicpal_gpio_writefn[] = {
static CPUWriteMemoryFunc * const musicpal_gpio_writefn[] = {
musicpal_gpio_write,
musicpal_gpio_write,
musicpal_gpio_write,

18
hw/omap.h
View File

@ -1039,8 +1039,8 @@ enum {
# ifdef MEM_VERBOSE
struct io_fn {
CPUReadMemoryFunc **mem_read;
CPUWriteMemoryFunc **mem_write;
CPUReadMemoryFunc * const *mem_read;
CPUWriteMemoryFunc * const *mem_write;
void *opaque;
int in;
};
@ -1112,12 +1112,12 @@ static void io_writew(void *opaque, target_phys_addr_t addr, uint32_t value)
s->in --;
}
static CPUReadMemoryFunc *io_readfn[] = { io_readb, io_readh, io_readw, };
static CPUWriteMemoryFunc *io_writefn[] = { io_writeb, io_writeh, io_writew, };
static CPUReadMemoryFunc * const io_readfn[] = { io_readb, io_readh, io_readw, };
static CPUWriteMemoryFunc * const io_writefn[] = { io_writeb, io_writeh, io_writew, };
inline static int debug_register_io_memory(
CPUReadMemoryFunc **mem_read, CPUWriteMemoryFunc **mem_write,
void *opaque)
inline static int debug_register_io_memory(CPUReadMemoryFunc * const *mem_read,
CPUWriteMemoryFunc * const *mem_write,
void *opaque)
{
struct io_fn *s = qemu_malloc(sizeof(struct io_fn));
@ -1135,8 +1135,8 @@ inline static int debug_register_io_memory(
# ifdef L4_MUX_HACK
# undef l4_register_io_memory
int l4_register_io_memory(CPUReadMemoryFunc **mem_read,
CPUWriteMemoryFunc **mem_write, void *opaque);
int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
CPUWriteMemoryFunc * const *mem_write, void *opaque);
# endif
#endif /* hw_omap_h */

96
hw/omap1.c
View File

@ -366,13 +366,13 @@ static void omap_inth_write(void *opaque, target_phys_addr_t addr,
OMAP_BAD_REG(addr);
}
static CPUReadMemoryFunc *omap_inth_readfn[] = {
static CPUReadMemoryFunc * const omap_inth_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_inth_read,
};
static CPUWriteMemoryFunc *omap_inth_writefn[] = {
static CPUWriteMemoryFunc * const omap_inth_writefn[] = {
omap_inth_write,
omap_inth_write,
omap_inth_write,
@ -612,13 +612,13 @@ static void omap2_inth_write(void *opaque, target_phys_addr_t addr,
OMAP_BAD_REG(addr);
}
static CPUReadMemoryFunc *omap2_inth_readfn[] = {
static CPUReadMemoryFunc * const omap2_inth_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap2_inth_read,
};
static CPUWriteMemoryFunc *omap2_inth_writefn[] = {
static CPUWriteMemoryFunc * const omap2_inth_writefn[] = {
omap2_inth_write,
omap2_inth_write,
omap2_inth_write,
@ -795,13 +795,13 @@ static void omap_mpu_timer_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_mpu_timer_readfn[] = {
static CPUReadMemoryFunc * const omap_mpu_timer_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_mpu_timer_read,
};
static CPUWriteMemoryFunc *omap_mpu_timer_writefn[] = {
static CPUWriteMemoryFunc * const omap_mpu_timer_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_mpu_timer_write,
@ -913,13 +913,13 @@ static void omap_wd_timer_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_wd_timer_readfn[] = {
static CPUReadMemoryFunc * const omap_wd_timer_readfn[] = {
omap_badwidth_read16,
omap_wd_timer_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_wd_timer_writefn[] = {
static CPUWriteMemoryFunc * const omap_wd_timer_writefn[] = {
omap_badwidth_write16,
omap_wd_timer_write,
omap_badwidth_write16,
@ -1021,13 +1021,13 @@ static void omap_os_timer_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_os_timer_readfn[] = {
static CPUReadMemoryFunc * const omap_os_timer_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_os_timer_read,
};
static CPUWriteMemoryFunc *omap_os_timer_writefn[] = {
static CPUWriteMemoryFunc * const omap_os_timer_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_os_timer_write,
@ -1243,13 +1243,13 @@ static void omap_ulpd_pm_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_ulpd_pm_readfn[] = {
static CPUReadMemoryFunc * const omap_ulpd_pm_readfn[] = {
omap_badwidth_read16,
omap_ulpd_pm_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_ulpd_pm_writefn[] = {
static CPUWriteMemoryFunc * const omap_ulpd_pm_writefn[] = {
omap_badwidth_write16,
omap_ulpd_pm_write,
omap_badwidth_write16,
@ -1469,13 +1469,13 @@ static void omap_pin_cfg_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_pin_cfg_readfn[] = {
static CPUReadMemoryFunc * const omap_pin_cfg_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_pin_cfg_read,
};
static CPUWriteMemoryFunc *omap_pin_cfg_writefn[] = {
static CPUWriteMemoryFunc * const omap_pin_cfg_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_pin_cfg_write,
@ -1556,13 +1556,13 @@ static void omap_id_write(void *opaque, target_phys_addr_t addr,
OMAP_BAD_REG(addr);
}
static CPUReadMemoryFunc *omap_id_readfn[] = {
static CPUReadMemoryFunc * const omap_id_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_id_read,
};
static CPUWriteMemoryFunc *omap_id_writefn[] = {
static CPUWriteMemoryFunc * const omap_id_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_id_write,
@ -1633,13 +1633,13 @@ static void omap_mpui_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_mpui_readfn[] = {
static CPUReadMemoryFunc * const omap_mpui_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_mpui_read,
};
static CPUWriteMemoryFunc *omap_mpui_writefn[] = {
static CPUWriteMemoryFunc * const omap_mpui_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_mpui_write,
@ -1732,13 +1732,13 @@ static void omap_tipb_bridge_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_tipb_bridge_readfn[] = {
static CPUReadMemoryFunc * const omap_tipb_bridge_readfn[] = {
omap_badwidth_read16,
omap_tipb_bridge_read,
omap_tipb_bridge_read,
};
static CPUWriteMemoryFunc *omap_tipb_bridge_writefn[] = {
static CPUWriteMemoryFunc * const omap_tipb_bridge_writefn[] = {
omap_badwidth_write16,
omap_tipb_bridge_write,
omap_tipb_bridge_write,
@ -1834,13 +1834,13 @@ static void omap_tcmi_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_tcmi_readfn[] = {
static CPUReadMemoryFunc * const omap_tcmi_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_tcmi_read,
};
static CPUWriteMemoryFunc *omap_tcmi_writefn[] = {
static CPUWriteMemoryFunc * const omap_tcmi_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_tcmi_write,
@ -1920,13 +1920,13 @@ static void omap_dpll_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_dpll_readfn[] = {
static CPUReadMemoryFunc * const omap_dpll_readfn[] = {
omap_badwidth_read16,
omap_dpll_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_dpll_writefn[] = {
static CPUWriteMemoryFunc * const omap_dpll_writefn[] = {
omap_badwidth_write16,
omap_dpll_write,
omap_badwidth_write16,
@ -2069,13 +2069,13 @@ static void omap_uart_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_uart_readfn[] = {
static CPUReadMemoryFunc * const omap_uart_readfn[] = {
omap_uart_read,
omap_uart_read,
omap_badwidth_read8,
};
static CPUWriteMemoryFunc *omap_uart_writefn[] = {
static CPUWriteMemoryFunc * const omap_uart_writefn[] = {
omap_uart_write,
omap_uart_write,
omap_badwidth_write8,
@ -2381,13 +2381,13 @@ static void omap_clkm_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_clkm_readfn[] = {
static CPUReadMemoryFunc * const omap_clkm_readfn[] = {
omap_badwidth_read16,
omap_clkm_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_clkm_writefn[] = {
static CPUWriteMemoryFunc * const omap_clkm_writefn[] = {
omap_badwidth_write16,
omap_clkm_write,
omap_badwidth_write16,
@ -2464,13 +2464,13 @@ static void omap_clkdsp_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_clkdsp_readfn[] = {
static CPUReadMemoryFunc * const omap_clkdsp_readfn[] = {
omap_badwidth_read16,
omap_clkdsp_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_clkdsp_writefn[] = {
static CPUWriteMemoryFunc * const omap_clkdsp_writefn[] = {
omap_badwidth_write16,
omap_clkdsp_write,
omap_badwidth_write16,
@ -2706,13 +2706,13 @@ static void omap_mpuio_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_mpuio_readfn[] = {
static CPUReadMemoryFunc * const omap_mpuio_readfn[] = {
omap_badwidth_read16,
omap_mpuio_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_mpuio_writefn[] = {
static CPUWriteMemoryFunc * const omap_mpuio_writefn[] = {
omap_badwidth_write16,
omap_mpuio_write,
omap_badwidth_write16,
@ -2919,13 +2919,13 @@ static void omap_gpio_write(void *opaque, target_phys_addr_t addr,
}
/* *Some* sources say the memory region is 32-bit. */
static CPUReadMemoryFunc *omap_gpio_readfn[] = {
static CPUReadMemoryFunc * const omap_gpio_readfn[] = {
omap_badwidth_read16,
omap_gpio_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_gpio_writefn[] = {
static CPUWriteMemoryFunc * const omap_gpio_writefn[] = {
omap_badwidth_write16,
omap_gpio_write,
omap_badwidth_write16,
@ -3089,13 +3089,13 @@ static void omap_uwire_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_uwire_readfn[] = {
static CPUReadMemoryFunc * const omap_uwire_readfn[] = {
omap_badwidth_read16,
omap_uwire_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_uwire_writefn[] = {
static CPUWriteMemoryFunc * const omap_uwire_writefn[] = {
omap_badwidth_write16,
omap_uwire_write,
omap_badwidth_write16,
@ -3188,13 +3188,13 @@ static void omap_pwl_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_pwl_readfn[] = {
static CPUReadMemoryFunc * const omap_pwl_readfn[] = {
omap_pwl_read,
omap_badwidth_read8,
omap_badwidth_read8,
};
static CPUWriteMemoryFunc *omap_pwl_writefn[] = {
static CPUWriteMemoryFunc * const omap_pwl_writefn[] = {
omap_pwl_write,
omap_badwidth_write8,
omap_badwidth_write8,
@ -3292,13 +3292,13 @@ static void omap_pwt_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_pwt_readfn[] = {
static CPUReadMemoryFunc * const omap_pwt_readfn[] = {
omap_pwt_read,
omap_badwidth_read8,
omap_badwidth_read8,
};
static CPUWriteMemoryFunc *omap_pwt_writefn[] = {
static CPUWriteMemoryFunc * const omap_pwt_writefn[] = {
omap_pwt_write,
omap_badwidth_write8,
omap_badwidth_write8,
@ -3633,13 +3633,13 @@ static void omap_rtc_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_rtc_readfn[] = {
static CPUReadMemoryFunc * const omap_rtc_readfn[] = {
omap_rtc_read,
omap_badwidth_read8,
omap_badwidth_read8,
};
static CPUWriteMemoryFunc *omap_rtc_writefn[] = {
static CPUWriteMemoryFunc * const omap_rtc_writefn[] = {
omap_rtc_write,
omap_badwidth_write8,
omap_badwidth_write8,
@ -4216,13 +4216,13 @@ static void omap_mcbsp_writew(void *opaque, target_phys_addr_t addr,
omap_badwidth_write16(opaque, addr, value);
}
static CPUReadMemoryFunc *omap_mcbsp_readfn[] = {
static CPUReadMemoryFunc * const omap_mcbsp_readfn[] = {
omap_badwidth_read16,
omap_mcbsp_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_mcbsp_writefn[] = {
static CPUWriteMemoryFunc * const omap_mcbsp_writefn[] = {
omap_badwidth_write16,
omap_mcbsp_writeh,
omap_mcbsp_writew,
@ -4404,13 +4404,13 @@ static void omap_lpg_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_lpg_readfn[] = {
static CPUReadMemoryFunc * const omap_lpg_readfn[] = {
omap_lpg_read,
omap_badwidth_read8,
omap_badwidth_read8,
};
static CPUWriteMemoryFunc *omap_lpg_writefn[] = {
static CPUWriteMemoryFunc * const omap_lpg_writefn[] = {
omap_lpg_write,
omap_badwidth_write8,
omap_badwidth_write8,
@ -4453,13 +4453,13 @@ static uint32_t omap_mpui_io_read(void *opaque, target_phys_addr_t addr)
return 0;
}
static CPUReadMemoryFunc *omap_mpui_io_readfn[] = {
static CPUReadMemoryFunc * const omap_mpui_io_readfn[] = {
omap_badwidth_read16,
omap_mpui_io_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_mpui_io_writefn[] = {
static CPUWriteMemoryFunc * const omap_mpui_io_writefn[] = {
omap_badwidth_write16,
omap_badwidth_write16,
omap_badwidth_write16,

80
hw/omap2.c
View File

@ -343,7 +343,7 @@ static uint32_t omap_gp_timer_readh(void *opaque, target_phys_addr_t addr)
}
}
static CPUReadMemoryFunc *omap_gp_timer_readfn[] = {
static CPUReadMemoryFunc * const omap_gp_timer_readfn[] = {
omap_badwidth_read32,
omap_gp_timer_readh,
omap_gp_timer_readw,
@ -460,7 +460,7 @@ static void omap_gp_timer_writeh(void *opaque, target_phys_addr_t addr,
s->writeh = (uint16_t) value;
}
static CPUWriteMemoryFunc *omap_gp_timer_writefn[] = {
static CPUWriteMemoryFunc * const omap_gp_timer_writefn[] = {
omap_badwidth_write32,
omap_gp_timer_writeh,
omap_gp_timer_write,
@ -529,7 +529,7 @@ static uint32_t omap_synctimer_readh(void *opaque, target_phys_addr_t addr)
}
}
static CPUReadMemoryFunc *omap_synctimer_readfn[] = {
static CPUReadMemoryFunc * const omap_synctimer_readfn[] = {
omap_badwidth_read32,
omap_synctimer_readh,
omap_synctimer_readw,
@ -541,7 +541,7 @@ static void omap_synctimer_write(void *opaque, target_phys_addr_t addr,
OMAP_BAD_REG(addr);
}
static CPUWriteMemoryFunc *omap_synctimer_writefn[] = {
static CPUWriteMemoryFunc * const omap_synctimer_writefn[] = {
omap_badwidth_write32,
omap_synctimer_write,
omap_synctimer_write,
@ -927,13 +927,13 @@ static void omap_gpio_module_writep(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_gpio_module_readfn[] = {
static CPUReadMemoryFunc * const omap_gpio_module_readfn[] = {
omap_gpio_module_readp,
omap_gpio_module_readp,
omap_gpio_module_read,
};
static CPUWriteMemoryFunc *omap_gpio_module_writefn[] = {
static CPUWriteMemoryFunc * const omap_gpio_module_writefn[] = {
omap_gpio_module_writep,
omap_gpio_module_writep,
omap_gpio_module_write,
@ -1032,13 +1032,13 @@ static void omap_gpif_top_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_gpif_top_readfn[] = {
static CPUReadMemoryFunc * const omap_gpif_top_readfn[] = {
omap_gpif_top_read,
omap_gpif_top_read,
omap_gpif_top_read,
};
static CPUWriteMemoryFunc *omap_gpif_top_writefn[] = {
static CPUWriteMemoryFunc * const omap_gpif_top_writefn[] = {
omap_gpif_top_write,
omap_gpif_top_write,
omap_gpif_top_write,
@ -1356,13 +1356,13 @@ static void omap_mcspi_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_mcspi_readfn[] = {
static CPUReadMemoryFunc * const omap_mcspi_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_mcspi_read,
};
static CPUWriteMemoryFunc *omap_mcspi_writefn[] = {
static CPUWriteMemoryFunc * const omap_mcspi_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_mcspi_write,
@ -1947,13 +1947,13 @@ static void omap_eac_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_eac_readfn[] = {
static CPUReadMemoryFunc * const omap_eac_readfn[] = {
omap_badwidth_read16,
omap_eac_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_eac_writefn[] = {
static CPUWriteMemoryFunc * const omap_eac_writefn[] = {
omap_badwidth_write16,
omap_eac_write,
omap_badwidth_write16,
@ -2096,13 +2096,13 @@ static void omap_sti_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_sti_readfn[] = {
static CPUReadMemoryFunc * const omap_sti_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_sti_read,
};
static CPUWriteMemoryFunc *omap_sti_writefn[] = {
static CPUWriteMemoryFunc * const omap_sti_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_sti_write,
@ -2134,13 +2134,13 @@ static void omap_sti_fifo_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_sti_fifo_readfn[] = {
static CPUReadMemoryFunc * const omap_sti_fifo_readfn[] = {
omap_sti_fifo_read,
omap_badwidth_read8,
omap_badwidth_read8,
};
static CPUWriteMemoryFunc *omap_sti_fifo_writefn[] = {
static CPUWriteMemoryFunc * const omap_sti_fifo_writefn[] = {
omap_sti_fifo_write,
omap_badwidth_write8,
omap_badwidth_write8,
@ -2191,20 +2191,20 @@ struct omap_l4_s {
static int omap_l4_io_entries;
static int omap_cpu_io_entry;
static struct omap_l4_entry {
CPUReadMemoryFunc **mem_read;
CPUWriteMemoryFunc **mem_write;
CPUReadMemoryFunc * const *mem_read;
CPUWriteMemoryFunc * const *mem_write;
void *opaque;
} *omap_l4_io_entry;
static CPUReadMemoryFunc **omap_l4_io_readb_fn;
static CPUReadMemoryFunc **omap_l4_io_readh_fn;
static CPUReadMemoryFunc **omap_l4_io_readw_fn;
static CPUWriteMemoryFunc **omap_l4_io_writeb_fn;
static CPUWriteMemoryFunc **omap_l4_io_writeh_fn;
static CPUWriteMemoryFunc **omap_l4_io_writew_fn;
static CPUReadMemoryFunc * const *omap_l4_io_readb_fn;
static CPUReadMemoryFunc * const *omap_l4_io_readh_fn;
static CPUReadMemoryFunc * const *omap_l4_io_readw_fn;
static CPUWriteMemoryFunc * const *omap_l4_io_writeb_fn;
static CPUWriteMemoryFunc * const *omap_l4_io_writeh_fn;
static CPUWriteMemoryFunc * const *omap_l4_io_writew_fn;
static void **omap_l4_io_opaque;
int l4_register_io_memory(CPUReadMemoryFunc **mem_read,
CPUWriteMemoryFunc **mem_write, void *opaque)
int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
CPUWriteMemoryFunc * const *mem_write, void *opaque)
{
omap_l4_io_entry[omap_l4_io_entries].mem_read = mem_read;
omap_l4_io_entry[omap_l4_io_entries].mem_write = mem_write;
@ -2258,13 +2258,13 @@ static void omap_l4_io_writew(void *opaque, target_phys_addr_t addr,
return omap_l4_io_writew_fn[i](omap_l4_io_opaque[i], addr, value);
}
static CPUReadMemoryFunc *omap_l4_io_readfn[] = {
static CPUReadMemoryFunc * const omap_l4_io_readfn[] = {
omap_l4_io_readb,
omap_l4_io_readh,
omap_l4_io_readw,
};
static CPUWriteMemoryFunc *omap_l4_io_writefn[] = {
static CPUWriteMemoryFunc * const omap_l4_io_writefn[] = {
omap_l4_io_writeb,
omap_l4_io_writeh,
omap_l4_io_writew,
@ -2340,13 +2340,13 @@ static void omap_l4ta_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_l4ta_readfn[] = {
static CPUReadMemoryFunc * const omap_l4ta_readfn[] = {
omap_badwidth_read16,
omap_l4ta_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_l4ta_writefn[] = {
static CPUWriteMemoryFunc * const omap_l4ta_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_l4ta_write,
@ -2692,13 +2692,13 @@ static void omap_tap_write(void *opaque, target_phys_addr_t addr,
OMAP_BAD_REG(addr);
}
static CPUReadMemoryFunc *omap_tap_readfn[] = {
static CPUReadMemoryFunc * const omap_tap_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_tap_read,
};
static CPUWriteMemoryFunc *omap_tap_writefn[] = {
static CPUWriteMemoryFunc * const omap_tap_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_tap_write,
@ -3414,13 +3414,13 @@ static void omap_prcm_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_prcm_readfn[] = {
static CPUReadMemoryFunc * const omap_prcm_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_prcm_read,
};
static CPUWriteMemoryFunc *omap_prcm_writefn[] = {
static CPUWriteMemoryFunc * const omap_prcm_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_prcm_write,
@ -3784,13 +3784,13 @@ static void omap_sysctl_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_sysctl_readfn[] = {
static CPUReadMemoryFunc * const omap_sysctl_readfn[] = {
omap_sysctl_read8,
omap_badwidth_read32, /* TODO */
omap_sysctl_read,
};
static CPUWriteMemoryFunc *omap_sysctl_writefn[] = {
static CPUWriteMemoryFunc * const omap_sysctl_writefn[] = {
omap_sysctl_write8,
omap_badwidth_write32, /* TODO */
omap_sysctl_write,
@ -4014,13 +4014,13 @@ static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_sdrc_readfn[] = {
static CPUReadMemoryFunc * const omap_sdrc_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_sdrc_read,
};
static CPUWriteMemoryFunc *omap_sdrc_writefn[] = {
static CPUWriteMemoryFunc * const omap_sdrc_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_sdrc_write,
@ -4388,13 +4388,13 @@ static void omap_gpmc_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_gpmc_readfn[] = {
static CPUReadMemoryFunc * const omap_gpmc_readfn[] = {
omap_badwidth_read32, /* TODO */
omap_badwidth_read32, /* TODO */
omap_gpmc_read,
};
static CPUWriteMemoryFunc *omap_gpmc_writefn[] = {
static CPUWriteMemoryFunc * const omap_gpmc_writefn[] = {
omap_badwidth_write32, /* TODO */
omap_badwidth_write32, /* TODO */
omap_gpmc_write,

8
hw/omap_dma.c
View File

@ -1526,13 +1526,13 @@ static void omap_dma_write(void *opaque, target_phys_addr_t addr,
OMAP_BAD_REG(addr);
}
static CPUReadMemoryFunc *omap_dma_readfn[] = {
static CPUReadMemoryFunc * const omap_dma_readfn[] = {
omap_badwidth_read16,
omap_dma_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_dma_writefn[] = {
static CPUWriteMemoryFunc * const omap_dma_writefn[] = {
omap_badwidth_write16,
omap_dma_write,
omap_badwidth_write16,
@ -2017,13 +2017,13 @@ static void omap_dma4_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_dma4_readfn[] = {
static CPUReadMemoryFunc * const omap_dma4_readfn[] = {
omap_badwidth_read16,
omap_dma4_read,
omap_dma4_read,
};
static CPUWriteMemoryFunc *omap_dma4_writefn[] = {
static CPUWriteMemoryFunc * const omap_dma4_writefn[] = {
omap_badwidth_write16,
omap_dma4_write,
omap_dma4_write,

20
hw/omap_dss.c
View File

@ -230,13 +230,13 @@ static void omap_diss_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_diss1_readfn[] = {
static CPUReadMemoryFunc * const omap_diss1_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_diss_read,
};
static CPUWriteMemoryFunc *omap_diss1_writefn[] = {
static CPUWriteMemoryFunc * const omap_diss1_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_diss_write,
@ -569,13 +569,13 @@ static void omap_disc_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_disc1_readfn[] = {
static CPUReadMemoryFunc * const omap_disc1_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_disc_read,
};
static CPUWriteMemoryFunc *omap_disc1_writefn[] = {
static CPUWriteMemoryFunc * const omap_disc1_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_disc_write,
@ -841,13 +841,13 @@ static void omap_rfbi_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_rfbi1_readfn[] = {
static CPUReadMemoryFunc * const omap_rfbi1_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_rfbi_read,
};
static CPUWriteMemoryFunc *omap_rfbi1_writefn[] = {
static CPUWriteMemoryFunc * const omap_rfbi1_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_rfbi_write,
@ -960,13 +960,13 @@ static void omap_venc_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_venc1_readfn[] = {
static CPUReadMemoryFunc * const omap_venc1_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_venc_read,
};
static CPUWriteMemoryFunc *omap_venc1_writefn[] = {
static CPUWriteMemoryFunc * const omap_venc1_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_venc_write,
@ -1010,13 +1010,13 @@ static void omap_im3_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_im3_readfn[] = {
static CPUReadMemoryFunc * const omap_im3_readfn[] = {
omap_badwidth_read32,
omap_badwidth_read32,
omap_im3_read,
};
static CPUWriteMemoryFunc *omap_im3_writefn[] = {
static CPUWriteMemoryFunc * const omap_im3_writefn[] = {
omap_badwidth_write32,
omap_badwidth_write32,
omap_im3_write,

4
hw/omap_i2c.c
View File

@ -408,13 +408,13 @@ static void omap_i2c_writeb(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_i2c_readfn[] = {
static CPUReadMemoryFunc * const omap_i2c_readfn[] = {
omap_badwidth_read16,
omap_i2c_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_i2c_writefn[] = {
static CPUWriteMemoryFunc * const omap_i2c_writefn[] = {
omap_i2c_writeb, /* Only the last fifo write can be 8 bit. */
omap_i2c_write,
omap_badwidth_write16,

4
hw/omap_lcdc.c
View File

@ -401,13 +401,13 @@ static void omap_lcdc_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *omap_lcdc_readfn[] = {
static CPUReadMemoryFunc * const omap_lcdc_readfn[] = {
omap_lcdc_read,
omap_lcdc_read,
omap_lcdc_read,
};
static CPUWriteMemoryFunc *omap_lcdc_writefn[] = {
static CPUWriteMemoryFunc * const omap_lcdc_writefn[] = {
omap_lcdc_write,
omap_lcdc_write,
omap_lcdc_write,

4
hw/omap_mmc.c
View File

@ -540,13 +540,13 @@ static void omap_mmc_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *omap_mmc_readfn[] = {
static CPUReadMemoryFunc * const omap_mmc_readfn[] = {
omap_badwidth_read16,
omap_mmc_read,
omap_badwidth_read16,
};
static CPUWriteMemoryFunc *omap_mmc_writefn[] = {
static CPUWriteMemoryFunc * const omap_mmc_writefn[] = {
omap_badwidth_write16,
omap_mmc_write,
omap_badwidth_write16,

4
hw/omap_sx1.c
View File

@ -88,13 +88,13 @@ static void static_write(void *opaque, target_phys_addr_t offset,
#endif
}
static CPUReadMemoryFunc *static_readfn[] = {
static CPUReadMemoryFunc * const static_readfn[] = {
static_readb,
static_readh,
static_readw,
};
static CPUWriteMemoryFunc *static_writefn[] = {
static CPUWriteMemoryFunc * const static_writefn[] = {
static_write,
static_write,
static_write,

4
hw/onenand.c
View File

@ -603,13 +603,13 @@ static void onenand_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *onenand_readfn[] = {
static CPUReadMemoryFunc * const onenand_readfn[] = {
onenand_read, /* TODO */
onenand_read,
onenand_read,
};
static CPUWriteMemoryFunc *onenand_writefn[] = {
static CPUWriteMemoryFunc * const onenand_writefn[] = {
onenand_write, /* TODO */
onenand_write,
onenand_write,

36
hw/openpic.c
View File

@ -1013,13 +1013,13 @@ static uint32_t openpic_readl (void *opaque,target_phys_addr_t addr)
return retval;
}
static CPUWriteMemoryFunc *openpic_write[] = {
static CPUWriteMemoryFunc * const openpic_write[] = {
&openpic_buggy_write,
&openpic_buggy_write,
&openpic_writel,
};
static CPUReadMemoryFunc *openpic_read[] = {
static CPUReadMemoryFunc * const openpic_read[] = {
&openpic_buggy_read,
&openpic_buggy_read,
&openpic_readl,
@ -1574,84 +1574,84 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr)
return retval;
}
static CPUWriteMemoryFunc *mpic_glb_write[] = {
static CPUWriteMemoryFunc * const mpic_glb_write[] = {
&openpic_buggy_write,
&openpic_buggy_write,
&openpic_gbl_write,
};
static CPUReadMemoryFunc *mpic_glb_read[] = {
static CPUReadMemoryFunc * const mpic_glb_read[] = {
&openpic_buggy_read,
&openpic_buggy_read,
&openpic_gbl_read,
};
static CPUWriteMemoryFunc *mpic_tmr_write[] = {
static CPUWriteMemoryFunc * const mpic_tmr_write[] = {
&openpic_buggy_write,
&openpic_buggy_write,
&mpic_timer_write,
};
static CPUReadMemoryFunc *mpic_tmr_read[] = {
static CPUReadMemoryFunc * const mpic_tmr_read[] = {
&openpic_buggy_read,
&openpic_buggy_read,
&mpic_timer_read,
};
static CPUWriteMemoryFunc *mpic_cpu_write[] = {
static CPUWriteMemoryFunc * const mpic_cpu_write[] = {
&openpic_buggy_write,
&openpic_buggy_write,
&openpic_cpu_write,
};
static CPUReadMemoryFunc *mpic_cpu_read[] = {
static CPUReadMemoryFunc * const mpic_cpu_read[] = {
&openpic_buggy_read,
&openpic_buggy_read,
&openpic_cpu_read,
};
static CPUWriteMemoryFunc *mpic_ext_write[] = {
static CPUWriteMemoryFunc * const mpic_ext_write[] = {
&openpic_buggy_write,
&openpic_buggy_write,
&mpic_src_ext_write,
};
static CPUReadMemoryFunc *mpic_ext_read[] = {
static CPUReadMemoryFunc * const mpic_ext_read[] = {
&openpic_buggy_read,
&openpic_buggy_read,
&mpic_src_ext_read,
};
static CPUWriteMemoryFunc *mpic_int_write[] = {
static CPUWriteMemoryFunc * const mpic_int_write[] = {
&openpic_buggy_write,
&openpic_buggy_write,
&mpic_src_int_write,
};
static CPUReadMemoryFunc *mpic_int_read[] = {
static CPUReadMemoryFunc * const mpic_int_read[] = {
&openpic_buggy_read,
&openpic_buggy_read,
&mpic_src_int_read,
};
static CPUWriteMemoryFunc *mpic_msg_write[] = {
static CPUWriteMemoryFunc * const mpic_msg_write[] = {
&openpic_buggy_write,
&openpic_buggy_write,
&mpic_src_msg_write,
};
static CPUReadMemoryFunc *mpic_msg_read[] = {
static CPUReadMemoryFunc * const mpic_msg_read[] = {
&openpic_buggy_read,
&openpic_buggy_read,
&mpic_src_msg_read,
};
static CPUWriteMemoryFunc *mpic_msi_write[] = {
static CPUWriteMemoryFunc * const mpic_msi_write[] = {
&openpic_buggy_write,
&openpic_buggy_write,
&mpic_src_msi_write,
};
static CPUReadMemoryFunc *mpic_msi_read[] = {
static CPUReadMemoryFunc * const mpic_msi_read[] = {
&openpic_buggy_read,
&openpic_buggy_read,
&mpic_src_msi_read,
@ -1663,8 +1663,8 @@ qemu_irq *mpic_init (target_phys_addr_t base, int nb_cpus,
openpic_t *mpp;
int i;
struct {
CPUReadMemoryFunc **read;
CPUWriteMemoryFunc **write;
CPUReadMemoryFunc * const *read;
CPUWriteMemoryFunc * const *write;
target_phys_addr_t start_addr;
ram_addr_t size;
} const list[] = {

4
hw/palm.c
View File

@ -52,13 +52,13 @@ static void static_write(void *opaque, target_phys_addr_t offset,
#endif
}
static CPUReadMemoryFunc *static_readfn[] = {
static CPUReadMemoryFunc * const static_readfn[] = {
static_readb,
static_readh,
static_readw,
};
static CPUWriteMemoryFunc *static_writefn[] = {
static CPUWriteMemoryFunc * const static_writefn[] = {
static_write,
static_write,
static_write,

4
hw/parallel.c
View File

@ -518,13 +518,13 @@ static void parallel_mm_writel (void *opaque,
parallel_ioport_write_sw(s, addr >> s->it_shift, value);
}
static CPUReadMemoryFunc *parallel_mm_read_sw[] = {
static CPUReadMemoryFunc * const parallel_mm_read_sw[] = {
&parallel_mm_readb,
&parallel_mm_readw,
&parallel_mm_readl,
};
static CPUWriteMemoryFunc *parallel_mm_write_sw[] = {
static CPUWriteMemoryFunc * const parallel_mm_write_sw[] = {
&parallel_mm_writeb,
&parallel_mm_writew,
&parallel_mm_writel,

4
hw/pckbd.c
View File

@ -405,13 +405,13 @@ static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value
kbd_write_data(s, 0, value & 0xff);
}
static CPUReadMemoryFunc *kbd_mm_read[] = {
static CPUReadMemoryFunc * const kbd_mm_read[] = {
&kbd_mm_readb,
&kbd_mm_readb,
&kbd_mm_readb,
};
static CPUWriteMemoryFunc *kbd_mm_write[] = {
static CPUWriteMemoryFunc * const kbd_mm_write[] = {
&kbd_mm_writeb,
&kbd_mm_writeb,
&kbd_mm_writeb,

20
hw/pcnet.c
View File

@ -1963,16 +1963,16 @@ static void pcnet_common_init(DeviceState *dev, PCNetState *s,
/* PCI interface */
static CPUWriteMemoryFunc *pcnet_mmio_write[] = {
(CPUWriteMemoryFunc *)&pcnet_mmio_writeb,
(CPUWriteMemoryFunc *)&pcnet_mmio_writew,
(CPUWriteMemoryFunc *)&pcnet_mmio_writel
static CPUWriteMemoryFunc * const pcnet_mmio_write[] = {
(CPUWriteMemoryFunc * const )&pcnet_mmio_writeb,
(CPUWriteMemoryFunc * const )&pcnet_mmio_writew,
(CPUWriteMemoryFunc * const )&pcnet_mmio_writel
};
static CPUReadMemoryFunc *pcnet_mmio_read[] = {
(CPUReadMemoryFunc *)&pcnet_mmio_readb,
(CPUReadMemoryFunc *)&pcnet_mmio_readw,
(CPUReadMemoryFunc *)&pcnet_mmio_readl
static CPUReadMemoryFunc * const pcnet_mmio_read[] = {
(CPUReadMemoryFunc * const )&pcnet_mmio_readb,
(CPUReadMemoryFunc * const )&pcnet_mmio_readw,
(CPUReadMemoryFunc * const )&pcnet_mmio_readl
};
static void pcnet_mmio_map(PCIDevice *pci_dev, int region_num,
@ -2101,13 +2101,13 @@ static uint32_t lance_mem_readw(void *opaque, target_phys_addr_t addr)
return val & 0xffff;
}
static CPUReadMemoryFunc *lance_mem_read[3] = {
static CPUReadMemoryFunc * const lance_mem_read[3] = {
NULL,
lance_mem_readw,
NULL,
};
static CPUWriteMemoryFunc *lance_mem_write[3] = {
static CPUWriteMemoryFunc * const lance_mem_write[3] = {
NULL,
lance_mem_writew,
NULL,

4
hw/pflash_cfi01.c
View File

@ -453,13 +453,13 @@ static void pflash_writel (void *opaque, target_phys_addr_t addr,
pflash_write(pfl, addr, value, 4);
}
static CPUWriteMemoryFunc *pflash_write_ops[] = {
static CPUWriteMemoryFunc * const pflash_write_ops[] = {
&pflash_writeb,
&pflash_writew,
&pflash_writel,
};
static CPUReadMemoryFunc *pflash_read_ops[] = {
static CPUReadMemoryFunc * const pflash_read_ops[] = {
&pflash_readb,
&pflash_readw,
&pflash_readl,

4
hw/pflash_cfi02.c
View File

@ -492,13 +492,13 @@ static void pflash_writel (void *opaque, target_phys_addr_t addr,
pflash_write(pfl, addr, value, 4);
}
static CPUWriteMemoryFunc *pflash_write_ops[] = {
static CPUWriteMemoryFunc * const pflash_write_ops[] = {
&pflash_writeb,
&pflash_writew,
&pflash_writel,
};
static CPUReadMemoryFunc *pflash_read_ops[] = {
static CPUReadMemoryFunc * const pflash_read_ops[] = {
&pflash_readb,
&pflash_readw,
&pflash_readl,

4
hw/pl011.c
View File

@ -223,13 +223,13 @@ static void pl011_event(void *opaque, int event)
pl011_put_fifo(opaque, 0x400);
}
static CPUReadMemoryFunc *pl011_readfn[] = {
static CPUReadMemoryFunc * const pl011_readfn[] = {
pl011_read,
pl011_read,
pl011_read
};
static CPUWriteMemoryFunc *pl011_writefn[] = {
static CPUWriteMemoryFunc * const pl011_writefn[] = {
pl011_write,
pl011_write,
pl011_write

4
hw/pl022.c
View File

@ -227,13 +227,13 @@ static void pl022_reset(pl022_state *s)
s->sr = PL022_SR_TFE | PL022_SR_TNF;
}
static CPUReadMemoryFunc *pl022_readfn[] = {
static CPUReadMemoryFunc * const pl022_readfn[] = {
pl022_read,
pl022_read,
pl022_read
};
static CPUWriteMemoryFunc *pl022_writefn[] = {
static CPUWriteMemoryFunc * const pl022_writefn[] = {
pl022_write,
pl022_write,
pl022_write

4
hw/pl031.c
View File

@ -171,13 +171,13 @@ static void pl031_write(void * opaque, target_phys_addr_t offset,
}
}
static CPUWriteMemoryFunc * pl031_writefn[] = {
static CPUWriteMemoryFunc * const pl031_writefn[] = {
pl031_write,
pl031_write,
pl031_write
};
static CPUReadMemoryFunc * pl031_readfn[] = {
static CPUReadMemoryFunc * const pl031_readfn[] = {
pl031_read,
pl031_read,
pl031_read

4
hw/pl050.c
View File

@ -110,13 +110,13 @@ static void pl050_write(void *opaque, target_phys_addr_t offset,
hw_error("pl050_write: Bad offset %x\n", (int)offset);
}
}
static CPUReadMemoryFunc *pl050_readfn[] = {
static CPUReadMemoryFunc * const pl050_readfn[] = {
pl050_read,
pl050_read,
pl050_read
};
static CPUWriteMemoryFunc *pl050_writefn[] = {
static CPUWriteMemoryFunc * const pl050_writefn[] = {
pl050_write,
pl050_write,
pl050_write

4
hw/pl061.c
View File

@ -223,13 +223,13 @@ static void pl061_set_irq(void * opaque, int irq, int level)
}
}
static CPUReadMemoryFunc *pl061_readfn[] = {
static CPUReadMemoryFunc * const pl061_readfn[] = {
pl061_read,
pl061_read,
pl061_read
};
static CPUWriteMemoryFunc *pl061_writefn[] = {
static CPUWriteMemoryFunc * const pl061_writefn[] = {
pl061_write,
pl061_write,
pl061_write

4
hw/pl080.c
View File

@ -307,13 +307,13 @@ static void pl080_write(void *opaque, target_phys_addr_t offset,
pl080_update(s);
}
static CPUReadMemoryFunc *pl080_readfn[] = {
static CPUReadMemoryFunc * const pl080_readfn[] = {
pl080_read,
pl080_read,
pl080_read
};
static CPUWriteMemoryFunc *pl080_writefn[] = {
static CPUWriteMemoryFunc * const pl080_writefn[] = {
pl080_write,
pl080_write,
pl080_write

4
hw/pl110.c
View File

@ -340,13 +340,13 @@ static void pl110_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *pl110_readfn[] = {
static CPUReadMemoryFunc * const pl110_readfn[] = {
pl110_read,
pl110_read,
pl110_read
};
static CPUWriteMemoryFunc *pl110_writefn[] = {
static CPUWriteMemoryFunc * const pl110_writefn[] = {
pl110_write,
pl110_write,
pl110_write

4
hw/pl181.c
View File

@ -409,13 +409,13 @@ static void pl181_write(void *opaque, target_phys_addr_t offset,
pl181_update(s);
}
static CPUReadMemoryFunc *pl181_readfn[] = {
static CPUReadMemoryFunc * const pl181_readfn[] = {
pl181_read,
pl181_read,
pl181_read
};
static CPUWriteMemoryFunc *pl181_writefn[] = {
static CPUWriteMemoryFunc * const pl181_writefn[] = {
pl181_write,
pl181_write,
pl181_write

4
hw/pl190.c
View File

@ -200,13 +200,13 @@ static void pl190_write(void *opaque, target_phys_addr_t offset, uint32_t val)
pl190_update(s);
}
static CPUReadMemoryFunc *pl190_readfn[] = {
static CPUReadMemoryFunc * const pl190_readfn[] = {
pl190_read,
pl190_read,
pl190_read
};
static CPUWriteMemoryFunc *pl190_writefn[] = {
static CPUWriteMemoryFunc * const pl190_writefn[] = {
pl190_write,
pl190_write,
pl190_write

4
hw/ppc.h
View File

@ -26,8 +26,8 @@ void ppc40x_chip_reset (CPUState *env);
void ppc40x_system_reset (CPUState *env);
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
extern CPUWriteMemoryFunc *PPC_io_write[];
extern CPUReadMemoryFunc *PPC_io_read[];
extern CPUWriteMemoryFunc * const PPC_io_write[];
extern CPUReadMemoryFunc * const PPC_io_read[];
void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
void ppc40x_irq_init (CPUState *env);

8
hw/ppc405_boards.c
View File

@ -134,13 +134,13 @@ static void ref405ep_fpga_writel (void *opaque,
ref405ep_fpga_writeb(opaque, addr + 3, value & 0xFF);
}
static CPUReadMemoryFunc *ref405ep_fpga_read[] = {
static CPUReadMemoryFunc * const ref405ep_fpga_read[] = {
&ref405ep_fpga_readb,
&ref405ep_fpga_readw,
&ref405ep_fpga_readl,
};
static CPUWriteMemoryFunc *ref405ep_fpga_write[] = {
static CPUWriteMemoryFunc * const ref405ep_fpga_write[] = {
&ref405ep_fpga_writeb,
&ref405ep_fpga_writew,
&ref405ep_fpga_writel,
@ -458,13 +458,13 @@ static void taihu_cpld_writel (void *opaque,
taihu_cpld_writeb(opaque, addr + 3, value & 0xFF);
}
static CPUReadMemoryFunc *taihu_cpld_read[] = {
static CPUReadMemoryFunc * const taihu_cpld_read[] = {
&taihu_cpld_readb,
&taihu_cpld_readw,
&taihu_cpld_readl,
};
static CPUWriteMemoryFunc *taihu_cpld_write[] = {
static CPUWriteMemoryFunc * const taihu_cpld_write[] = {
&taihu_cpld_writeb,
&taihu_cpld_writew,
&taihu_cpld_writel,

16
hw/ppc405_uc.c
View File

@ -355,13 +355,13 @@ static void opba_writel (void *opaque,
opba_writeb(opaque, addr + 1, value >> 16);
}
static CPUReadMemoryFunc *opba_read[] = {
static CPUReadMemoryFunc * const opba_read[] = {
&opba_readb,
&opba_readw,
&opba_readl,
};
static CPUWriteMemoryFunc *opba_write[] = {
static CPUWriteMemoryFunc * const opba_write[] = {
&opba_writeb,
&opba_writew,
&opba_writel,
@ -813,13 +813,13 @@ static void ppc405_gpio_writel (void *opaque,
#endif
}
static CPUReadMemoryFunc *ppc405_gpio_read[] = {
static CPUReadMemoryFunc * const ppc405_gpio_read[] = {
&ppc405_gpio_readb,
&ppc405_gpio_readw,
&ppc405_gpio_readl,
};
static CPUWriteMemoryFunc *ppc405_gpio_write[] = {
static CPUWriteMemoryFunc * const ppc405_gpio_write[] = {
&ppc405_gpio_writeb,
&ppc405_gpio_writew,
&ppc405_gpio_writel,
@ -1214,13 +1214,13 @@ static void ppc4xx_i2c_writel (void *opaque,
ppc4xx_i2c_writeb(opaque, addr + 3, value);
}
static CPUReadMemoryFunc *i2c_read[] = {
static CPUReadMemoryFunc * const i2c_read[] = {
&ppc4xx_i2c_readb,
&ppc4xx_i2c_readw,
&ppc4xx_i2c_readl,
};
static CPUWriteMemoryFunc *i2c_write[] = {
static CPUWriteMemoryFunc * const i2c_write[] = {
&ppc4xx_i2c_writeb,
&ppc4xx_i2c_writew,
&ppc4xx_i2c_writel,
@ -1482,13 +1482,13 @@ static void ppc4xx_gpt_writel (void *opaque,
}
}
static CPUReadMemoryFunc *gpt_read[] = {
static CPUReadMemoryFunc * const gpt_read[] = {
&ppc4xx_gpt_readb,
&ppc4xx_gpt_readw,
&ppc4xx_gpt_readl,
};
static CPUWriteMemoryFunc *gpt_write[] = {
static CPUWriteMemoryFunc * const gpt_write[] = {
&ppc4xx_gpt_writeb,
&ppc4xx_gpt_writew,
&ppc4xx_gpt_writel,

12
hw/ppc4xx_pci.c
View File

@ -93,7 +93,7 @@ static uint32_t pci4xx_cfgaddr_readl(void *opaque, target_phys_addr_t addr)
return ppc4xx_pci->pci_state.config_reg;
}
static CPUReadMemoryFunc *pci4xx_cfgaddr_read[] = {
static CPUReadMemoryFunc * const pci4xx_cfgaddr_read[] = {
&pci4xx_cfgaddr_readl,
&pci4xx_cfgaddr_readl,
&pci4xx_cfgaddr_readl,
@ -111,19 +111,19 @@ static void pci4xx_cfgaddr_writel(void *opaque, target_phys_addr_t addr,
ppc4xx_pci->pci_state.config_reg = value & ~0x3;
}
static CPUWriteMemoryFunc *pci4xx_cfgaddr_write[] = {
static CPUWriteMemoryFunc * const pci4xx_cfgaddr_write[] = {
&pci4xx_cfgaddr_writel,
&pci4xx_cfgaddr_writel,
&pci4xx_cfgaddr_writel,
};
static CPUReadMemoryFunc *pci4xx_cfgdata_read[] = {
static CPUReadMemoryFunc * const pci4xx_cfgdata_read[] = {
&pci_host_data_readb,
&pci_host_data_readw,
&pci_host_data_readl,
};
static CPUWriteMemoryFunc *pci4xx_cfgdata_write[] = {
static CPUWriteMemoryFunc * const pci4xx_cfgdata_write[] = {
&pci_host_data_writeb,
&pci_host_data_writew,
&pci_host_data_writel,
@ -272,13 +272,13 @@ static uint32_t ppc4xx_pci_reg_read4(void *opaque, target_phys_addr_t offset)
return value;
}
static CPUReadMemoryFunc *pci_reg_read[] = {
static CPUReadMemoryFunc * const pci_reg_read[] = {
&ppc4xx_pci_reg_read4,
&ppc4xx_pci_reg_read4,
&ppc4xx_pci_reg_read4,
};
static CPUWriteMemoryFunc *pci_reg_write[] = {
static CPUWriteMemoryFunc * const pci_reg_write[] = {
&ppc4xx_pci_reg_write4,
&ppc4xx_pci_reg_write4,
&ppc4xx_pci_reg_write4,

4
hw/ppc_newworld.c
View File

@ -66,13 +66,13 @@ static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
return value;
}
static CPUWriteMemoryFunc *unin_write[] = {
static CPUWriteMemoryFunc * const unin_write[] = {
&unin_writel,
&unin_writel,
&unin_writel,
};
static CPUReadMemoryFunc *unin_read[] = {
static CPUReadMemoryFunc * const unin_read[] = {
&unin_readl,
&unin_readl,
&unin_readl,

12
hw/ppc_prep.c
View File

@ -155,13 +155,13 @@ static uint32_t PPC_intack_readl (void *opaque, target_phys_addr_t addr)
#endif
}
static CPUWriteMemoryFunc *PPC_intack_write[] = {
static CPUWriteMemoryFunc * const PPC_intack_write[] = {
&_PPC_intack_write,
&_PPC_intack_write,
&_PPC_intack_write,
};
static CPUReadMemoryFunc *PPC_intack_read[] = {
static CPUReadMemoryFunc * const PPC_intack_read[] = {
&PPC_intack_readb,
&PPC_intack_readw,
&PPC_intack_readl,
@ -257,13 +257,13 @@ static uint32_t PPC_XCSR_readl (void *opaque, target_phys_addr_t addr)
return retval;
}
static CPUWriteMemoryFunc *PPC_XCSR_write[] = {
static CPUWriteMemoryFunc * const PPC_XCSR_write[] = {
&PPC_XCSR_writeb,
&PPC_XCSR_writew,
&PPC_XCSR_writel,
};
static CPUReadMemoryFunc *PPC_XCSR_read[] = {
static CPUReadMemoryFunc * const PPC_XCSR_read[] = {
&PPC_XCSR_readb,
&PPC_XCSR_readw,
&PPC_XCSR_readl,
@ -528,13 +528,13 @@ static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
return ret;
}
static CPUWriteMemoryFunc *PPC_prep_io_write[] = {
static CPUWriteMemoryFunc * const PPC_prep_io_write[] = {
&PPC_prep_io_writeb,
&PPC_prep_io_writew,
&PPC_prep_io_writel,
};
static CPUReadMemoryFunc *PPC_prep_io_read[] = {
static CPUReadMemoryFunc * const PPC_prep_io_read[] = {
&PPC_prep_io_readb,
&PPC_prep_io_readw,
&PPC_prep_io_readl,

12
hw/ppce500_pci.c
View File

@ -94,7 +94,7 @@ static uint32_t pcie500_cfgaddr_readl(void *opaque, target_phys_addr_t addr)
return pci->pci_state.config_reg;
}
static CPUReadMemoryFunc *pcie500_cfgaddr_read[] = {
static CPUReadMemoryFunc * const pcie500_cfgaddr_read[] = {
&pcie500_cfgaddr_readl,
&pcie500_cfgaddr_readl,
&pcie500_cfgaddr_readl,
@ -110,19 +110,19 @@ static void pcie500_cfgaddr_writel(void *opaque, target_phys_addr_t addr,
controller->pci_state.config_reg = value & ~0x3;
}
static CPUWriteMemoryFunc *pcie500_cfgaddr_write[] = {
static CPUWriteMemoryFunc * const pcie500_cfgaddr_write[] = {
&pcie500_cfgaddr_writel,
&pcie500_cfgaddr_writel,
&pcie500_cfgaddr_writel,
};
static CPUReadMemoryFunc *pcie500_cfgdata_read[] = {
static CPUReadMemoryFunc * const pcie500_cfgdata_read[] = {
&pci_host_data_readb,
&pci_host_data_readw,
&pci_host_data_readl,
};
static CPUWriteMemoryFunc *pcie500_cfgdata_write[] = {
static CPUWriteMemoryFunc * const pcie500_cfgdata_write[] = {
&pci_host_data_writeb,
&pci_host_data_writew,
&pci_host_data_writel,
@ -175,7 +175,7 @@ static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr)
return value;
}
static CPUReadMemoryFunc *e500_pci_reg_read[] = {
static CPUReadMemoryFunc * const e500_pci_reg_read[] = {
&pci_reg_read4,
&pci_reg_read4,
&pci_reg_read4,
@ -227,7 +227,7 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
};
}
static CPUWriteMemoryFunc *e500_pci_reg_write[] = {
static CPUWriteMemoryFunc * const e500_pci_reg_write[] = {
&pci_reg_write4,
&pci_reg_write4,
&pci_reg_write4,

4
hw/prep_pci.c
View File

@ -107,13 +107,13 @@ static uint32_t PPC_PCIIO_readl (void *opaque, target_phys_addr_t addr)
return val;
}
static CPUWriteMemoryFunc *PPC_PCIIO_write[] = {
static CPUWriteMemoryFunc * const PPC_PCIIO_write[] = {
&PPC_PCIIO_writeb,
&PPC_PCIIO_writew,
&PPC_PCIIO_writel,
};
static CPUReadMemoryFunc *PPC_PCIIO_read[] = {
static CPUReadMemoryFunc * const PPC_PCIIO_read[] = {
&PPC_PCIIO_readb,
&PPC_PCIIO_readw,
&PPC_PCIIO_readl,

32
hw/pxa2xx.c
View File

@ -134,13 +134,13 @@ static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *pxa2xx_pm_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_pm_readfn[] = {
pxa2xx_pm_read,
pxa2xx_pm_read,
pxa2xx_pm_read,
};
static CPUWriteMemoryFunc *pxa2xx_pm_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_pm_writefn[] = {
pxa2xx_pm_write,
pxa2xx_pm_write,
pxa2xx_pm_write,
@ -215,13 +215,13 @@ static void pxa2xx_cm_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *pxa2xx_cm_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_cm_readfn[] = {
pxa2xx_cm_read,
pxa2xx_cm_read,
pxa2xx_cm_read,
};
static CPUWriteMemoryFunc *pxa2xx_cm_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_cm_writefn[] = {
pxa2xx_cm_write,
pxa2xx_cm_write,
pxa2xx_cm_write,
@ -515,13 +515,13 @@ static void pxa2xx_mm_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *pxa2xx_mm_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_mm_readfn[] = {
pxa2xx_mm_read,
pxa2xx_mm_read,
pxa2xx_mm_read,
};
static CPUWriteMemoryFunc *pxa2xx_mm_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_mm_writefn[] = {
pxa2xx_mm_write,
pxa2xx_mm_write,
pxa2xx_mm_write,
@ -791,13 +791,13 @@ static void pxa2xx_ssp_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *pxa2xx_ssp_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_ssp_readfn[] = {
pxa2xx_ssp_read,
pxa2xx_ssp_read,
pxa2xx_ssp_read,
};
static CPUWriteMemoryFunc *pxa2xx_ssp_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_ssp_writefn[] = {
pxa2xx_ssp_write,
pxa2xx_ssp_write,
pxa2xx_ssp_write,
@ -1155,13 +1155,13 @@ static void pxa2xx_rtc_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *pxa2xx_rtc_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_rtc_readfn[] = {
pxa2xx_rtc_read,
pxa2xx_rtc_read,
pxa2xx_rtc_read,
};
static CPUWriteMemoryFunc *pxa2xx_rtc_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_rtc_writefn[] = {
pxa2xx_rtc_write,
pxa2xx_rtc_write,
pxa2xx_rtc_write,
@ -1439,13 +1439,13 @@ static void pxa2xx_i2c_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *pxa2xx_i2c_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_i2c_readfn[] = {
pxa2xx_i2c_read,
pxa2xx_i2c_read,
pxa2xx_i2c_read,
};
static CPUWriteMemoryFunc *pxa2xx_i2c_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_i2c_writefn[] = {
pxa2xx_i2c_write,
pxa2xx_i2c_write,
pxa2xx_i2c_write,
@ -1666,13 +1666,13 @@ static void pxa2xx_i2s_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *pxa2xx_i2s_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_i2s_readfn[] = {
pxa2xx_i2s_read,
pxa2xx_i2s_read,
pxa2xx_i2s_read,
};
static CPUWriteMemoryFunc *pxa2xx_i2s_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_i2s_writefn[] = {
pxa2xx_i2s_write,
pxa2xx_i2s_write,
pxa2xx_i2s_write,
@ -1909,13 +1909,13 @@ static void pxa2xx_fir_write(void *opaque, target_phys_addr_t addr,
}
}
static CPUReadMemoryFunc *pxa2xx_fir_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_fir_readfn[] = {
pxa2xx_fir_read,
pxa2xx_fir_read,
pxa2xx_fir_read,
};
static CPUWriteMemoryFunc *pxa2xx_fir_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_fir_writefn[] = {
pxa2xx_fir_write,
pxa2xx_fir_write,
pxa2xx_fir_write,

4
hw/pxa2xx_dma.c
View File

@ -416,13 +416,13 @@ static void pxa2xx_dma_writebad(void *opaque,
hw_error("%s: Bad access width\n", __FUNCTION__);
}
static CPUReadMemoryFunc *pxa2xx_dma_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_dma_readfn[] = {
pxa2xx_dma_readbad,
pxa2xx_dma_readbad,
pxa2xx_dma_read
};
static CPUWriteMemoryFunc *pxa2xx_dma_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_dma_writefn[] = {
pxa2xx_dma_writebad,
pxa2xx_dma_writebad,
pxa2xx_dma_write

4
hw/pxa2xx_gpio.c
View File

@ -237,13 +237,13 @@ static void pxa2xx_gpio_write(void *opaque,
}
}
static CPUReadMemoryFunc *pxa2xx_gpio_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_gpio_readfn[] = {
pxa2xx_gpio_read,
pxa2xx_gpio_read,
pxa2xx_gpio_read
};
static CPUWriteMemoryFunc *pxa2xx_gpio_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_gpio_writefn[] = {
pxa2xx_gpio_write,
pxa2xx_gpio_write,
pxa2xx_gpio_write

4
hw/pxa2xx_keypad.c
View File

@ -257,13 +257,13 @@ static void pxa2xx_keypad_write(void *opaque,
}
}
static CPUReadMemoryFunc *pxa2xx_keypad_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_keypad_readfn[] = {
pxa2xx_keypad_read,
pxa2xx_keypad_read,
pxa2xx_keypad_read
};
static CPUWriteMemoryFunc *pxa2xx_keypad_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_keypad_writefn[] = {
pxa2xx_keypad_write,
pxa2xx_keypad_write,
pxa2xx_keypad_write

4
hw/pxa2xx_lcd.c
View File

@ -559,13 +559,13 @@ static void pxa2xx_lcdc_write(void *opaque,
}
}
static CPUReadMemoryFunc *pxa2xx_lcdc_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_lcdc_readfn[] = {
pxa2xx_lcdc_read,
pxa2xx_lcdc_read,
pxa2xx_lcdc_read
};
static CPUWriteMemoryFunc *pxa2xx_lcdc_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_lcdc_writefn[] = {
pxa2xx_lcdc_write,
pxa2xx_lcdc_write,
pxa2xx_lcdc_write

4
hw/pxa2xx_mmci.c
View File

@ -403,7 +403,7 @@ static uint32_t pxa2xx_mmci_readw(void *opaque, target_phys_addr_t offset)
return pxa2xx_mmci_read(opaque, offset);
}
static CPUReadMemoryFunc *pxa2xx_mmci_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_mmci_readfn[] = {
pxa2xx_mmci_readb,
pxa2xx_mmci_readh,
pxa2xx_mmci_readw
@ -433,7 +433,7 @@ static void pxa2xx_mmci_writew(void *opaque,
pxa2xx_mmci_write(opaque, offset, value);
}
static CPUWriteMemoryFunc *pxa2xx_mmci_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_mmci_writefn[] = {
pxa2xx_mmci_writeb,
pxa2xx_mmci_writeh,
pxa2xx_mmci_writew

12
hw/pxa2xx_pcmcia.c
View File

@ -85,37 +85,37 @@ static void pxa2xx_pcmcia_io_write(void *opaque,
}
}
static CPUReadMemoryFunc *pxa2xx_pcmcia_common_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_pcmcia_common_readfn[] = {
pxa2xx_pcmcia_common_read,
pxa2xx_pcmcia_common_read,
pxa2xx_pcmcia_common_read,
};
static CPUWriteMemoryFunc *pxa2xx_pcmcia_common_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_pcmcia_common_writefn[] = {
pxa2xx_pcmcia_common_write,
pxa2xx_pcmcia_common_write,
pxa2xx_pcmcia_common_write,
};
static CPUReadMemoryFunc *pxa2xx_pcmcia_attr_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_pcmcia_attr_readfn[] = {
pxa2xx_pcmcia_attr_read,
pxa2xx_pcmcia_attr_read,
pxa2xx_pcmcia_attr_read,
};
static CPUWriteMemoryFunc *pxa2xx_pcmcia_attr_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_pcmcia_attr_writefn[] = {
pxa2xx_pcmcia_attr_write,
pxa2xx_pcmcia_attr_write,
pxa2xx_pcmcia_attr_write,
};
static CPUReadMemoryFunc *pxa2xx_pcmcia_io_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_pcmcia_io_readfn[] = {
pxa2xx_pcmcia_io_read,
pxa2xx_pcmcia_io_read,
pxa2xx_pcmcia_io_read,
};
static CPUWriteMemoryFunc *pxa2xx_pcmcia_io_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_pcmcia_io_writefn[] = {
pxa2xx_pcmcia_io_write,
pxa2xx_pcmcia_io_write,
pxa2xx_pcmcia_io_write,

4
hw/pxa2xx_pic.c
View File

@ -229,13 +229,13 @@ static void pxa2xx_pic_cp_write(void *opaque, int op2, int reg, int crm,
pxa2xx_pic_mem_write(opaque, offset, value);
}
static CPUReadMemoryFunc *pxa2xx_pic_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_pic_readfn[] = {
pxa2xx_pic_mem_read,
pxa2xx_pic_mem_read,
pxa2xx_pic_mem_read,
};
static CPUWriteMemoryFunc *pxa2xx_pic_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_pic_writefn[] = {
pxa2xx_pic_mem_write,
pxa2xx_pic_mem_write,
pxa2xx_pic_mem_write,

4
hw/pxa2xx_timer.c
View File

@ -318,13 +318,13 @@ static void pxa2xx_timer_write(void *opaque, target_phys_addr_t offset,
}
}
static CPUReadMemoryFunc *pxa2xx_timer_readfn[] = {
static CPUReadMemoryFunc * const pxa2xx_timer_readfn[] = {
pxa2xx_timer_read,
pxa2xx_timer_read,
pxa2xx_timer_read,
};
static CPUWriteMemoryFunc *pxa2xx_timer_writefn[] = {
static CPUWriteMemoryFunc * const pxa2xx_timer_writefn[] = {
pxa2xx_timer_write,
pxa2xx_timer_write,
pxa2xx_timer_write,

4
hw/r2d.c
View File

@ -155,13 +155,13 @@ r2d_fpga_write(void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
static CPUReadMemoryFunc *r2d_fpga_readfn[] = {
static CPUReadMemoryFunc * const r2d_fpga_readfn[] = {
r2d_fpga_read,
r2d_fpga_read,
NULL,
};
static CPUWriteMemoryFunc *r2d_fpga_writefn[] = {
static CPUWriteMemoryFunc * const r2d_fpga_writefn[] = {
r2d_fpga_write,
r2d_fpga_write,
NULL,

8
hw/rc4030.c
View File

@ -417,13 +417,13 @@ static void rc4030_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
rc4030_writel(opaque, addr & ~0x3, val);
}
static CPUReadMemoryFunc *rc4030_read[3] = {
static CPUReadMemoryFunc * const rc4030_read[3] = {
rc4030_readb,
rc4030_readw,
rc4030_readl,
};
static CPUWriteMemoryFunc *rc4030_write[3] = {
static CPUWriteMemoryFunc * const rc4030_write[3] = {
rc4030_writeb,
rc4030_writew,
rc4030_writel,
@ -571,13 +571,13 @@ static void jazzio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
jazzio_writew(opaque, addr + 2, (val >> 16) & 0xffff);
}
static CPUReadMemoryFunc *jazzio_read[3] = {
static CPUReadMemoryFunc * const jazzio_read[3] = {
jazzio_readb,
jazzio_readw,
jazzio_readl,
};
static CPUWriteMemoryFunc *jazzio_write[3] = {
static CPUWriteMemoryFunc * const jazzio_write[3] = {
jazzio_writeb,
jazzio_writew,
jazzio_writel,

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