target/sparc: Convert remaining v8 coproc insns to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-04 12:43:44 -07:00
parent 9c6ec5bcad
commit d3c7e8ad74
2 changed files with 17 additions and 26 deletions

View File

@ -216,3 +216,14 @@ Tcc_r 10 0 cond:4 111010 rs1:5 0 cc:1 0000000 rs2:5
MOVcc 10 rd:5 101100 1 cond:4 imm:1 cc:1 0 rs2_or_imm:s11
MOVfcc 10 rd:5 101100 0 cond:4 imm:1 cc:2 rs2_or_imm:s11
MOVR 10 rd:5 101111 rs1:5 imm:1 cond:3 rs2_or_imm:s10
NCP 10 ----- 110110 ----- --------- ----- # v8 CPop1
NCP 10 ----- 110111 ----- --------- ----- # v8 CPop2
NCP 11 ----- 110000 ----- --------- ----- # v8 LDC
NCP 11 ----- 110001 ----- --------- ----- # v8 LDCSR
NCP 11 ----- 110011 ----- --------- ----- # v8 LDDC
NCP 11 ----- 110100 ----- --------- ----- # v8 STC
NCP 11 ----- 110101 ----- --------- ----- # v8 STCSR
NCP 11 ----- 110110 ----- --------- ----- # v8 STDCQ
NCP 11 ----- 110111 ----- --------- ----- # v8 STDC

View File

@ -4727,8 +4727,9 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
}
} else if (xop < 0x36) {
goto illegal_insn; /* in decodetree */
} else if (xop == 0x36) { /* UltraSparc shutdown, VIS, V8 CPop1 */
} else if (xop == 0x36) {
#ifdef TARGET_SPARC64
/* VIS */
int opf = GET_FIELD_SP(insn, 5, 13);
rs1 = GET_FIELD(insn, 13, 17);
rs2 = GET_FIELD(insn, 27, 31);
@ -5168,14 +5169,11 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
goto illegal_insn;
}
#else
goto ncp_insn;
#endif
} else if (xop == 0x37) { /* V8 CPop2, V9 impdep2 */
#ifdef TARGET_SPARC64
goto illegal_insn;
#else
goto ncp_insn;
g_assert_not_reached(); /* in decodetree */
#endif
} else if (xop == 0x37) {
/* V8 CPop2, V9 impdep2 */
goto illegal_insn; /* in decodetree */
#ifdef TARGET_SPARC64
} else if (xop == 0x39) { /* V9 return */
save_state(dc);
@ -5391,13 +5389,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
cpu_src1 = gen_load_gpr(dc, rd);
gen_swap_asi(dc, cpu_val, cpu_src1, cpu_addr, insn);
break;
#ifndef TARGET_SPARC64
case 0x30: /* ldc */
case 0x31: /* ldcsr */
case 0x33: /* lddc */
goto ncp_insn;
#endif
#endif
#ifdef TARGET_SPARC64
case 0x08: /* V9 ldsw */
@ -5658,12 +5649,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
cpu_src2 = gen_load_gpr(dc, rs2);
gen_casx_asi(dc, cpu_addr, cpu_src2, insn, rd);
break;
#else
case 0x34: /* stc */
case 0x35: /* stcsr */
case 0x36: /* stdcq */
case 0x37: /* stdc */
goto ncp_insn;
#endif
#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
case 0x3c: /* V9 or LEON3 casa */
@ -5703,11 +5688,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
gen_op_fpexception_im(dc, FSR_FTT_SEQ_ERROR);
return;
#endif
#ifndef TARGET_SPARC64
ncp_insn:
gen_exception(dc, TT_NCP_INSN);
return;
#endif
}
static void sparc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)