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aspeed: Parameterise number of MACs
To support the ast2600's four MACs allow SoCs to specify the number they have, and create that many. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20190925143248.10000-22-clg@kaod.org [clg: - included a check on sc->macs_num when realizing the macs - included interrupt definitions for the AST2600 ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -32,7 +32,9 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
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[ASPEED_SPI1] = 0x1E630000,
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[ASPEED_SPI2] = 0x1E641000,
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[ASPEED_ETH1] = 0x1E660000,
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[ASPEED_ETH3] = 0x1E670000,
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[ASPEED_ETH2] = 0x1E680000,
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[ASPEED_ETH4] = 0x1E690000,
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[ASPEED_VIC] = 0x1E6C0000,
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[ASPEED_SDMC] = 0x1E6E0000,
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[ASPEED_SCU] = 0x1E6E2000,
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@ -88,6 +90,9 @@ static const int aspeed_soc_ast2600_irqmap[] = {
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[ASPEED_I2C] = 110, /* 110 -> 125 */
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[ASPEED_ETH1] = 2,
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[ASPEED_ETH2] = 3,
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[ASPEED_ETH3] = 32,
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[ASPEED_ETH4] = 33,
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};
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static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
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@ -173,7 +178,7 @@ static void aspeed_soc_ast2600_init(Object *obj)
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OBJECT(&s->scu), &error_abort);
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}
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for (i = 0; i < ASPEED_MACS_NUM; i++) {
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for (i = 0; i < sc->macs_num; i++) {
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sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]),
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sizeof(s->ftgmac100[i]), TYPE_FTGMAC100);
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}
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@ -397,7 +402,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
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}
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/* Net */
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for (i = 0; i < nb_nics; i++) {
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for (i = 0; i < nb_nics && i < sc->macs_num; i++) {
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qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
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object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
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&err);
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@ -470,6 +475,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data)
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sc->sram_size = 0x10000;
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sc->spis_num = 2;
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sc->wdts_num = 4;
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sc->macs_num = 4;
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sc->irqmap = aspeed_soc_ast2600_irqmap;
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sc->memmap = aspeed_soc_ast2600_memmap;
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sc->num_cpus = 2;
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@ -198,7 +198,7 @@ static void aspeed_soc_init(Object *obj)
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OBJECT(&s->scu), &error_abort);
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}
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for (i = 0; i < ASPEED_MACS_NUM; i++) {
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for (i = 0; i < sc->macs_num; i++) {
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sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]),
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sizeof(s->ftgmac100[i]), TYPE_FTGMAC100);
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}
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@ -372,7 +372,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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}
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/* Net */
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for (i = 0; i < nb_nics; i++) {
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for (i = 0; i < nb_nics && i < sc->macs_num; i++) {
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qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
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object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
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&err);
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@ -455,6 +455,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *oc, void *data)
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sc->sram_size = 0x8000;
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sc->spis_num = 1;
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sc->wdts_num = 2;
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sc->macs_num = 2;
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sc->irqmap = aspeed_soc_ast2400_irqmap;
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sc->memmap = aspeed_soc_ast2400_memmap;
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sc->num_cpus = 1;
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@ -478,6 +479,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *oc, void *data)
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sc->sram_size = 0x9000;
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sc->spis_num = 2;
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sc->wdts_num = 3;
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sc->macs_num = 2;
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sc->irqmap = aspeed_soc_ast2500_irqmap;
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sc->memmap = aspeed_soc_ast2500_memmap;
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sc->num_cpus = 1;
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@ -30,7 +30,7 @@
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#define ASPEED_SPIS_NUM 2
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#define ASPEED_WDTS_NUM 4
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#define ASPEED_CPUS_NUM 2
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#define ASPEED_MACS_NUM 2
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#define ASPEED_MACS_NUM 4
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typedef struct AspeedSoCState {
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/*< private >*/
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@ -69,6 +69,7 @@ typedef struct AspeedSoCClass {
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uint64_t sram_size;
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int spis_num;
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int wdts_num;
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int macs_num;
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const int *irqmap;
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const hwaddr *memmap;
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uint32_t num_cpus;
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@ -114,6 +115,8 @@ enum {
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ASPEED_I2C,
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ASPEED_ETH1,
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ASPEED_ETH2,
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ASPEED_ETH3,
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ASPEED_ETH4,
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ASPEED_SDRAM,
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ASPEED_XDMA,
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};
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