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tcg: Remove tcg_regset_set
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -195,11 +195,11 @@ static const char *target_parse_constraint(TCGArgConstraint *ct,
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switch(*ct_str++) {
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case 'r':
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ct->ct |= TCG_CT_REG;
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tcg_regset_set(ct->u.regs, 0xffffffff);
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ct->u.regs = 0xffffffff;
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break;
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case 'L': /* qemu_ld input arg constraint */
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ct->ct |= TCG_CT_REG;
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tcg_regset_set(ct->u.regs, 0xffffffff);
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ct->u.regs = 0xffffffff;
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0);
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#if defined(CONFIG_SOFTMMU)
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if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
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@ -209,7 +209,7 @@ static const char *target_parse_constraint(TCGArgConstraint *ct,
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break;
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case 'S': /* qemu_st constraint */
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ct->ct |= TCG_CT_REG;
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tcg_regset_set(ct->u.regs, 0xffffffff);
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ct->u.regs = 0xffffffff;
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0);
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#if defined(CONFIG_SOFTMMU)
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if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
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@ -2607,27 +2607,28 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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static void tcg_target_init(TCGContext *s)
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{
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tcg_target_detect_isa();
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tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff);
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tcg_target_available_regs[TCG_TYPE_I32] = 0xffffffff;
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I64], 0xffffffff);
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tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff;
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}
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tcg_regset_set(tcg_target_call_clobber_regs,
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(1 << TCG_REG_V0) |
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(1 << TCG_REG_V1) |
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(1 << TCG_REG_A0) |
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(1 << TCG_REG_A1) |
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(1 << TCG_REG_A2) |
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(1 << TCG_REG_A3) |
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(1 << TCG_REG_T0) |
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(1 << TCG_REG_T1) |
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(1 << TCG_REG_T2) |
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(1 << TCG_REG_T3) |
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(1 << TCG_REG_T4) |
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(1 << TCG_REG_T5) |
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(1 << TCG_REG_T6) |
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(1 << TCG_REG_T7) |
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(1 << TCG_REG_T8) |
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(1 << TCG_REG_T9));
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tcg_target_call_clobber_regs = 0;
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_V0);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_V1);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A0);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A1);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A2);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A3);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T0);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T1);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T2);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T3);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T4);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T5);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T6);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T7);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T8);
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tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T9);
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s->reserved_regs = 0;
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_ZERO); /* zero register */
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@ -2362,7 +2362,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
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TCGTemp *ts, *ots;
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TCGType otype, itype;
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tcg_regset_set(allocated_regs, s->reserved_regs);
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allocated_regs = s->reserved_regs;
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ots = &s->temps[args[0]];
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ts = &s->temps[args[1]];
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@ -2450,8 +2450,8 @@ static void tcg_reg_alloc_op(TCGContext *s,
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args + nb_oargs + nb_iargs,
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sizeof(TCGArg) * def->nb_cargs);
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tcg_regset_set(i_allocated_regs, s->reserved_regs);
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tcg_regset_set(o_allocated_regs, s->reserved_regs);
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i_allocated_regs = s->reserved_regs;
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o_allocated_regs = s->reserved_regs;
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/* satisfy input constraints */
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for(k = 0; k < nb_iargs; k++) {
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@ -2651,7 +2651,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
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}
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/* assign input registers */
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tcg_regset_set(allocated_regs, s->reserved_regs);
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allocated_regs = s->reserved_regs;
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for(i = 0; i < nb_regs; i++) {
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arg = args[nb_oargs + i];
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if (arg != TCG_CALL_DUMMY_ARG) {
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