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aspeed/smc: unfold the AspeedSMCController array

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This is getting difficult to read. Also add a 'has_dma' field for each
controller type.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1483979087-32663-6-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2017-01-20 11:15:07 +00:00 committed by Peter Maydell
parent 0707b34dcb
commit d09dc5b75b
2 changed files with 74 additions and 18 deletions
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91
hw/ssi/aspeed_smc.c
View File

@ -173,24 +173,79 @@ static const AspeedSegments aspeed_segments_ast2500_spi2[] = {
}; };
static const AspeedSMCController controllers[] = { static const AspeedSMCController controllers[] = {
{ "aspeed.smc.smc", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS, {
CONF_ENABLE_W0, 5, aspeed_segments_legacy, .name = "aspeed.smc.smc",
ASPEED_SOC_SMC_FLASH_BASE, 0x6000000 }, .r_conf = R_CONF,
{ "aspeed.smc.fmc", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS, .r_ce_ctrl = R_CE_CTRL,
CONF_ENABLE_W0, 5, aspeed_segments_fmc, .r_ctrl0 = R_CTRL0,
ASPEED_SOC_FMC_FLASH_BASE, 0x10000000 }, .r_timings = R_TIMINGS,
{ "aspeed.smc.spi", R_SPI_CONF, 0xff, R_SPI_CTRL0, R_SPI_TIMINGS, .conf_enable_w0 = CONF_ENABLE_W0,
SPI_CONF_ENABLE_W0, 1, aspeed_segments_spi, .max_slaves = 5,
ASPEED_SOC_SPI_FLASH_BASE, 0x10000000 }, .segments = aspeed_segments_legacy,
{ "aspeed.smc.ast2500-fmc", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS, .flash_window_base = ASPEED_SOC_SMC_FLASH_BASE,
CONF_ENABLE_W0, 3, aspeed_segments_ast2500_fmc, .flash_window_size = 0x6000000,
ASPEED_SOC_FMC_FLASH_BASE, 0x10000000 }, .has_dma = false,
{ "aspeed.smc.ast2500-spi1", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS, }, {
CONF_ENABLE_W0, 2, aspeed_segments_ast2500_spi1, .name = "aspeed.smc.fmc",
ASPEED_SOC_SPI_FLASH_BASE, 0x8000000 }, .r_conf = R_CONF,
{ "aspeed.smc.ast2500-spi2", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS, .r_ce_ctrl = R_CE_CTRL,
CONF_ENABLE_W0, 2, aspeed_segments_ast2500_spi2, .r_ctrl0 = R_CTRL0,
ASPEED_SOC_SPI2_FLASH_BASE, 0x8000000 }, .r_timings = R_TIMINGS,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 5,
.segments = aspeed_segments_fmc,
.flash_window_base = ASPEED_SOC_FMC_FLASH_BASE,
.flash_window_size = 0x10000000,
.has_dma = true,
}, {
.name = "aspeed.smc.spi",
.r_conf = R_SPI_CONF,
.r_ce_ctrl = 0xff,
.r_ctrl0 = R_SPI_CTRL0,
.r_timings = R_SPI_TIMINGS,
.conf_enable_w0 = SPI_CONF_ENABLE_W0,
.max_slaves = 1,
.segments = aspeed_segments_spi,
.flash_window_base = ASPEED_SOC_SPI_FLASH_BASE,
.flash_window_size = 0x10000000,
.has_dma = false,
}, {
.name = "aspeed.smc.ast2500-fmc",
.r_conf = R_CONF,
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 3,
.segments = aspeed_segments_ast2500_fmc,
.flash_window_base = ASPEED_SOC_FMC_FLASH_BASE,
.flash_window_size = 0x10000000,
.has_dma = true,
}, {
.name = "aspeed.smc.ast2500-spi1",
.r_conf = R_CONF,
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 2,
.segments = aspeed_segments_ast2500_spi1,
.flash_window_base = ASPEED_SOC_SPI_FLASH_BASE,
.flash_window_size = 0x8000000,
.has_dma = false,
}, {
.name = "aspeed.smc.ast2500-spi2",
.r_conf = R_CONF,
.r_ce_ctrl = R_CE_CTRL,
.r_ctrl0 = R_CTRL0,
.r_timings = R_TIMINGS,
.conf_enable_w0 = CONF_ENABLE_W0,
.max_slaves = 2,
.segments = aspeed_segments_ast2500_spi2,
.flash_window_base = ASPEED_SOC_SPI2_FLASH_BASE,
.flash_window_size = 0x8000000,
.has_dma = false,
},
}; };
/* /*

1
include/hw/ssi/aspeed_smc.h
View File

@ -44,6 +44,7 @@ typedef struct AspeedSMCController {
const AspeedSegments *segments; const AspeedSegments *segments;
hwaddr flash_window_base; hwaddr flash_window_base;
uint32_t flash_window_size; uint32_t flash_window_size;
bool has_dma;
} AspeedSMCController; } AspeedSMCController;
typedef struct AspeedSMCFlash { typedef struct AspeedSMCFlash {