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target/arm: Enable SCTLR_EL1.TIDCP for user-only

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The linux kernel detects and enables this bit.  Once trapped,
EC_SYSTEMREGISTERTRAP is treated like EC_UNCATEGORIZED, so
no changes required within linux-user/aarch64/cpu_loop.c.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230831232441.66020-6-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2023-08-31 16:24:41 -07:00 committed by Peter Maydell
parent 9cd0c0dec9
commit d03396a8bb
1 changed files with 4 additions and 0 deletions
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4
target/arm/cpu.c
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@ -243,6 +243,10 @@ static void arm_cpu_reset_hold(Object *obj)
SCTLR_EnDA | SCTLR_EnDB);
/* Trap on btype=3 for PACIxSP. */
env->cp15.sctlr_el[1] |= SCTLR_BT0;
/* Trap on implementation defined registers. */
if (cpu_isar_feature(aa64_tidcp1, cpu)) {
env->cp15.sctlr_el[1] |= SCTLR_TIDCP;
}
/* and to the FP/Neon instructions */
env->cp15.cpacr_el1 = FIELD_DP64(env->cp15.cpacr_el1,
CPACR_EL1, FPEN, 3);