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tcg/s390x: Split constraint A into J+U
Signed 33-bit == signed 32-bit + unsigned 32-bit. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -15,7 +15,7 @@
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C_O0_I1(r)
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C_O0_I2(r, r)
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C_O0_I2(r, ri)
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C_O0_I2(r, rA)
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C_O0_I2(r, rJU)
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C_O0_I2(v, r)
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C_O0_I3(o, m, r)
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C_O1_I1(r, r)
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@ -27,7 +27,7 @@ C_O1_I2(r, 0, rI)
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C_O1_I2(r, 0, rJ)
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C_O1_I2(r, r, r)
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C_O1_I2(r, r, ri)
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C_O1_I2(r, r, rA)
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C_O1_I2(r, r, rJU)
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C_O1_I2(r, r, rI)
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C_O1_I2(r, r, rJ)
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C_O1_I2(r, r, rK)
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@ -39,10 +39,10 @@ C_O1_I2(v, v, r)
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C_O1_I2(v, v, v)
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C_O1_I3(v, v, v, v)
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C_O1_I4(r, r, ri, rI, r)
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C_O1_I4(r, r, rA, rI, r)
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C_O1_I4(r, r, rJU, rI, r)
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C_O2_I1(o, m, r)
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C_O2_I2(o, m, 0, r)
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C_O2_I2(o, m, r, r)
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C_O2_I3(o, m, 0, 1, r)
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C_N1_O1_I4(r, r, 0, 1, ri, r)
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C_N1_O1_I4(r, r, 0, 1, rA, r)
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C_N1_O1_I4(r, r, 0, 1, rJU, r)
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@ -16,10 +16,10 @@ REGS('o', 0xaaaa) /* odd numbered general regs */
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* Define constraint letters for constants:
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* CONST(letter, TCG_CT_CONST_* bit set)
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*/
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CONST('A', TCG_CT_CONST_S33)
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CONST('I', TCG_CT_CONST_S16)
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CONST('J', TCG_CT_CONST_S32)
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CONST('K', TCG_CT_CONST_P32)
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CONST('N', TCG_CT_CONST_INV)
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CONST('R', TCG_CT_CONST_INVRISBG)
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CONST('U', TCG_CT_CONST_U32)
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CONST('Z', TCG_CT_CONST_ZERO)
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@ -30,7 +30,7 @@
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#define TCG_CT_CONST_S16 (1 << 8)
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#define TCG_CT_CONST_S32 (1 << 9)
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#define TCG_CT_CONST_S33 (1 << 10)
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#define TCG_CT_CONST_U32 (1 << 10)
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#define TCG_CT_CONST_ZERO (1 << 11)
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#define TCG_CT_CONST_P32 (1 << 12)
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#define TCG_CT_CONST_INV (1 << 13)
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@ -542,22 +542,23 @@ static bool tcg_target_const_match(int64_t val, int ct,
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TCGType type, TCGCond cond, int vece)
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{
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if (ct & TCG_CT_CONST) {
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return 1;
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return true;
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}
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if (type == TCG_TYPE_I32) {
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val = (int32_t)val;
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}
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/* The following are mutually exclusive. */
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if (ct & TCG_CT_CONST_S16) {
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return val == (int16_t)val;
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} else if (ct & TCG_CT_CONST_S32) {
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return val == (int32_t)val;
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} else if (ct & TCG_CT_CONST_S33) {
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return val >= -0xffffffffll && val <= 0xffffffffll;
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} else if (ct & TCG_CT_CONST_ZERO) {
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return val == 0;
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if ((ct & TCG_CT_CONST_S32) && val == (int32_t)val) {
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return true;
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}
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if ((ct & TCG_CT_CONST_U32) && val == (uint32_t)val) {
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return true;
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}
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if ((ct & TCG_CT_CONST_S16) && val == (int16_t)val) {
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return true;
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}
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if ((ct & TCG_CT_CONST_ZERO) && val == 0) {
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return true;
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}
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if (ct & TCG_CT_CONST_INV) {
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@ -573,8 +574,7 @@ static bool tcg_target_const_match(int64_t val, int ct,
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if ((ct & TCG_CT_CONST_INVRISBG) && risbg_mask(~val)) {
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return true;
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}
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return 0;
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return false;
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}
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/* Emit instructions according to the given instruction format. */
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@ -3137,7 +3137,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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return C_O1_I2(r, r, ri);
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case INDEX_op_setcond_i64:
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case INDEX_op_negsetcond_i64:
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return C_O1_I2(r, r, rA);
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return C_O1_I2(r, r, rJU);
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case INDEX_op_clz_i64:
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return C_O1_I2(r, r, rI);
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@ -3187,7 +3187,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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case INDEX_op_brcond_i32:
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return C_O0_I2(r, ri);
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case INDEX_op_brcond_i64:
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return C_O0_I2(r, rA);
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return C_O0_I2(r, rJU);
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case INDEX_op_bswap16_i32:
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case INDEX_op_bswap16_i64:
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@ -3240,7 +3240,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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case INDEX_op_movcond_i32:
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return C_O1_I4(r, r, ri, rI, r);
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case INDEX_op_movcond_i64:
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return C_O1_I4(r, r, rA, rI, r);
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return C_O1_I4(r, r, rJU, rI, r);
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case INDEX_op_div2_i32:
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case INDEX_op_div2_i64:
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@ -3259,7 +3259,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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case INDEX_op_add2_i64:
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case INDEX_op_sub2_i64:
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return C_N1_O1_I4(r, r, 0, 1, rA, r);
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return C_N1_O1_I4(r, r, 0, 1, rJU, r);
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case INDEX_op_st_vec:
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return C_O0_I2(v, r);
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