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target/riscv: Remove floatX_maybe_silence_nan from conversions

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This is now handled properly by the generic softfloat code.

Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2018-05-10 13:52:48 -07:00
parent 4accd4a89f
commit cab3211261
1 changed files with 2 additions and 4 deletions
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6
target/riscv/fpu_helper.c
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@ -279,14 +279,12 @@ uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1)
{
rs1 = float64_to_float32(rs1, &env->fp_status);
return float32_maybe_silence_nan(rs1, &env->fp_status);
return float64_to_float32(rs1, &env->fp_status);
}
uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1)
{
rs1 = float32_to_float64(rs1, &env->fp_status);
return float64_maybe_silence_nan(rs1, &env->fp_status);
return float32_to_float64(rs1, &env->fp_status);
}
uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1)