mirror of
https://github.com/qemu/qemu.git
synced 2024-11-29 23:03:41 +08:00
tcg/i386: Support INDEX_op_extract2_{i32,i64}
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
b0a6056719
commit
c6fb8c0cf7
@ -124,7 +124,7 @@ extern bool have_avx2;
|
||||
#define TCG_TARGET_HAS_deposit_i32 1
|
||||
#define TCG_TARGET_HAS_extract_i32 1
|
||||
#define TCG_TARGET_HAS_sextract_i32 1
|
||||
#define TCG_TARGET_HAS_extract2_i32 0
|
||||
#define TCG_TARGET_HAS_extract2_i32 1
|
||||
#define TCG_TARGET_HAS_movcond_i32 1
|
||||
#define TCG_TARGET_HAS_add2_i32 1
|
||||
#define TCG_TARGET_HAS_sub2_i32 1
|
||||
@ -163,7 +163,7 @@ extern bool have_avx2;
|
||||
#define TCG_TARGET_HAS_deposit_i64 1
|
||||
#define TCG_TARGET_HAS_extract_i64 1
|
||||
#define TCG_TARGET_HAS_sextract_i64 0
|
||||
#define TCG_TARGET_HAS_extract2_i64 0
|
||||
#define TCG_TARGET_HAS_extract2_i64 1
|
||||
#define TCG_TARGET_HAS_movcond_i64 1
|
||||
#define TCG_TARGET_HAS_add2_i64 1
|
||||
#define TCG_TARGET_HAS_sub2_i64 1
|
||||
|
@ -452,6 +452,7 @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
|
||||
#define OPC_SHUFPS (0xc6 | P_EXT)
|
||||
#define OPC_SHLX (0xf7 | P_EXT38 | P_DATA16)
|
||||
#define OPC_SHRX (0xf7 | P_EXT38 | P_SIMDF2)
|
||||
#define OPC_SHRD_Ib (0xac | P_EXT)
|
||||
#define OPC_TESTL (0x85)
|
||||
#define OPC_TZCNT (0xbc | P_EXT | P_SIMDF3)
|
||||
#define OPC_UD2 (0x0b | P_EXT)
|
||||
@ -2587,6 +2588,12 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
|
||||
}
|
||||
break;
|
||||
|
||||
OP_32_64(extract2):
|
||||
/* Note that SHRD outputs to the r/m operand. */
|
||||
tcg_out_modrm(s, OPC_SHRD_Ib + rexw, a2, a0);
|
||||
tcg_out8(s, args[3]);
|
||||
break;
|
||||
|
||||
case INDEX_op_mb:
|
||||
tcg_out_mb(s, a0);
|
||||
break;
|
||||
@ -2845,6 +2852,7 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
|
||||
static const TCGTargetOpDef r_0 = { .args_ct_str = { "r", "0" } };
|
||||
static const TCGTargetOpDef r_r_ri = { .args_ct_str = { "r", "r", "ri" } };
|
||||
static const TCGTargetOpDef r_r_re = { .args_ct_str = { "r", "r", "re" } };
|
||||
static const TCGTargetOpDef r_0_r = { .args_ct_str = { "r", "0", "r" } };
|
||||
static const TCGTargetOpDef r_0_re = { .args_ct_str = { "r", "0", "re" } };
|
||||
static const TCGTargetOpDef r_0_ci = { .args_ct_str = { "r", "0", "ci" } };
|
||||
static const TCGTargetOpDef r_L = { .args_ct_str = { "r", "L" } };
|
||||
@ -2970,6 +2978,9 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
|
||||
case INDEX_op_ctpop_i32:
|
||||
case INDEX_op_ctpop_i64:
|
||||
return &r_r;
|
||||
case INDEX_op_extract2_i32:
|
||||
case INDEX_op_extract2_i64:
|
||||
return &r_0_r;
|
||||
|
||||
case INDEX_op_deposit_i32:
|
||||
case INDEX_op_deposit_i64:
|
||||
|
Loading…
Reference in New Issue
Block a user