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docs/system: Add SGX documentation to the system manual
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20210719112136.57018-34-yang.zhong@intel.com> [Convert to reStructuredText, and adopt the standard === --- ~~~ headings suggested for example by Linux. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Sean Christopherson
Paolo Bonzini
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docs/system/i386/sgx.rst
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docs/system/i386/sgx.rst
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Software Guard eXtensions (SGX)
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===============================
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Overview
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--------
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Intel Software Guard eXtensions (SGX) is a set of instructions and mechanisms
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for memory accesses in order to provide security accesses for sensitive
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applications and data. SGX allows an application to use it's pariticular
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address space as an *enclave*, which is a protected area provides confidentiality
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and integrity even in the presence of privileged malware. Accesses to the
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enclave memory area from any software not resident in the enclave are prevented,
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including those from privileged software.
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Virtual SGX
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-----------
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SGX feature is exposed to guest via SGX CPUID. Looking at SGX CPUID, we can
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report the same CPUID info to guest as on host for most of SGX CPUID. With
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reporting the same CPUID guest is able to use full capacity of SGX, and KVM
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doesn't need to emulate those info.
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The guest's EPC base and size are determined by Qemu, and KVM needs Qemu to
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notify such info to it before it can initialize SGX for guest.
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Virtual EPC
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~~~~~~~~~~~
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By default, Qemu does not assign EPC to a VM, i.e. fully enabling SGX in a VM
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requires explicit allocation of EPC to the VM. Similar to other specialized
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memory types, e.g. hugetlbfs, EPC is exposed as a memory backend.
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SGX EPC is enumerated through CPUID, i.e. EPC "devices" need to be realized
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prior to realizing the vCPUs themselves, which occurs long before generic
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devices are parsed and realized. This limitation means that EPC does not
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require -maxmem as EPC is not treated as {cold,hot}plugged memory.
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Qemu does not artificially restrict the number of EPC sections exposed to a
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guest, e.g. Qemu will happily allow you to create 64 1M EPC sections. Be aware
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that some kernels may not recognize all EPC sections, e.g. the Linux SGX driver
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is hardwired to support only 8 EPC sections.
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The following Qemu snippet creates two EPC sections, with 64M pre-allocated
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to the VM and an additional 28M mapped but not allocated::
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-object memory-backend-epc,id=mem1,size=64M,prealloc=on \
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-object memory-backend-epc,id=mem2,size=28M \
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-M sgx-epc.0.memdev=mem1,sgx-epc.1.memdev=mem2
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Note:
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The size and location of the virtual EPC are far less restricted compared
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to physical EPC. Because physical EPC is protected via range registers,
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the size of the physical EPC must be a power of two (though software sees
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a subset of the full EPC, e.g. 92M or 128M) and the EPC must be naturally
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aligned. KVM SGX's virtual EPC is purely a software construct and only
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requires the size and location to be page aligned. Qemu enforces the EPC
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size is a multiple of 4k and will ensure the base of the EPC is 4k aligned.
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To simplify the implementation, EPC is always located above 4g in the guest
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physical address space.
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Migration
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~~~~~~~~~
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Qemu/KVM doesn't prevent live migrating SGX VMs, although from hardware's
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perspective, SGX doesn't support live migration, since both EPC and the SGX
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key hierarchy are bound to the physical platform. However live migration
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can be supported in the sense if guest software stack can support recreating
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enclaves when it suffers sudden lose of EPC; and if guest enclaves can detect
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SGX keys being changed, and handle gracefully. For instance, when ERESUME fails
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with #PF.SGX, guest software can gracefully detect it and recreate enclaves;
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and when enclave fails to unseal sensitive information from outside, it can
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detect such error and sensitive information can be provisioned to it again.
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CPUID
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~~~~~
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Due to its myriad dependencies, SGX is currently not listed as supported
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in any of Qemu's built-in CPU configuration. To expose SGX (and SGX Launch
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Control) to a guest, you must either use `-cpu host` to pass-through the
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host CPU model, or explicitly enable SGX when using a built-in CPU model,
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e.g. via `-cpu <model>,+sgx` or `-cpu <model>,+sgx,+sgxlc`.
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All SGX sub-features enumerated through CPUID, e.g. SGX2, MISCSELECT,
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ATTRIBUTES, etc... can be restricted via CPUID flags. Be aware that enforcing
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restriction of MISCSELECT, ATTRIBUTES and XFRM requires intercepting ECREATE,
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i.e. may marginally reduce SGX performance in the guest. All SGX sub-features
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controlled via -cpu are prefixed with "sgx", e.g.::
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$ qemu-system-x86_64 -cpu help | xargs printf "%s\n" | grep sgx
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sgx
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sgx-debug
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sgx-encls-c
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sgx-enclv
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sgx-exinfo
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sgx-kss
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sgx-mode64
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sgx-provisionkey
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sgx-tokenkey
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sgx1
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sgx2
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sgxlc
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The following Qemu snippet passes through the host CPU but restricts access to
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the provision and EINIT token keys::
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-cpu host,-sgx-provisionkey,-sgx-tokenkey
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SGX sub-features cannot be emulated, i.e. sub-features that are not present
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in hardware cannot be forced on via '-cpu'.
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Virtualize SGX Launch Control
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Qemu SGX support for Launch Control (LC) is passive, in the sense that it
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does not actively change the LC configuration. Qemu SGX provides the user
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the ability to set/clear the CPUID flag (and by extension the associated
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IA32_FEATURE_CONTROL MSR bit in fw_cfg) and saves/restores the LE Hash MSRs
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when getting/putting guest state, but Qemu does not add new controls to
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directly modify the LC configuration. Similar to hardware behavior, locking
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the LC configuration to a non-Intel value is left to guest firmware. Unlike
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host bios setting for SGX launch control(LC), there is no special bios setting
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for SGX guest by our design. If host is in locked mode, we can still allow
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creating VM with SGX.
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Feature Control
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~~~~~~~~~~~~~~~
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Qemu SGX updates the `etc/msr_feature_control` fw_cfg entry to set the SGX
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(bit 18) and SGX LC (bit 17) flags based on their respective CPUID support,
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i.e. existing guest firmware will automatically set SGX and SGX LC accordingly,
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assuming said firmware supports fw_cfg.msr_feature_control.
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Launching a guest
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-----------------
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To launch a SGX guest:
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.. parsed-literal::
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|qemu_system_x86| \\
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-cpu host,+sgx-provisionkey \\
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-object memory-backend-epc,id=mem1,size=64M,prealloc=on \\
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-object memory-backend-epc,id=mem2,size=28M \\
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-M sgx-epc.0.memdev=mem1,sgx-epc.1.memdev=mem2
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Utilizing SGX in the guest requires a kernel/OS with SGX support.
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The support can be determined in guest by::
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$ grep sgx /proc/cpuinfo
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and SGX epc info by::
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$ dmesg | grep sgx
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[ 1.242142] sgx: EPC section 0x180000000-0x181bfffff
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[ 1.242319] sgx: EPC section 0x181c00000-0x1837fffff
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References
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----------
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- `SGX Homepage <https://software.intel.com/sgx>`__
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- `SGX SDK <https://github.com/intel/linux-sgx.git>`__
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- SGX specification: Intel SDM Volume 3
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@ -26,6 +26,7 @@ Architectural features
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:maxdepth: 1
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i386/cpu
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i386/sgx
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.. _pcsys_005freq:
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