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hw/acpi/ich9: Add compat prop to keep HPC bit set for 6.1 machine type
To solve issues [1-2] the Hot Plug Capable bit in PCIe Slots will be turned on, while the switch to ACPI Hot-plug will be done in the DSDT table. Introducing 'x-keep-native-hpc' property disables the HPC bit only in 6.1 and as a result keeps the forced 'reserve-io' on pcie-root-ports in 6.1 too. [1] https://gitlab.com/qemu-project/qemu/-/issues/641 [2] https://bugzilla.redhat.com/show_bug.cgi?id=2006409 Signed-off-by: Julia Suvorova <jusual@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20211112110857.3116853-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -419,6 +419,20 @@ static void ich9_pm_set_acpi_pci_hotplug(Object *obj, bool value, Error **errp)
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s->pm.use_acpi_hotplug_bridge = value;
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}
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static bool ich9_pm_get_keep_pci_slot_hpc(Object *obj, Error **errp)
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{
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ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
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return s->pm.keep_pci_slot_hpc;
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}
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static void ich9_pm_set_keep_pci_slot_hpc(Object *obj, bool value, Error **errp)
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{
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ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
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s->pm.keep_pci_slot_hpc = value;
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}
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void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
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{
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static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
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@ -428,6 +442,7 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
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pm->disable_s4 = 0;
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pm->s4_val = 2;
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pm->use_acpi_hotplug_bridge = true;
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pm->keep_pci_slot_hpc = true;
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object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
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&pm->pm_io_base, OBJ_PROP_FLAG_READ);
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@ -454,6 +469,9 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
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object_property_add_bool(obj, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
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ich9_pm_get_acpi_pci_hotplug,
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ich9_pm_set_acpi_pci_hotplug);
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object_property_add_bool(obj, "x-keep-pci-slot-hpc",
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ich9_pm_get_keep_pci_slot_hpc,
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ich9_pm_set_keep_pci_slot_hpc);
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}
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void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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@ -98,6 +98,7 @@ GlobalProperty pc_compat_6_1[] = {
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{ TYPE_X86_CPU, "hv-version-id-build", "0x1bbc" },
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{ TYPE_X86_CPU, "hv-version-id-major", "0x0006" },
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{ TYPE_X86_CPU, "hv-version-id-minor", "0x0001" },
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{ "ICH9-LPC", "x-keep-pci-slot-hpc", "false" },
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};
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const size_t pc_compat_6_1_len = G_N_ELEMENTS(pc_compat_6_1);
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@ -107,6 +108,7 @@ GlobalProperty pc_compat_6_0[] = {
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{ "qemu64" "-" TYPE_X86_CPU, "stepping", "3" },
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{ TYPE_X86_CPU, "x-vendor-cpuid-only", "off" },
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{ "ICH9-LPC", ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, "off" },
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{ "ICH9-LPC", "x-keep-pci-slot-hpc", "true" },
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};
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const size_t pc_compat_6_0_len = G_N_ELEMENTS(pc_compat_6_0);
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@ -137,6 +137,7 @@ static void pc_q35_init(MachineState *machine)
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DriveInfo *hd[MAX_SATA_PORTS];
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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bool acpi_pcihp;
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bool keep_pci_slot_hpc;
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/* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
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* and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
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@ -242,7 +243,11 @@ static void pc_q35_init(MachineState *machine)
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ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
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NULL);
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if (acpi_pcihp) {
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keep_pci_slot_hpc = object_property_get_bool(OBJECT(lpc),
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"x-keep-pci-slot-hpc",
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NULL);
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if (!keep_pci_slot_hpc && acpi_pcihp) {
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object_register_sugar_prop(TYPE_PCIE_SLOT, "x-native-hotplug",
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"false", true);
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}
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@ -56,6 +56,7 @@ typedef struct ICH9LPCPMRegs {
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AcpiCpuHotplug gpe_cpu;
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CPUHotplugState cpuhp_state;
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bool keep_pci_slot_hpc;
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bool use_acpi_hotplug_bridge;
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AcpiPciHpState acpi_pci_hotplug;
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MemHotplugState acpi_memory_hotplug;
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